AuxXxilium/linux_dsm_epyc7002
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3 Commits

Author SHA1 Message Date
Matti Vaittinen
d3236214e7 clk: clk-st: avoid clkdev lookup leak at remove 
Use devm based clkdev lookup registration to avoid leaking lookup
structures.

Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2019-02-06 10:35:04 -08:00
Akshu Agrawal
bded6c03e3 clk: x86: Set default parent to 48Mhz 
System clk provided in ST soc can be set to:
48Mhz, non-spread
25Mhz, spread
To get accurate rate, we need it to set it at non-spread
option which is 48Mhz.

Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Fixes: 421bf6a1f0 ("clk: x86: Add ST oscout platform clock")
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2018-08-30 14:47:41 -07:00
Akshu Agrawal
421bf6a1f0 clk: x86: Add ST oscout platform clock 
Stoney SoC provides oscout clock. This clock can support 25Mhz and
48Mhz of frequency.
The clock is available for general system use.

Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
 2018-05-17 12:44:06 +02:00