Commit Graph

28220 Commits

Author SHA1 Message Date
Chunming Zhou
c7c5fbcdc3 drm/amdgpu: put old hw fence of job if gpu reset
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:12 -04:00
Christian König
595a9cd68c drm/amdgpu: remove fence parameter from amd_sched_job_init
We return the fence as part of the job structur anyway,
no need to do this twice.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:11 -04:00
Christian König
a5fb4ec29c drm/amdgpu: earlier free SA resources
Keep the time we don't have a fence associated with the resource smaller.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:10 -04:00
Christian König
a79a5bdcef drm/amdgpu: shorten amdgpu_job_free_resources
The fence and the sync object are not hardware resources.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:10 -04:00
Christian König
b5f5acbc87 drm/amdgpu: fix user fence handling once more
Same problem as with the VM page tables. The user fence address must be
determined before the job is scheduled, not when the IB is executed.

This fixes a security problem where user fences could be used to overwrite
any part of VRAM.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:09 -04:00
Tom St Denis
5662815950 drm/amd/amdgpu: Add bank selection for MMIO debugfs (v3)
(v2) Added INSTANCE selector
(v3) Changed order of bank selectors

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:09 -04:00
Tom St Denis
1e0514131d drm/amd/amdgpu: Add gca config debug entry (v4)
A binary entry that lists GCA configuration data (and can be
read by umr).

(v2) Use kmalloc instead of vmalloc
(v3) Minor indentation correction
(v4) agd: Squash in kmalloc fix

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:08 -04:00
Tom St Denis
9559ef5b12 drm/amd/gfx: add instance field to select_se_sh (v3)
Add ability to specify instance in select_se_sh callback.
Defaults to 0xffffffff all over the driver.

(v2) Don't enable INSTANCE_BROADCAST by default
(v3) Style changes

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:07 -04:00
Lyude
b636a1b3d6 drm/amdgpu: Poll for both connect/disconnect on analog connectors
DRM_CONNECTOR_POLL_CONNECT only enables polling for connections, not
disconnections. Because of this, we end up losing hotplug polling for
analog connectors once they get connected.

Easy way to reproduce:
 - Grab a machine with an AMD GPU and a VGA port
 - Plug a monitor into the VGA port, wait for it to update the connector
   from disconnected to connected
 - Disconnect the monitor on VGA, a hotplug event is never sent for the
   removal of the connector.

Originally, only using DRM_CONNECTOR_POLL_CONNECT might have been a good
idea since doing VGA polling can sometimes result in having to mess with
the DAC voltages to figure out whether or not there's actually something
there since VGA doesn't have HPD. Doing this would have the potential of
showing visible artifacts on the screen every time we ran a poll while a
VGA display was connected. Luckily, amdgpu_vga_detect() only resorts to
this sort of polling if the poll is forced, and DRM's polling helper
doesn't force it's polls.

Additionally, this removes some assignments to connector->polled that
weren't actually doing anything.

Cc: stable@vger.kernel.org
Signed-off-by: Lyude <cpaul@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:07 -04:00
Lyude
14ff8d48f2 drm/radeon: Poll for both connect/disconnect on analog connectors
DRM_CONNECTOR_POLL_CONNECT only enables polling for connections, not
disconnections. Because of this, we end up losing hotplug polling for
analog connectors once they get connected.

Easy way to reproduce:
 - Grab a machine with a radeon GPU and a VGA port
 - Plug a monitor into the VGA port, wait for it to update the connector
   from disconnected to connected
 - Disconnect the monitor on VGA, a hotplug event is never sent for the
   removal of the connector.

Originally, only using DRM_CONNECTOR_POLL_CONNECT might have been a good
idea since doing VGA polling can sometimes result in having to mess with
the DAC voltages to figure out whether or not there's actually something
there since VGA doesn't have HPD. Doing this would have the potential of
showing visible artifacts on the screen every time we ran a poll while a
VGA display was connected. Luckily, radeon_vga_detect() only resorts to
this sort of polling if the poll is forced, and DRM's polling helper
doesn't force it's polls.

Additionally, this removes some assignments to connector->polled that
weren't actually doing anything.

Cc: stable@vger.kernel.org
Signed-off-by: Lyude <cpaul@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:06 -04:00
Chunming Zhou
f1aa7e082e drm/amdgpu: stop/resume fb access when gpu reset V3
V2: Add wait_for_mc_idle after stopping fb access
V3:
	1. Remove resume fb access since there is no need to
   	do that for gpu reset.
	2. Move stop fb access to amdgpu_gpu_reset function,
	since it's the same for all asics.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com> (V1)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:06 -04:00
Rex Zhu
e013c91c06 drm/amd/powerplay: change condition judgment as function's return value changed.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:05 -04:00
Rex Zhu
2a9126b94a drm/amd/powerplay: functions's return state was reversed
In commit 195567e99b,
use true/false instead of 1/0 to fix build warning.
But the original logic: '0' means true and '1' means false.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:04 -04:00
Christian König
1059e117cc drm/amdgpu: stop disabling irqs when it isn't neccessary
A regular spin_lock/unlock should do here as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:04 -04:00
Chunming Zhou
b46b8a877c drm/amdgpu: must update page table after gpu reset
Record the gpu reset count in vmid to identify if gpu reset happened.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:03 -04:00
Chunming Zhou
a0250d36bd drm/amdgpu: save/restore bios scratch when gpu reset
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:03 -04:00
Chunming Zhou
6adb0513a4 drm/amdgpu: must update page table after gpu reset
Record the gpu reset count in vmid to identify if gpu reset happened.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:02 -04:00
Christian König
847b6cf9fb drm/ttm: fix stupid parameter inversion in the pipeline code
We want to keep the newest fence, not the oldest one.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:01 -04:00
Alexandre Demers
880a076cde drm/amd/powerplay: fix typos in comment in polaris' hwmgr
Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:01 -04:00
Alexandre Demers
023efca251 drm/amd/powerplay: fix trivial typo and tidy comment
Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:05:45 -04:00
Frank Binns
7056bb5c82 drm/amd/amdgpu: Set DRIVER_MODESET feature flag at build time
This flag was being set unconditionally at runtime so just set it at
compile time instead.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:02:07 -04:00
Michel Dänzer
ee7fd95757 drm/amdgpu: Unpin BO if we can't get fences in amdgpu_crtc_page_flip
If reservation_object_get_fences_rcu failed, we'd previously go directly
to the cleanup label, so we'd leave the BO pinned.

While we're at it, remove two amdgpu_bo_unreserve calls in favour of two
new labels.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:02:06 -04:00
Alex Deucher
313c45fdb4 drm/amdgpu/gmc7: remove duplicate wait_for_idle functions
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:02:05 -04:00
Alex Deucher
34e3205e08 drm/amdgpu/gmc8: remove duplicate wait_for_idle functions
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:02:05 -04:00
Junwei Zhang
5a3f25dbcb drm/amdgpu/dce8: fix flash with white screen on monitor
Fixed mc stop and resume hardware programming sequence.

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:02:04 -04:00
Alex Deucher
9ecbe7f506 drm/amdgpu: skip invalid ip blocks in ip helpers
Skip IP blocks that are not enabled.

Reviewed-by: Chunming zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:02:04 -04:00
Alex Deucher
a225bf1c9c drm/amdgpu: add missing breaks
Saves a few CPU cycles.

Reviewed-by: Chunming zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:02:03 -04:00
Alex Deucher
5dbbb60ba6 drm/amdgpu: add IP helpers for wait_for_idle and is_idle
Helpers to to call the IP functions for the selected IP.

Reviewed-by: Chunming zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:02:02 -04:00
Alex Deucher
bfa833558c drm/amdgpu/powerplay/cz: add missing call to powergate VCE
Not enabled yet, but missing the call.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:02:02 -04:00
Alex Deucher
7359ee637d drm/amdgpu/dce11: update async flip update time
Use UPDATE_IMMEDIATE (update on next data request boundary) rather
than UPDATE_H_RETRACE (update on next line boundary).  The data
request boundary is less than a scanline, so it update will happen
sooner.

Cc: Vitaly Prosyak <vitaly.prosyak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:02:01 -04:00
Christian König
aff98ba1fd drm/ttm: wait for eviction in ttm_bo_force_list_clean
Now that we can pipeline evictions we need to wait for
them to finish when we cleanup a memory domain.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:02:00 -04:00
Christian König
9a79588c42 drm/amdgpu: don't update page tables for VM emulation
It's just overhead to do so and allocating a VMID
when we don't need one is actually a bit dangerous.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:02:00 -04:00
Christian König
d5b4e25d83 drm/amdgpu: implement HDP functions for UVD v2
Flush and invalidate the HDP caches.

v2: fix typo in comment

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:01:59 -04:00
Huang Rui
d1371f8c5d drm/amdgpu: change pcie_gen_cap magic code to macro
This patch changes pcie_gen_cap magic code to macro to make it more
readable.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Cc: Eric Huang <JinHuiEric.Huang@amd.com>
Cc: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:01:59 -04:00
Alex Deucher
4d54588e94 drm/amdgpu/gfx7: make gfx_v7_0_rlc_stop static
Not used outside of gfx7.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:01:58 -04:00
Alex Deucher
06120a1e0f drm/amdgpu/gfx7: switch to using the existing rlc callbacks
gfx8 already uses them.  Remove the direct exports and
use the callbacks fpr gfx7.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:01:57 -04:00
Alex Deucher
05fb7291fd drm/amdgpu: move select_se_sh into the gfx struct
It's gfx IP specific, not asic specific, so move to a
gfx callback.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:01:57 -04:00
Alex Deucher
b95e31fdda drm/amdgpu: move get_gpu_clock_counter into the gfx struct
It's gfx IP specific, not asic specific, so move to a
gfx callback.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:01:42 -04:00
Alex Deucher
4b7d97ac83 drm/amdgpu: drop wait_for_mc_idle asic callback
Only used in the gmc IP modules so just call the local
function directly.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:50 -04:00
Alex Deucher
ccd73f24ae drm/amdgpu/gmc: make some functions static
These are not used outside of the respective gmc ip modules.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:50 -04:00
Christian König
5a712a8727 drm/amdgpu: validate VM PTs only on eviction
We don't need to validate them again if the eviction counter didn't changed.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:49 -04:00
Christian König
dbd5ed60ac drm/amdgpu: add eviction counter
Keep track of the number of evictions since boot.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:49 -04:00
Chunming Zhou
0eaeb070ed drm/amdgpu: add amdgpu_irq_gpu_reset_resume_helper
irq need to update when gpu reset happens.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:48 -04:00
Arindam Nath
505bc983bf drm/amd/powerplay: make sure VCE is disabled by default
This patch is a port of similar patch for amdgpu
when PP is disabled. Since the code flow is little
different when PP is enabled, we need to make sure
the patch is applied for PP enabled path as well.

With the current code, when we boot with the amdgpu
driver enabled and loaded, the VCE also automatically
remains enabled since bootup. This can be verified from
the output of amdgpu_pm_info. It does not matter whether
we boot into command line directly or into X, the VCE
stays enabled the entire time.

This patch addresses the issue and makes sure that
VCE is turned on only during playback, and remains
disabled otherwise.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Arindam Nath <arindam.nath@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:47 -04:00
Arindam Nath
fb065ce7d3 drm/amd/amdgpu: make sure VCE is disabled by default
With the current code, when we boot with the amdgpu
driver enabled and loaded, the VCE also automatically
remains enabled since bootup. This can be verified from
the output of amdgpu_pm_info. It does not matter whether
we boot into command line directly or into X, the VCE
stays enabled the entire time.

This patch addresses the issue and makes sure that
VCE is turned on only during playback, and remains
disaled otherwise.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Arindam Nath <arindam.nath@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:47 -04:00
Alex Deucher
93dcc37d2c drm/amdgpu: disable compute pipeline sync workaround when using fixed fw
No need to stall the pipe when we are using firmware with the
fix.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:46 -04:00
Nicolai Hähnle
9de06de80e drm/amdgpu/gfx8: set USER_SHADER_ARRAY_CONFIG based on disable_cu parameter
v2: do not overwrite register when bitmap is zero

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:46 -04:00
Nicolai Hähnle
324c614a81 drm/amdgpu/gfx7: set USER_SHADER_ARRAY_CONFIG based on disable_cu parameter
v2: do not overwrite register when bitmap is zero

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:45 -04:00
Nicolai Hähnle
6f8941a230 drm/amdgpu: add disable_cu parameter
This parameter will allow disabling individual CUs on module load, e.g.
amdgpu.disable_cu=2.0.3,2.0.4 to disable CUs 3 and 4 of SE2.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:44 -04:00
Chunming Zhou
8b2ac10320 drm/amdgpu: evict vram when gpu reset
On workstation cards with ECC vram, the entirety of vram is cleared to 0
on asic init to set the ECC status correctly.  On non ECC boards, I don't
think they do any explicit clearing, but the vram controller is reset
which may cause issues with the data there.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:44 -04:00