Commit Graph

6 Commits

Author SHA1 Message Date
Olof Johansson
0f600f40d7 Merge tag 'tegra-for-3.8-fixes-for-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into fixes
ARM: tegra: fixes for 3.8

This branch contains a few miscellaneous fixes that have shown up in the
last few weeks.

By Sivaram Nair (2) and Hiroshi Doyu (1)
via Stephen Warren
* tag 'tegra-for-3.8-fixes-for-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
  amba: tegra-ahb: Fix warning w/o PM_SLEEP
  ARM: tegra: fix comment in dsib clk set_parent
  ARM: tegra: select correct parent clk for pll_p

Signed-off-by: Olof Johansson <olof@lixom.net>
2012-12-17 10:04:27 -08:00
Hiroshi Doyu
f110174910 amba: tegra-ahb: Fix warning w/o PM_SLEEP
Fix build warning w/o PM_SLEEP.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-26 14:01:07 -07:00
Stephen Warren
cc95e347cb ARM: tegra: move tegra-ahb.h out of arch/arm/mach-tegra/
We wish to empty arch/arm/mach-tegra/include/mach/ as much as possible
to enable single zImage. Move tegra-ahb.h to a more central location
(suggested by Arnd, OK'd by Greg KH), and actually make tegra-ahb.c
include the header to ensure client and provider agree on the prototype.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05 11:36:06 -07:00
hdoyu@nvidia.com
dec195dc41 amba: tegra-ahb: Remove empty *_remove()
Remove unnecessary empty function.

Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-06-11 11:48:40 -06:00
Hiroshi DOYU
89c788bab1 ARM: tegra: Add SMMU enabler in AHB
Add extern func, "tegra_ahb_enable_smmu()" to inform AHB that SMMU is
ready.

Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Cc: Felipe Balbi <balbi@ti.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-05-08 13:30:49 -06:00
Hiroshi DOYU
87d0bab2cb ARM: tegra: Add Tegra AHB driver
Tegra AHB Bus conforms to the AMBA Specification (Rev 2.0) Advanced
High-performance Bus (AHB) architecture.

The AHB Arbiter controls AHB bus master arbitration. This effectively
forms a second level of arbitration for access to the memory
controller through the AHB Slave Memory device. The AHB pre-fetch
logic can be configured to enhance performance for devices doing
sequential access. Each AHB master is assigned to either the high or
low priority bin. Both Tegra20/30 have this AHB bus.

Some of configuration params could be passed from DT too if needed.

Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Cc: Felipe Balbi <balbi@ti.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-05-08 13:30:49 -06:00