The module is a bridge between the RTC clock domain and the CPU interface
clock domain. ARM access the register of SYSRTC, GPSRTC and PWRC through
this module.
Signed-off-by: Zhiwu Song <zhiwu.song@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Reviewed-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
gpio controller handles the switch of gpio and pinmux. And drivers/pinctrl/pinmux-sirf.c
will contain both gpio and pinmux.
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Adds support for booting via device tree with a simple serial console.
Change-Id: I7f175b8db21928cd13e0fb49f3eed74966a2696f
Signed-off-by: David Brown <davidb@codeaurora.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Everything required to populate NVIDIA Tegra devices from the device
tree. This patch adds a new DT_MACHINE_DESC() which matches against
a tegra20 device tree. So far it only registers the on-chip devices,
but it will be refined in follow on patches to configure clocks and
pin IO from the device tree also.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
For testing the dt work, define a dt-enabled versatile platform.
This patch adds a new versatile platform for when using the device
tree. Add platform and amba devices are discovered and registered by
parsing the device tree. Clocks and initial io mappings are still
configured statically.
This patch still depends on some static platform_data for a few devices
which is passed via the auxdata structure to of_platform_populate(),
but it is a viable starting point until the drivers can get all
configuration data out of the device tree.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
SiRFprimaII is the latest generation application processor from CSR’s
Multifunction SoC product family. Designed around an ARM cortex A9 core,
high-speed memory bus, advanced 3D accelerator and full-HD multi-format
video decoder, SiRFprimaII is able to meet the needs of complicated
applications for modern multifunction devices that require heavy concurrent
applications and fluid user experience. Integrated with GPS baseband,
analog and PMU, this new platform is designed to provide a cost effective
solution for Automotive and Consumer markets.
This patch adds the basic support for this SoC and EVB board based on device
tree. It is following the ZYNQ of Xilinx in some degree.
Signed-off-by: Binghua Duan <Binghua.Duan@csr.com>
Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com>
Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com>
Signed-off-by: Yuping Luo <Yuping.Luo@csr.com>
Signed-off-by: Bin Shi <Bin.Shi@csr.com>
Signed-off-by: Huayi Li <Huayi.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
The 1st board support is minimal to get a system up and running
on the Xilinx platform.
This platform reuses the clock implementation from plat-versatile, and
it depends entirely on CONFIG_OF support. There is only one board
support file which obtains all device information from a device tree
dtb file which is passed to the kernel at boot time.
Signed-off-by: John Linn <john.linn@xilinx.com>
