Commit Graph

79 Commits

Author SHA1 Message Date
Chris Wilson
85fd4f58d7 drm/i915: Mark all non-vma being inserted into the address spaces
We need to distinguish between full i915_vma structs and simple
drm_mm_nodes when considering eviction (i.e. we must be careful not to
treat a mere drm_mm_node as a much larger i915_vma causing memory
corruption, if we are lucky). To do this, color these not-a-vma with -1
(I915_COLOR_UNEVICTABLE).

v2...v200: New name for -1.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20161205142941.21965-1-chris@chris-wilson.co.uk
2016-12-05 20:49:17 +00:00
Tvrtko Ursulin
12d79d7828 drm/i915: Make GEM object create and create from data take dev_priv
Makes all GEM object constructors consistent.

v2: Fix compilation in GVT code.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> (v1)
2016-12-01 18:01:08 +00:00
Robert Bragg
a941795a3a drm/i915: rename OACONTROL GEN7_OACONTROL
OACONTROL changes quite a bit for gen8, with some bits split out into a
per-context OACTXCONTROL register. Rename now before adding more gen7 OA
registers

Signed-off-by: Robert Bragg <robert@sixbynine.org>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Sourab Gupta <sourab.gupta@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20161107194957.3385-3-robert@sixbynine.org
2016-11-22 14:29:29 +01:00
Zhenyu Wang
53e86ada8e drm/i915/gvt: remove unresolved vfio pin/unpin pages interface dependency
Instead of partially depending on vfio pin/unpin pages interface if
mdev is available, which would result in failure if vfio is not
on. But replace with a wrapper which need to be fixed till mdev
support got fully merged.

Cc: Jike Song <jike.song@intel.com>
Cc: Xiaoguang Chen <xiaoguang.chen@intel.com>
Reviewed-by: Xiaoguang Chen <Xiaoguang.chen@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-11-17 15:51:16 +08:00
Jani Nikula
955c1dd15d drm/i915/gvt: drop checks for early Skylake revisions
We no longer cater for pre-production revisions of Skylake.

Fixes: d4362225e8 ("drm/i915/gvt: update misc ctl regs base on stepping info")
Cc: Ping Gao <ping.a.gao@intel.com>
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: Zhi Wang <zhi.a.wang@intel.com>
Cc: <intel-gfx@lists.freedesktop.org>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-11-17 13:55:01 +08:00
Pei Zhang
0aaee4cc83 drm/i915/gvt: check workload empty before real scan
This patch will fix warning log print during command scan caused by
empty workload (ring head equals tail). This patch avoid going into
real scan process if workload is empty. It's guest's responsibility
to make sure if an empty workload is proper to submit to HW.

[v2] modify the patch description. It's a fix, not a w/a.

Signed-off-by: Pei Zhang <pei.zhang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-11-16 11:45:29 +08:00
Xiaoguang Chen
a3614a868f drm/i915/gvt: clear guest opregion
Since there's no opregion in vgpu so clear the opregion bits in case
guest access it.

Signed-off-by: Xiaoguang Chen <xiaoguang.chen@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-11-14 18:06:44 +08:00
Ping Gao
a045fba47d drm/i915/gvt: add more MMIO regs with command access flag
Add more MMIO regs with command access flag for whitelist as they are
accessed by command.

Signed-off-by: Ping Gao <ping.a.gao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-11-14 18:06:44 +08:00
Zhenyu Wang
ee145f66e7 drm/i915/gvt: Fix static checker warning on intel_gvt_i2c_handle_aux_ch_write()
Static checker gave warning on:

drivers/gpu/drm/i915/gvt/edid.c:506 intel_gvt_i2c_handle_aux_ch_write()
warn: odd binop '0x0 & 0xff'

We try to return ACK for I2C reply which is defined with 0. Remove
bit shift which caused misleading bit op.

Cc: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-11-14 18:06:44 +08:00
Du, Changbin
f4b0c2860b drm/i915/gvt: fix mem leakage in setup_vgpu_mmio for vgpu reset
Gvt gdrst handler handle_device_reset() invoke function
setup_vgpu_mmio() to reset mmio status. In this case,
the virtual mmio memory has been allocated already. The
new allocation just cause old mmio memory leakage.

Signed-off-by: Du, Changbin <changbin.du@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-11-14 18:06:43 +08:00
Du, Changbin
0427f06aec drm/i915/gvt: fix crash in vgpu_reset_execlist
We initiate vgpu->workload_q_head via for_each_engine
macro which may skip unavailable engines. So we should
follow this rule anywhere. The function
intel_vgpu_reset_execlist is not aware of this. Kernel
crash when touch a uninitiated vgpu->workload_q_head[x].
Let's fix it by using for_each_engine_masked and skip
unavailable engine ID. Meanwhile rename ring_bitmap to
general name engine_mask.

v2: remove unnecessary engine activation check (zhenyu)

Signed-off-by: Du, Changbin <changbin.du@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-11-14 18:06:43 +08:00
Ping Gao
4f3f1aed4b drm/i915/gvt: emulate right behavior for tlb_control
Emulate right behavior for tlb_control, set to ZERO upon write.

Signed-off-by: Ping Gao <ping.a.gao@intel.com>
Signed-off-by: Min He <min.he@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-11-14 18:06:43 +08:00
Pei Zhang
90d27a1b18 drm/i915/gvt: fix deadlock in workload_thread
It's a classical abba type deadlock when using 2 mutex objects, which
are gvt.lock(a) and drm.struct_mutex(b). Deadlock happens in threads:
1. intel_gvt_create/destroy_vgpu: P(a)->P(b)
2. workload_thread: P(b)->P(a)

Fix solution is align the lock acquire sequence in both threads. This
patch choose to adjust the sequence in workload_thread function.

This fixed lockup symptom for guest-reboot stress test.

v2: adjust sequence in workload_thread based on zhenyu's suggestion.
    adjust sequence in create/destroy_vgpu function.
v3: fix to still require struct_mutex for dispatch_workload()

Signed-off-by: Pei Zhang <pei.zhang@intel.com>
[zhenyuw: fix unused variables warnings.]
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-11-14 18:02:57 +08:00
Jike Song
f30437c5e7 drm/i915/gvt: add KVMGT support
KVMGT is the MPT implementation based on VFIO/KVM. It provides
a kvmgt_mpt ops to gvt for vGPU access mediation, e.g. to
mediate and emulate the MMIO accesses, to inject interrupts
to vGPU user, to intercept the GTT writing and replace it with
DMA-able address, to write-protect guest PPGTT table for
shadowing synchronization, etc. This patch provides the MPT
implementation for GVT, not yet functional due to theabsence
of mdev.

It's built as kvmgt.ko, depends on vfio.ko, kvm.ko and mdev.ko,
and being required by i915.ko. To not introduce hard dependency
in i915.ko, we used indirect symbol reference. But that means
users have to include kvmgt.ko into init ramdisk if their
i915.ko is included.

Signed-off-by: Kevin Tian <kevin.tian@intel.com>
Signed-off-by: Xiaoguang Chen <xiaoguang.chen@intel.com>
Signed-off-by: Jike Song <jike.song@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-11-10 15:45:39 +08:00
Jike Song
9ec1e66b80 drm/i915/gvt: refactor intel_gvt_io_emulation_ops to be intel_gvt_ops
There are currently 4 methods in intel_gvt_io_emulation_ops
to emulate CFG/MMIO reading/writing for intel vGPU. A possibly
better scope is: add 3 more methods for vgpu create/destroy/reset
respectively, and rename the ops to 'intel_gvt_ops', then pass
it to the MPT module (say the future kvmgt) to use: they are
all methods for external usage.

Signed-off-by: Jike Song <jike.song@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-11-10 15:45:15 +08:00
Jike Song
7b3343b7e8 drm/i915/gvt: allow several MPT methods to be NULL
Hypervisors are different, the MPT ops is a only superset of
all possibly supported hypervisors. There might be other way
out of the MPT to achieve same target. e.g. vfio-based kvmgt
won't provide map_gfn_to_mfn method to establish guest EPT
mapping for aperture, since it will be done in QEMU/KVM, MMIO
is also trapped elsewhere, etc.

Signed-off-by: Jike Song <jike.song@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-11-10 15:45:14 +08:00
Jike Song
40df6ea07a drm/i915/gvt: introduce host_init/host_exit to MPT
GVT host needs init/exit hooks to do some initialization/cleanup
work, e.g.: vfio mdev host device register/unregister.

Signed-off-by: Jike Song <jike.song@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-11-10 15:45:13 +08:00
Jike Song
8f89743bdd drm/i915/gvt: remove obsolete code for old kvmgt opregion
Current GVT contains some obsolete logic originally cooked to
support the old, non-vfio kvmgt, which is actually workarounds.
We don't support that anymore, so it's safe to remove it and
make a better framework.

Signed-off-by: Jike Song <jike.song@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-11-10 15:45:12 +08:00
Zhenyu Wang
1f31c82948 drm/i915/gvt: add intel vgpu types support
By providing predefined vGPU types, users can choose which type a vgpu
to create and use, without specifying detailed parameters.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Jike Song <jike.song@intel.com>
2016-11-10 15:44:54 +08:00
Xiaoguang Chen
c754936fe6 drm/i915/gvt: use kmap instead of kmap_atomic around guest memory access
kmap_atomic doesn't allow sleep until unmapped. However,
it's necessary to allow sleep during reading/writing guest
memory, so use kmap instead.

Signed-off-by: Bing Niu <bing.niu@intel.com>
Signed-off-by: Xiaoguang Chen <xiaoguang.chen@intel.com>
Signed-off-by: Jike Song <jike.song@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-11-10 15:42:39 +08:00
Bing Niu
9baf0920b5 drm/i915/gvt: don't rely on guest PPGTT entry to free old shadow data
On guest writing a PPGTT entry, if it contains value and the old
entry is valid, gvt will read it and find & free the corresponding
old data for it. However, with the KVM write protection provided
by page_track, the guest entry will be written with new value
before gvt handling. To avoid that, we should use the shadow
entry instead.

Signed-off-by: Bing Niu <bing.niu@intel.com>
Signed-off-by: Jike Song <jike.song@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-11-10 15:39:46 +08:00
Ping Gao
3b6411c2c2 drm/i915/gvt: implement scratch page table tree for shadow PPGTT
All the unused entries in the page table tree(PML4E->PDPE->PDE->PTE)
should point to scratch page table/scratch page to avoid page walk error
due to the page prefetching.
When removing an entry in shadow PPGTT,  it need map to scratch page
also, the older implementation use single scratch page to assign to all
level entries, it doesn't align the page walk behavior when removed
entry is in PML, PDP, PD.  To avoid potential page walk error this patch
implement a scratch page tree to replace the single scratch page.

v2: more details in commit message address Kevin's comments.

Signed-off-by: Ping Gao <ping.a.gao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-11-07 14:17:02 +08:00
Du, Changbin
2fb39fad06 drm/i915/gvt: emulate vgpu engine reset control behavior
When SW wishes to reset the render engine, it will program
engine's reset control register and wait response from HW.
We need emulate the behavior of this register so guest i915
driver could walk through the engine reset flow. The registers
are not emulated in gvt yet, this patch add the emulation
logic.

v2: add more desc info in commit message.

Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Signed-off-by: Du, Changbin <changbin.du@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-11-07 14:17:01 +08:00
Zhenyu Wang
9b172345ca drm/i915/gvt: Fix workload status after wait
From commit e95433c73a, workload status setting
was changed to only capture on error path, but we need to set it properly in
normal path too, otherwise we'll fail to complete workload which could lead
guest VM vGPU reset.

v2: uses braces and add Fixes tag.

Fixes: e95433c73a ("drm/i915: Rearrange i915_wait_request() accounting with callers")
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-11-07 14:17:00 +08:00
Ping Gao
d4362225e8 drm/i915/gvt: update misc ctl regs base on stepping info
Misc ctl related registers are for WA purpose, should detect the
stepping info first before updating HW value.

Signed-off-by: Ping Gao <ping.a.gao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-11-07 14:16:59 +08:00
Ping Gao
f24940e000 drm/i915/gvt: correct the emulation in TLB control handler
Need a explicit write_vreg in TLB MMIO write handler, beside that
TLB vreg should update correspondingly following HW status to do
correct emulation.

Signed-off-by: Ping Gao <ping.a.gao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-11-07 14:16:59 +08:00
Ping Gao
5f399f1158 drm/i915/gvt: add write vreg in MMIO DMA_CTRL handler
Missing write_vreg in DMA_CTRL write handler would make obsolete
value return when read vreg.

v2: get data from vreg after updating it.

Signed-off-by: Ping Gao <ping.a.gao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-11-07 14:16:58 +08:00
Ping Gao
337d066527 drm/i915/gvt: remove unused variable 'execlist'
Remove the variable 'execlist' as it's unused in function
vgpu_has_pending_workload.

Signed-off-by: Ping Gao <ping.a.gao@intel.com>
Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-11-07 14:16:57 +08:00
Zhenyu Wang
173bcc6018 drm/i915/gvt: Fix shift for cmd data size
This is to fix smatch warning on

     drivers/gpu/drm/i915/gvt/cmd_parser.c:1421 cmd_handler_mi_op_2f()
     warn: shift has higher precedence than mask

We need bits 20-19 mask for data size.

Cc: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-11-07 14:16:56 +08:00
Chris Wilson
e95433c73a drm/i915: Rearrange i915_wait_request() accounting with callers
Our low-level wait routine has evolved from our generic wait interface
that handled unlocked, RPS boosting, waits with time tracking. If we
push our GEM fence tracking to use reservation_objects (required for
handling multiple timelines), we lose the ability to pass the required
information down to i915_wait_request(). However, if we push the extra
functionality from i915_wait_request() to the individual callsites
(i915_gem_object_wait_rendering and i915_gem_wait_ioctl) that make use
of those extras, we can both simplify our low level wait and prepare for
extending the GEM interface for use of reservation_objects.

v2: Rewrite i915_wait_request() kerneldocs

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20161028125858.23563-4-chris@chris-wilson.co.uk
2016-10-28 20:53:43 +01:00
Du, Changbin
e45d7b7f47 drm/i915/gvt: fix nested sleeping issue
We cannot use blocking method mutex_lock inside a wait loop.
Here we invoke pick_next_workload() which needs acquire a
mutex in our "condition" experssion. Then we go into a another
of the going-to-sleep sequence and changing the task state.
This is a dangerous. Let's rewrite the wait sequence to avoid
nested sleeping.

v2: fix do...while loop exit condition (zhenyu)
v3: rebase to gvt-staging branch

Signed-off-by: Du, Changbin <changbin.du@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-10-27 11:20:42 +08:00
Bing Niu
6fb5082a8c drm/i915/gvt: throw error basing on execlist submit result
throw error message in elsp emulation handler basing on execlist
submit result. guest will trigger tdr process for recovering, gvt
just follow guest's desire.

v2: populate error to top of mmio emulation logic, comments from
zhenyu

Signed-off-by: Bing Niu <bing.niu@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-10-27 11:20:42 +08:00
Ping Gao
23736d1b1b drm/i915/gvt: add full vGPU reset support
Full vGPU reset need to release all the shadow PPGGT pages to avoid
unnecessary write-protect and also should re-initialize pvinfo after
resetting vregs to keep pvinfo correct.

Signed-off-by: Ping Gao <ping.a.gao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-10-27 11:20:19 +08:00
Ping Gao
0a8b66e3ad drm/i915/gvt: correct the reset logic
The current_vgpu will set to NULL after stopping the scheduler when
the reset is triggered by current vgpu, so here need change the
judgement condition for current vgpu detection.

Signed-off-by: Ping Gao <ping.a.gao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-10-26 13:36:41 +08:00
Ping Gao
40d2428b3a drm/i915/gvt: add vreg write for GDRST handler
The emulation handler for MMIO GDRST miss vreg write in it, as result
the vreg cannot update correspondingly.

Signed-off-by: Ping Gao <ping.a.gao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-10-26 13:33:05 +08:00
Xiaoguang Chen
b0122f3114 drm/i915/gvt: fix detect_host calling logic
Like other routines, intel_gvt_hypervisor_detect_host returns 0
for success.

Signed-off-by: Xiaoguang Chen <xiaoguang.chen@intel.com>
Signed-off-by: Jike Song <jike.song@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-10-26 13:23:04 +08:00
Min He
64fafcf5a2 drm/i915/gvt: fix an typo in skl_decode_mi_display_flip
Fix type to set correct pipe number.

Signed-off-by: Min He <min.he@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-10-26 13:12:03 +08:00
Du, Changbin
49129204c3 drm/i915/gvt: get msi cap offset from pdev directly
Linux PCI driver saves the msi and msix capability offset
in pci_dev->msi_cap and pci_dev->msix_cap. We can use msi_cap
in pci_dev directly, no need hardcode.

Signed-off-by: Du, Changbin <changbin.du@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-10-25 10:37:42 +08:00
Du, Changbin
99c79fd4df drm/i915/gvt: use well wrapped set_mask_bits() instead of defining new one
Macro set_mask_bits() is ready for us, just invoke it and remove
our write_bits().

Signed-off-by: Du, Changbin <changbin.du@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-10-25 10:37:42 +08:00
Jérémy Lefaure
2cce9b2894 drm/i915/gvt: fix an error string format
It is better to use %p format for void pointers instead of casting them
because a void* is not necessary a 64 bits value.

Signed-off-by: Jérémy Lefaure <jeremy.lefaure@lse.epita.fr>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-10-25 10:35:54 +08:00
Jérémy Lefaure
31f09cb79e drm/i915/gvt: fix bad 32 bit shift in gtt
Since ioread32 returns a 32-bit value, it is impossible to left-shift
this value by 32 bits (it produces a compilation error). Casting the
return value of ioread32 fix this issue.

Signed-off-by: Jérémy Lefaure <jeremy.lefaure@lse.epita.fr>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-10-25 10:35:54 +08:00
Zhenyu Wang
946260e5fb drm/i915/gvt: Fix broken mocs offset
Fix missed mocs offset reg setting for save/restore function.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-10-24 10:45:44 +08:00
Arkadiusz Hiler
1c860a306e drm/i915/gvt: Implement WaForceWakeRenderDuringMmioTLBInvalidate
When invalidating RCS TLB the device can enter RC6 state interrupting
the process, therefore the need for render forcewake for the whole
procedure.

This WA is needed for all production SKL SKUs.

v2: reworked putting and getting forcewake with help of Mika Kuoppala
v3: use I915_READ_FW and I915_WRITE_FW as we are handling forcewake on
    in the code path

References: HSD#2136899, HSD#1404391274
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-10-24 10:45:26 +08:00
Zhenyu Wang
d1bbef6d15 drm/i915/gvt: Fix failure when ACPI is not enabled
Directly use memremap instead of acpi function for opregion mapping.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-10-24 10:43:47 +08:00
Du, Changbin
19e6393fb5 drm/i915/gvt: do not ignore return value of create_scratch_page
Function create_scratch_page() may fail in some cases.

Signed-off-by: Du, Changbin <changbin.du@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-10-20 17:31:36 +08:00
Du, Changbin
76a79d59ad drm/i915/gvt: fix spare warnings on odd constant _Bool cast
The function return values should has type int if it return
a integer value.

Signed-off-by: Du, Changbin <changbin.du@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-10-20 17:31:36 +08:00
Du, Changbin
999ccb4017 drm/i915/gvt: mark symbols static where possible
Mark all local functions & variables as static.

Signed-off-by: Du, Changbin <changbin.du@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-10-20 17:31:36 +08:00
Du, Changbin
321927db98 drm/i915/gvt: fix sparse warnings on different address spaces
Add proper __iomem annotation for pointers obtained via ioremap().

Signed-off-by: Du, Changbin <changbin.du@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-10-20 17:31:35 +08:00
Zhenyu Wang
0fac21e7e9 drm/i915/gvt: properly access enabled intel_engine_cs
Switch to use new for_each_engine() helper to properly access
enabled intel_engine_cs as i915 core has changed that to be
dynamic managed. At GVT-g init time would still depend on ring
mask to determine engine list as it's earlier.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-10-20 17:31:35 +08:00
Chris Wilson
3eec872207 drm/i915/gvt: Remove defunct vmap_batch()
This code was removed from i915_cmd_parser.c but still an obsolete
version wound up being duplicated into gvt/cmd_parser.c. Good riddance.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2016-10-20 17:31:35 +08:00