the following changes:
- Add sched_clock selection logic to select the highest frequency clock
- Use full 64-bit arch timer counter for sched_clock
- Convert arch timer, sp804 and integrator-cp timers to CLKSRC_OF and
adapt all users to use clocksource_of_init
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Merge tag 'clksrc-cleanup-for-3.10-part2' of git://sources.calxeda.com/kernel/linux into late/clksrc
This is the 2nd part of ARM timer clean-ups for 3.10. This series has
the following changes:
- Add sched_clock selection logic to select the highest frequency clock
- Use full 64-bit arch timer counter for sched_clock
- Convert arch timer, sp804 and integrator-cp timers to CLKSRC_OF and
adapt all users to use clocksource_of_init
* tag 'clksrc-cleanup-for-3.10-part2' of git://sources.calxeda.com/kernel/linux:
devtree: add binding documentation for sp804
ARM: integrator-cp: convert use CLKSRC_OF for timer init
ARM: versatile: use OF init for sp804 timer
ARM: versatile: add versatile dtbs to dtbs target
ARM: vexpress: remove extra timer-sp control register clearing
ARM: dts: vexpress: disable CA9 core tile sp804 timer
ARM: vexpress: remove sp804 OF init
ARM: highbank: use OF init for sp804 timer
ARM: timer-sp: convert to use CLKSRC_OF init
OF: add empty of_device_is_available for !OF
ARM: convert arm/arm64 arch timer to use CLKSRC_OF init
ARM: make machine_desc->init_time default to clocksource_of_init
ARM: arch_timer: use full 64-bit counter for sched_clock
ARM: make sched_clock just call a function pointer
ARM: sched_clock: allow changing to higher frequency counter
Signed-off-by: Olof Johansson <olof@lixom.net>
This has a nasty set of conflicts with the exynos MCT code, which was
moved in a separate branch, and then fixed up when merged in, but still
conflicts a bit here. It should have been sorted out by this merge though.
This converts arm and arm64 to use CLKSRC_OF DT based initialization for
the arch timer. A new function arch_timer_arch_init is added to allow for
arch specific setup.
This has a side effect of enabling sched_clock on omap5 and exynos5. There
should not be any reason not to use the arch timers for sched_clock.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Simon Horman <horms@verge.net.au>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-samsung-soc@vger.kernel.org
Cc: linux-omap@vger.kernel.org
Cc: linux-sh@vger.kernel.org
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
This series adds support for the pinctrl/gpio module on all arch-vt8500
supported SoCs.
As part of the review process, some tidy up is also done to
drivers/of/base.c to remove some code that is being constantly duplicated.
Also, a patch for the bcm2835 pinctrl driver is included to take advantage
of the new of/base.c code.
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Merge tag 'vt8500/pinctrl' of git://server.prisktech.co.nz/git/linuxwmt into next/drivers
From Tony Prisk <linux@prisktech.co.nz>:
arm: vt8500: Add pinctrl driver for arch-vt8500
This series adds support for the pinctrl/gpio module on all arch-vt8500
supported SoCs.
As part of the review process, some tidy up is also done to
drivers/of/base.c to remove some code that is being constantly duplicated.
Also, a patch for the bcm2835 pinctrl driver is included to take advantage
of the new of/base.c code.
* tag 'vt8500/pinctrl' of git://server.prisktech.co.nz/git/linuxwmt: (606 commits)
pinctrl: bcm2835: make use of of_property_read_u32_index()
gpio: vt8500: Remove arch-vt8500 gpio driver
arm: vt8500: Remove gpio devicetree nodes
arm: dts: vt8500: Update Wondermedia SoC dtsi files for pinctrl driver
pinctrl: gpio: vt8500: Add pincontrol driver for arch-vt8500
arm: vt8500: Increase available GPIOs on arch-vt8500
of: Remove duplicated code for validating property and value
of: Add support for reading a u32 from a multi-value property.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The platform data for the INTC irq pin driver
seems to be global symbols, make it static to
allow multi-soc build.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The platform data for the INTC irq pin driver
seems to be global symbols, make it static to
allow multi-soc build.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Update the r8a7779 IRQ code to make use of the
INTC External IRQ pin driver for external
interrupt pins IRQ0 -> IRQ3.
The r8a7779 SoC can like older SH SoCs configure
to use the IRQ0 -> IRQ3 signals as individual
interrupts or a combined IRL mode.
Without this patch the r8a7779 SoC code does
not fully support external IRQ pins in individual
IRQ mode. The r8a7779 PFC code does not yet have
gpio_to_irq() support so no need to update such
code.
At this point the DT reference implementations
are not covered. In the future such code shall
tie in the INTC External IRQ pin driver via
DT, so this kind of verbose code is not needed
for the long term DT case.
Signed-off-by: Magnus Damm <damm@opensource.se>
Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Adjust the sh73a0 IRQ code to make use of the
INTC External IRQ pin driver for external
interrupt pins IRQ0 -> IRQ31.
This removes quite a bit of special-case code
in intc-sh73a0.c but the number of lines get
replaced with platform device information in
setup-sh73a0.c. The PFC code is also adjusted
to make gpio_to_irq() return the correct
interrupt number.
At this point the DT reference implementations
are not covered. In the future such code shall
tie in the INTC External IRQ pin driver via
DT, so this kind of verbose code is not needed
for the long term DT case.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the macro irq_pin() to let board-specific code using
platform devices tie in external IRQn pins in a common way.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
[Rename device from to rcarfb to rcar-du]
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
[Manual conflict resolution]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Commit "ARM: shmobile: r8a7779: use gic_iid macro" switched R8A7779 platform
devices to using gic_iid() macro instead of gic_spi() but commit "ARM: mach-
shmobile: r8a7779: add SATA support" added another use of gic_spi(). Convert
the SATA IRQ resource to using gic_iid().
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add SATA clock for r8a7779 SoC (for both device tree and usual cases).
Register SATA controller as a "late" platform device on r8a7779 SoC.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
move r8a7740_meram_workaround() to r8a7740 area
from r8a7779 area
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
"ARM: shmobile: add gic_iid macro for ICCIAR / interrupt ID"
enabled to use gic_iid macro.
This patch exchange current GIC interrupt setting
from gic_spi() to gic_iid()
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[ horms+renesas@verge.net.au: Updated git commit id in changelog ]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
R-Car H1 datasheet GIC number is indicating
GIC ICCIAR / interrupt ID number, not SPI number,
but current marzen board code is using gic_spi() with
un-understandable calculation.
This patch adds new gic_iid() macro which means
ICCIAR / interrupt ID, and used the number
currently written on datasheet.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[ horms+renesas@verge.net.au: Split board-marzen.c portion into a separate patch ]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This adds temporarily the alternative device names to the clock list
that are used when booting via Device Tree setup.
Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Each CPU Hotplug implementation for mach-shmobile
is now self-contained, so this change removes unused
helper code in hotplug.c. The two CPU Hotplug capable
SoCs sh73a0 and r8a7779 remain unchanged.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Update the r8a7779 SMP code and CPU Hotplug in particular
to follow the same style as sh73a0. This means dropping
__maybe_unused for #ifdef CONFIG_HOTPLUG_CPU.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Convert the sh73a0 CPU Hotplug code to use a local
implementation of ->cpu_disable(). With this change
in place the sh73a0 SMP code does no longer depend
on hotplug.c.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Update the SMP code for R8A7779 to make use of the
shared SCU function scu_power_mode() together with
the early setup code in shmobile_secondary_vector_scu.
With this patch in place the secondary CPUs modify the
SCU setting during early boot instead of letting other
CPUs deal with the coherency setting before boot. In
other words, we used to setup coherency before boot
in r8a7779_boot_secondary() but that bit is now instead
handled by the code in shmobile_secondary_vector_scu.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Update the r8a7779 CPU Hotplug code to use SCU PSR
to wait for the target CPU core. Previously the
shared code in hotplug.c was used to let cpu_kill()
wait for cpu_die(). With this change in place the
r8a7779 SMP code does not depend on hotplug.c anymore.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Rework the IOMEM() usage for the SCU base address in the
case of r8a7779. Adjusts the TWD to use R8A7779_SCU_BASE.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Rework the IOMEM() usage for the SCU base address in the
case of sh73a0. Removes recently introduced build warnings:
arch/arm/mach-shmobile/smp-sh73a0.c:45:15: warning: initialization makes integer from pointer without a cast [enabled by default]
arch/arm/mach-shmobile/smp-sh73a0.c:45:15: warning: (near initialization for 'twd_local_timer.res[0].start') [enabled by default]
arch/arm/mach-shmobile/smp-sh73a0.c:45:15: warning: initialization makes integer from pointer without a cast [enabled by default]
/arch/arm/mach-shmobile/smp-sh73a0.c:45:15: warning: (near initialization for 'twd_local_timer.res[0].end') [enabled by default]
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Rework the early SCU setup code in headsmp-scu.S to read
the base address in the same way as we use to fetch the
address of the invalidation function.
Reported-by: Bastian Hecht <hechtb@gmail.com>
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Do not initialise any early devices when using the minimal DT reference
code. Only the delay needs to be initialised.
Cc: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Do not initialise any early devices when using the minimal DT reference
code. Only the delay needs to be initialised.
Cc: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Remove warning about SMP not working with the
clock initialisation sheme used for reference DT.
This is resolved by not selecting CONFIG_PREEMPT.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This is not needed as irq_set_wake is
only used for suspend to ram which is not
a requirement for bringing up boards using DT.
Reported-by: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Z and ZG clocks on sh73a0 have pll0 as their parent, not pll1.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Adjust emev2_init_delay() and emev2_add_standard_devices_dt()
to become static. They are not used outside this file anyway.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Update the SMP code for EMEV2 to make use of the
shared SCU function scu_power_mode() together with
the early setup code in shmobile_secondary_vector_scu.
With this patch in place the secondary CPUs modify the
SCU setting during early boot instead of letting other
CPUs deal with the coherency setting before boot. In
other words, we used to setup coherency before boot
in emev2_boot_secondary() but that bit is now instead
handled by the code in shmobile_secondary_vector_scu.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Update the code in headsmp-scu.S to use a global
shmobile_scu_base variable both for convenient SCU
base address storage and for the early SCU setup
code in shmobile_secondary_vector_scu.
With this patch applied r8a7779, sh73a0 and EMEV2
all make use of the global shmobile_scu_base
variable. However only sh73a0 makes use of the SCU
bring up code in shmobile_secondary_vector_scu.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Rename headsmp-sh73a0.S into headsmp-scu.S and
introduce shmobile_secondary_vector_scu().
The goal is to be able to share the function
above between all mach-shmobile SoCs that use
SCU for SMP. So far only sh73a0 use this.
At this time the SCU base address is still hard
coded in headsmp-scu.S to 0xf0000000, but this
will be changed in the future.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Rename the static scu_base variable into shmobile_scu_base.
Later in the series the shmobile_scu_base variable will be
made into a global variable so this is preparation only.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace scu_base_addr() with a static shmobile_scu_base
variable and introduce R8A7779_SCU_BASE.
Later in the series the shmobile_scu_base variable will be
made into a global variable so this is preparation only.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace scu_base_addr() with a static shmobile_scu_base
variable and introduce SH73A0_SCU_BASE.
Later in the series the shmobile_scu_base variable will be
made into a global variable so this is preparation only.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Allow a minimal setup of the r8a7779 SoC using a flattened device tree.
In particular, configure the i2c and ethernet controllers using a
flattened device tree.
SCI serial controller and TMU clock source, whose drivers do not yet
support configuration using a flattened device tree, are still configured
using C code in order to allow booting of a board with this SoC.
The ethernet controller also requires a regulator which is a board property.
A sample snippet DT for the marzen board is as follows:
/dts-v1/;
/include/ "r8a7779.dtsi"
/ {
fixedregulator3v3: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
};
&lan0 {
vddvario-supply = <&fixedregulator3v3>;
vdd33a-supply = <&fixedregulator3v3>;
};
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This allows the GIC interrupt controller of the r8a7779 SoC to be
initialised using a flattened device tree blob.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v3
* Fix copy-paste error and use unique reg values for each CPU
v2
As suggested by Mark Rutland
* Add reg and device_type to cpus
* Remove #address-cells from gic
Reduce the number of lines of code in smp-emev2.c
by getting rid of the emev2_get_core_count() function.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reduce the number of lines of code in smp-r8a7779.c
by getting rid of the r8a7779_get_core_count() function.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reduce the number of lines of code in smp-sh73a0.c
by getting rid of the sh73a0_get_core_count() function.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Move the boot vector setup code for the EMEV2 SoC to match
the sh73a0 and r8a7779 implementations. With this in place
all SoC specific SMP implementations for mach-shmobile uses
the ->smp_prepare_cpus() callback to setup the boot vector.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Remove partial CPU hotplug support from EMEV2 SMP code.
The upstream EMEV2 SMP support code has no CPU shutdown or
reset ability so we cannot reboot the secondary CPU cores.
Regular SMP operation is however still working as expected.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This file has no SoC-specific references in it, and
fortunately it is still independent of OF so there
is no real reason to drag in these headers.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
mmc/host.h provides MMC_CAP_SD_HIGHSPEED which is used in board-marzen.c
This resolves a build problem observed when compiling with
"mmc: tmio: remove unused and deprecated symbols" applied.
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Besides some fixes and cleanups in the code there are three more
important changes to point out this time:
* New IOMMU driver for the ARM SHMOBILE platform
* An IOMMU-API extension for non-paging IOMMUs (required for
upcoming PAMU driver)
* Rework of the way the Tegra IOMMU driver accesses its
registetrs - register windows are easier to extend now.
There are also a few changes to non-iommu code, but that is acked by the
respective maintainers.
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Merge tag 'iommu-updates-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull IOMMU Updates from Joerg Roedel:
"Besides some fixes and cleanups in the code there are three more
important changes to point out this time:
* New IOMMU driver for the ARM SHMOBILE platform
* An IOMMU-API extension for non-paging IOMMUs (required for
upcoming PAMU driver)
* Rework of the way the Tegra IOMMU driver accesses its
registetrs - register windows are easier to extend now.
There are also a few changes to non-iommu code, but that is acked by
the respective maintainers."
* tag 'iommu-updates-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (23 commits)
iommu/tegra: assume CONFIG_OF in SMMU driver
iommu/tegra: assume CONFIG_OF in gart driver
iommu/amd: Remove redundant NULL check before dma_ops_domain_free().
iommu/amd: Initialize device table after dma_ops
iommu/vt-d: Zero out allocated memory in dmar_enable_qi
iommu/tegra: smmu: Fix incorrect mask for regbase
iommu/exynos: Make exynos_sysmmu_disable static
ARM: mach-shmobile: r8a7740: Add IPMMU device
ARM: mach-shmobile: sh73a0: Add IPMMU device
ARM: mach-shmobile: sh7372: Add IPMMU device
iommu/shmobile: Add iommu driver for Renesas IPMMU modules
iommu: Add DOMAIN_ATTR_WINDOWS domain attribute
iommu: Add domain window handling functions
iommu: Implement DOMAIN_ATTR_PAGING attribute
iommu: Check for valid pgsize_bitmap in iommu_map/unmap
iommu: Make sure DOMAIN_ATTR_MAX is really the maximum
iommu/tegra: smmu: Change SMMU's dependency on ARCH_TEGRA
iommu/tegra: smmu: Use helper function to check for valid register offset
iommu/tegra: smmu: Support variable MMIO ranges/blocks
iommu/tegra: Add missing spinlock initialization
...
These updates are all for board specific code, including
* defconfig updates for shmobile, davinci, bcm2835, imx, omap and tegra
* SD/MMC and I2C support on bcm2835 (Raspberry PI)
* minor updates for PXA
* shmobile updates to GPIO usage in board files
* More things in OMAP board files are moved over to device tree probing
* Better support for audio devices on some OMAP platforms
Conflicts include the omap board-apollon.c file that is removed without
a replacement, and conflicting context in the 4430sdp board file.
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Merge tag 'boards' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC board specific changes from Arnd Bergmann:
"These updates are all for board specific code, including
- defconfig updates for shmobile, davinci, bcm2835, imx, omap and
tegra
- SD/MMC and I2C support on bcm2835 (Raspberry PI)
- minor updates for PXA
- shmobile updates to GPIO usage in board files
- More things in OMAP board files are moved over to device tree
probing
- Better support for audio devices on some OMAP platforms"
* tag 'boards' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (55 commits)
ARM: imx_v4_v5_defconfig: Add VPU support
ARM: imx: configs: enable netfilter support
ARM: OMAP2+: Fix twl section warnings related to omap_twl4030_audio_init
ARM: OMAP2+: omap2plus_defconfig: enable omap1 rtc
RX-51: Register twl4030-madc device
RX-51: Add leds lp5523 names from Maemo 5 2.6.28 kernel
ARM: OMAP2+: AM33XX: omap2plus_defconfig: Add support for few drivers
ARM: OMAP1: nokia770: enable CBUS/Retu
ARM: OMAP2+: omap2plus_defconfig: enable CMA allocator
ARM: OMAP2+: omap2plus_defconfig: enable TFP410 chip support
ARM: OMAP3: igep0020: simplify GPIO LEDs dependencies
ARM: OMAP2+: craneboard: support the TPS65910 PMU
ARM: OMAP2+: craneboard: support NAND device
ARM: OMAP3: cm-t3517: add MMC support
ARM: OMAP2+: Remove apollon board support
ARM: shmobile: armadillo800eva: set clock rates before timer init
ARM: tegra: defconfig updates
ARM: shmobile: mackerel: Use gpio_request_one()
ARM: shmobile: kzm9g: Use gpio_request_one()
ARM: shmobile: bonito: Use gpio_request_one()
...
