Commit Graph

693917 Commits

Author SHA1 Message Date
Arvind Yadav
36436f4e93 drm: udl: constify usb_device_id
usb_device_id are not supposed to change at runtime. All functions
working with usb_device_id provided by <linux/usb.h> work with
const usb_device_id. So mark the non-const structs as const.

Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/22fa8ca67a6d4a59997f463bf241ed56596fbcfa.1502526524.git.arvind.yadav.cs@gmail.com
2017-08-18 09:10:46 +02:00
Gustavo A. R. Silva
3c2c42eb47 drm/gma500: fix potential NULL pointer dereference dereference
NULL check at line 528: if (!sender || !data_out || !len_out) {, implies
that pointer _sender_ might be NULL.

Move pointer _sender_ dereference after NULL check in order to avoid a
potential NULL pointer dereference.

This issue was detected with the help of Coccinelle.

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20170812015515.GA8360@embeddedgus
2017-08-18 09:10:46 +02:00
Anusha Srivatsa
cec3bb013a drm/i915: Split pin mapping into per platform functions
Cleanup the code. Map the pins in accordance to
individual platforms rather than according to ports.
Create separate functions for platforms.

v2:
 - Add missing condition for CoffeeLake. Make platform
 specific functions static. Add function
 i915_ddc_pin_mapping().

v3:
 - Rename functions to x_port_to_ddc_pin() which directly
   indicates the purpose. Correct default return values on CNP
   and BXT. Rename i915_port_to_ to g4x_port_to since that was
   the first platform to run this. Correct code style. (Paulo)

Sugested-by Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1502927114-24012-1-git-send-email-anusha.srivatsa@intel.com
2017-08-17 18:01:39 -03:00
Leo Liu
33476319c0 drm/amdgpu: bump version for support of UVD MJPEG decode
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-17 16:47:45 -04:00
Leo Liu
d0b83d413f drm/amdgpu: add MJPEG check for UVD physical mode msg buffer
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-17 16:47:44 -04:00
Xiangliang.Yu
9afae27192 drm/ttm: Fix accounting error when fail to get pages for pool
When fail to get needed page for pool, need to put allocated pages
into pool. But current code has a miscalculation of allocated pages,
correct it.

Signed-off-by: Xiangliang.Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2017-08-17 16:47:44 -04:00
Roger He
d07f14be4d drm/amd/amdgpu: expose fragment size as module parameter (v2)
Allow overrides on the command line.

v2: agd: sqaush in spelling fix and bogus default value warning

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-17 16:47:43 -04:00
Roger He
e618d306de drm/amd/amdgpu: store fragment_size in vm_manager
adds fragment_size in the vm_manager structure and
implements hardware setup for it.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-17 15:46:08 -04:00
Christian König
27c7b9aeec drm/amdgpu: rename VM invalidated to moved
That better describes what happens here with the BO.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-17 15:46:08 -04:00
Christian König
ec681545af drm/amdgpu: separate bo_va structure
Split that into vm_bo_base and bo_va to allow other uses as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-17 15:46:07 -04:00
Christian König
4ab4016aaf drm/amdgpu: drop the extra VM huge page flag v2
Just add the flags to the addr field as well.

v2: add some more comments that the flag is for huge pages.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-17 15:46:06 -04:00
Christian König
ec5207c9f1 drm/amdgpu: remove superflous amdgpu_bo_kmap in the VM
We now properly kmap all BOs after validation.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-17 15:46:06 -04:00
Christian König
0f4b3c6862 drm/amdgpu: cleanup static CSA handling
Move the CSA bo_va from the VM to the fpriv structure.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-17 15:46:05 -04:00
Christian König
c0573af349 drm/amdgpu: SHADOW and VRAM_CONTIGUOUS flags shouldn't be used by userspace
The shadow handling isn't implemented completely for userspace BOs and
the kernel sets the VRAM_CONTIGUOUS as necessary.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-17 15:46:04 -04:00
Chunming Zhou
5b7f8404b2 drm/amdgpu: save list length when fence is signaled
update the list first to avoid redundant checks.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2017-08-17 15:46:03 -04:00
Christian König
3c848bb38a drm/amdgpu: move vram usage tracking into the vram manager v2
Looks like a better place for this.

v2: use atomic64_t members instead

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-17 15:46:03 -04:00
Christian König
9255d77d8c drm/amdgpu: move gtt usage tracking into the gtt manager v2
It doesn't make much sense to count those numbers twice.

v2: use and atomic64_t instead

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-17 15:46:02 -04:00
Christian König
97cbb28451 drm/amdgpu: move debug print into the MM managers
Instead of the separate switch/case in the calling function.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-17 15:46:01 -04:00
Christian König
12d4ac5844 drm/amdgpu: fix incorrect use of the lru_lock
The BO manager has its own lock and doesn't use the lru_lock.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-17 15:46:01 -04:00
Christian König
bbbb29efa2 drm/radeon: fix incorrect use of the lru_lock
The BO manager has its own lock and doesn't use the lru_lock.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-17 15:46:00 -04:00
Christian König
373533f80b drm/ttm: make ttm_mem_type_manager_func debug more useful
Provide the drm printer directly instead of just the callback.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-17 15:45:59 -04:00
Tom St Denis
aca8171812 drm/amd/amdgpu: Add tracepoint for DMA page mapping (v4)
This helps map DMA addresses back to physical addresses.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

(v2):  Added tracepoints for USERPTR, SG mappings, and
     SWIOTBL mappings.  Reformatted trace call perform
     PCI decoding internal to the trace.

(v3):  Add unmap tracepoints as well

(v4):  Move traces into separate functions
2017-08-17 15:45:59 -04:00
Christian König
dbcca4aab1 drm/amdgpu: fix Vega10 HW config for 2MB pages
Those values weren't correct. This should result in quite some speedup.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-17 15:45:58 -04:00
Christian König
a35ebc8c12 drm/amdgpu: only bind VM shadows after validation v2
No need to do this on every CS.

v2: remove all other bind, reorder code

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-17 15:45:57 -04:00
Christian König
b636922553 drm/amdgpu: only move VM BOs in the LRU during validation v2
This should save us a bunch of command submission overhead.

v2: move the LRU move to the right place to avoid the move for the root BO
    and handle the shadow BOs as well. This turned out to be a bug fix because
    the move needs to happen before the kmap.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-17 15:45:57 -04:00
Christian König
841e763b40 drm/ttm: individualize BO reservation obj when they are freed
Use the BOs reservation object when it is put on the ddelete list. This way we
avoid delaying freeing up the BO because of new fences on the reservation object.

This is used by dma-buf and amdgpu's VM page tables.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-17 15:45:56 -04:00
Christian König
1a33860d63 drm/ttm: remove nonsense wait in ttm_bo_cleanup_refs_and_unlock
With shared reservation objects the assumption that no fence
could have been added isn't true any more.

Additional to that the BO is about to be destroyed, so removing the
fences now has no advantage whatsoever.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-17 15:45:55 -04:00
Dave Airlie
8824c751eb omapdrm changes for v4.14
* HDMI hot plug IRQ support (instead of polling)
 * Big driver cleanup from Laurent (no functional changes)
 * OMAP5 DSI support (only the pinmuxing was missing)
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Merge tag 'omapdrm-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux into drm-next

omapdrm changes for v4.14

* HDMI hot plug IRQ support (instead of polling)
* Big driver cleanup from Laurent (no functional changes)
* OMAP5 DSI support (only the pinmuxing was missing)

* tag 'omapdrm-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux: (60 commits)
  drm/omap: Potential NULL deref in omap_crtc_duplicate_state()
  drm/omap: remove no-op cleanup code
  drm/omap: rename omapdrm device back
  drm: omapdrm: Remove omapdrm platform data
  ARM: OMAP2+: Don't register omapdss device for omapdrm
  ARM: OMAP2+: Remove unused omapdrm platform device
  drm: omapdrm: Remove the omapdss driver
  drm: omapdrm: Register omapdrm platform device in omapdss driver
  drm: omapdrm: hdmi: Don't allocate PHY features dynamically
  drm: omapdrm: hdmi: Configure the PHY from the HDMI core version
  drm: omapdrm: hdmi: Configure the PLL from the HDMI core version
  drm: omapdrm: hdmi: Pass HDMI core version as integer to HDMI audio
  drm: omapdrm: hdmi: Replace OMAP SoC model check with HDMI xmit version
  drm: omapdrm: hdmi: Rename functions and structures to use hdmi_ prefix
  drm/omap: add OMAP5 DSIPHY lane-enable support
  drm/omap: use regmap_update_bit() when muxing DSI pads
  drm: omapdrm: Remove dss_features.h
  drm: omapdrm: Move supported outputs feature to dss driver
  drm: omapdrm: Move DSS_FCK feature to dss driver
  drm: omapdrm: Move PCD, LINEWIDTH and DOWNSCALE features to dispc driver
  ...
2017-08-18 05:41:32 +10:00
Dave Airlie
2040c47361 Merge branch 'drm-next-4.14' of git://people.freedesktop.org/~agd5f/linux into drm-next
More features for 4.14.  Nothing too major here.  I have a few more additional
patches for large page support in vega10 among other things, but they require
some resevation object patches from drm-misc-next, so I'll send that request
once you've pulled the latest drm-misc-next.  Highlights:
- Fixes for ACP audio on stoney
- SR-IOV fixes for vega10
- various powerplay fixes
- lots of code clean up

* 'drm-next-4.14' of git://people.freedesktop.org/~agd5f/linux: (62 commits)
  drm/amdgpu/gfx7: fix function name
  drm/amd/amdgpu: Disabling Power Gating for Stoney platform
  drm/amd/amdgpu: Added a quirk for Stoney platform
  drm/amdgpu: jt_size was wrongly counted twice
  drm/amdgpu: fix missing endian-safe guard
  drm/amdgpu: ignore digest_size when loading sdma fw for raven
  drm/amdgpu: Uninitialized variable in amdgpu_ttm_backend_bind()
  drm/amd/powerplay: fix coding style in hwmgr.c
  drm/amd/powerplay: refine dmesg info under powerplay.
  drm/amdgpu: don't finish the ring if not initialized
  drm/radeon: Fix preferred typo
  drm/amdgpu: Fix preferred typo
  drm/radeon: Fix stolen typo
  drm/amdgpu: Fix stolen typo
  drm/amd/powerplay: fix coccinelle warnings in vega10_hwmgr.c
  drm/amdgpu: set gfx_v9_0_ip_funcs as static
  drm/radeon: switch to drm_*{get,put} helpers
  drm/amdgpu: switch to drm_*{get,put} helpers
  drm/amd/powerplay: add CZ profile support
  drm/amd/powerplay: fix PSI not enabled by kmd
  ...
2017-08-18 05:30:53 +10:00
Dmitry Osipenko
ec73c4cfe7 drm/tegra: Prevent BOs from being freed during job submission
Since DRM IOCTL's are lockless, there is a chance that BOs could be
released while a job submission is in progress. To avoid that, keep the
GEM reference until the job has been pinned, part of which will be to
take another reference.

v2: remove redundant check and avoid memory leak

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-08-17 17:57:18 +02:00
Thierry Reding
a8bc8c6510 drm/tegra: gem: Implement mmap() for PRIME buffers
The mapping of PRIME buffers can reuse much of the GEM mapping code, so
extract the common bits into a new tegra_gem_mmap() helper.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-08-17 17:57:18 +02:00
Thierry Reding
6c68b71776 drm/tegra: Support render node
None of the driver-specific IOCTLs are privileged, so mark them as such
and advertise that the driver supports render nodes.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-08-17 17:57:17 +02:00
Thierry Reding
932f652913 drm/tegra: sor: Trace register accesses
Add tracepoint events for SOR controller register accesses.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-08-17 17:57:17 +02:00
Thierry Reding
eba7c4551a drm/tegra: dpaux: Trace register accesses
Add tracepoint events for DPAUX controller register accesses.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-08-17 17:57:16 +02:00
Thierry Reding
75af8fa7fd drm/tegra: dsi: Trace register accesses
Add tracepoint events for DSI controller register accesses.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-08-17 17:57:16 +02:00
Thierry Reding
07a8aab899 drm/tegra: hdmi: Trace register accesses
Add tracepoint events for HDMI controller register accesses.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-08-17 17:57:15 +02:00
Thierry Reding
67e04d1ab1 drm/tegra: dc: Trace register accesses
Add tracepoint events for display controller register accesses.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-08-17 17:57:14 +02:00
Thierry Reding
5c5f13016d drm/tegra: sor: Use unsigned int for register offsets
Register offsets are usually fairly small numbers, so an unsigned int is
more than enough to represent them.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-08-17 17:57:14 +02:00
Thierry Reding
7efe20cf11 drm/tegra: hdmi: Use unsigned int for register offsets
Register offsets are usually fairly small numbers, so an unsigned int is
more than enough to represent them.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-08-17 17:57:13 +02:00
Thierry Reding
12831076ac drm/tegra: dsi: Use unsigned int for register offsets
Register offsets are usually fairly small numbers, so an unsigned int is
more than enough to represent them.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-08-17 17:57:13 +02:00
Thierry Reding
e8ddfdcbea drm/tegra: dpaux: Use unsigned int for register offsets
Register offsets are usually fairly small numbers, so an unsigned int is
more than enough to represent them.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-08-17 17:57:12 +02:00
Thierry Reding
3be713be1f drm/tegra: dc: Use unsigned int for register offsets
Register offsets are usually fairly small numbers, so an unsigned int is
more than enough to represent them.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-08-17 17:57:11 +02:00
Michał Mirosław
68d890a3cc drm/tegra: Fix NULL deref in debugfs/iova
When IOMMU is off, ->mm_lock is not initialized and ->mm is NULL.

Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-08-17 17:57:10 +02:00
Cihangir Akturk
7664b2fa42 drm/tegra: switch to drm_*_get(), drm_*_put() helpers
Use drm_*_get() and drm_*_put() helpers instead of drm_*_reference()
and drm_*_unreference() helpers.

drm_*_reference() and drm_*_unreference() functions are just
compatibility alias for drm_*_get() and drm_*_put() and should not be
used by new code. So convert all users of compatibility functions to
use the new APIs.

Generated by: scripts/coccinelle/api/drm-get-put.cocci

Signed-off-by: Cihangir Akturk <cakturk@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-08-17 17:57:09 +02:00
Nicolas Chauvet
788ff4b6cf drm/tegra: Set MODULE_FIRMWARE for the VIC
The defines are set anyway to prevent an empty string. The test for the
SoC is the same as for Nouveau for the Tegra GPU firmware (see
drivers/gpu/drm/nouveau/nouveau_platform.c)

v2:
 - Place the defines above each chip's vic_config struct
 - MODULE_FIRMWARE() at the end of the file

Fixes: 0ae797a8ba ("drm/tegra: Add VIC support")
Signed-off-by: Nicolas Chauvet <kwizart@gmail.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-08-17 17:57:09 +02:00
Arnd Bergmann
2d0f986559 drm/tegra: Add CONFIG_OF dependency
Without CONFIG_OF, we can run into a build error:

drivers/gpu/drm/tegra/dpaux.c:378:20: error: 'pinconf_generic_dt_node_to_map_group' undeclared here (not in a function); did you mean 'pinconf_generic_params'?
  .dt_node_to_map = pinconf_generic_dt_node_to_map_group,
                    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
                    pinconf_generic_params
drivers/gpu/drm/tegra/dpaux.c:379:17: error: 'pinconf_generic_dt_free_map' undeclared here (not in a function); did you mean 'pinconf_generic_params'?

This adds an explicit dependency.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-08-17 17:57:08 +02:00
Thierry Reding
25ae30d2a8 gpu: host1x: Support sub-devices recursively
The display architecture in Tegra186 changes slightly compared to
earlier Tegra generations, which requires that we recursively scan
host1x sub-devices from device tree.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-08-17 17:57:08 +02:00
Gustavo A. R. Silva
7b2c63de20 gpu: host1x: fix error return code in host1x_probe()
platform_get_irq() returns an error code, but the host1x driver
ignores it and always returns -ENXIO. This is not correct and,
prevents -EPROBE_DEFER from being propagated properly.

Notice that platform_get_irq() no longer returns 0 on error:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e330b9a6bb35dc7097a4f02cb1ae7b6f96df92af

Print and propagate the return value of platform_get_irq on failure.

This issue was detected with the help of Coccinelle.

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-08-17 17:57:07 +02:00
Mikko Perttunen
4ac45eb8d1 gpu: host1x: Fix bitshift/mask multipliers
Some parts of Host1x uses BIT_WORD/BIT_MASK/BITS_PER_LONG to calculate
register or field offsets. This worked fine on ARMv7, but now that
BITS_PER_LONG is 64 but our registers are still 32-bit things are
broken.

Fix by replacing..
- BIT_WORD with (x / 32)
- BIT_MASK with BIT(x % 32)
- BITS_PER_LONG with 32

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-08-17 17:57:06 +02:00
Mikko Perttunen
18b3f5ac6b gpu: host1x: Don't fail on NULL bo physical address
Pinning a Host1x BO currently cannot fail and zero is a valid address
for a BO when IOMMU is enabled. To avoid false errors remove checks
for NULL BO physical addresses.

Fixes: 404bfb78da ("gpu: host1x: Add IOMMU support")
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-08-17 17:57:06 +02:00