i.MX25's Keypad Port (KPP) can be used with a key pad matrix of up to
8 x 8 keys. Add pin configurations for rows 4 to 7.
The new defines have been tested on an out-of-tree board.
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
crypto node should use the "crypto" generic naming,
and not a specific one ("sahara", "dcp", "caam").
Child nodes of the crypto node for caam crypto engine
should use the "jr" name (without an index),
as indicated in the DT binding.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
lx2160a-qds has 2 micron "mt35xu512aba" flashes of size 64M each
connected on A0 and B1 i.e on CS0 and CS3. Since flashes are connected
on different buses, only one flash can be probed at a time.
Add fspi node properties aligned with LX2160A-RDB fspi properties.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Update fspi node compatibles of LX2160A-RDB to "jedec,spi-nor" for
automatic detection of flash.
This also helps in fixing below warning:
spi-nor spi0.0: found mt35xu512aba, expected m25p80
spi-nor spi0.1: found mt35xu512aba, expected m25p80
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
It was based on Google Source Code for Coral Edge TPU Mendel release:
https://coral.googlesource.com/linux-imx/
It was tested on Coral Dev Board using this command:
sudo stress --cpu 4 --timeout 3600
Signed-off-by: Vitor Massaru Iha <vitor@massaru.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the iommu-map property to the pci nodes so that the firmware
fixes it up with the required values thus enabling iommu for
devices connected over pci.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
A test with the command below gives this error:
arch/arm64/boot/dts/rockchip/rk3399-evb.dt.yaml: /: compatible:
['rockchip,rk3399-evb', 'rockchip,rk3399', 'google,rk3399evb-rev2']
is not valid under any of the given schemas
'google,rk3399evb-rev2' was a no longer used variant for Google.
The binding only mentions 'rockchip,rk3399-evb', 'rockchip,rk3399',
so fix this error by removing 'google,rk3399evb-rev2' from
the compatible property in rk3399-evb.dts and change it into
generic rk3399-evb support only.
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/arm/rockchip.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200302092759.3291-3-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
A test with the command below gives this error:
arch/arm/boot/dts/rk3036-evb.dt.yaml: /: compatible:
['rockchip,rk3036-evb', 'rockchip,rk3036']
is not valid under any of the given schemas
This board was somehow never added to the documentation.
Fix this error by adding the rk3036-evb board to rockchip.yaml.
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/arm/rockchip.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200302092759.3291-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
A test with the command below gives this error:
arch/arm/boot/dts/rk3036-kylin.dt.yaml: /: compatible:
['rockchip,rk3036-kylin', 'rockchip,rk3036']
is not valid under any of the given schemas
Normally the dt-binding is the authoritative part, so boards should follow
the binding, but in the kylin-case the compatible from the .dts is used for
years in the field now, so fix the binding, as otherwise
we would break old users.
Fix this error by changing 'rockchip,kylin-rk3036' to
'rockchip,rk3036-kylin' in rockchip.yaml.
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/arm/rockchip.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200302092759.3291-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The GW5910-C revision adds a TI CC1352 connected to IMX UART4
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
In one of the iWave-G22D development board variants, called Generic SODIMM
Development Platform, we have an LCD with touchscreen. The resistive touch
controller, STMPE811 is on the development board and is connected through
the i2c5 of the RZ-G1E.
Additionally, this controller should generate an interrupt to the CPU and
it is connected through GPIO4,4 to the GIC.
Touch was tested with one of our iW-RainboW-G22D-SODIMM RZ/G1E development
platforms.
More details on the iWave website:
https://www.iwavesystems.com/rz-g1e-sodimm-development-kit.html
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1583336650-25848-1-git-send-email-marian-cristian.rotariu.rb@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
On the Generic SODIMM Development Platform there is an RGB LCD panel
directly connected to the DU output. It uses the TPU0 as backlight, one
GPIO pull-up configuration for power enable, R[2:7], G[2:7], B[2:7],
VSYNC, HSYNC, DU0_DISP and, DU0_CLK as inputs.
There is no encoder between the DU and the panel, therefore the default
connector driver is used.
The two variants of the iW-G22D should be mutually exclusive, therefore
this patch also disables the RGB LCD display when the HDMI extension board
is used.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1583239490-8837-1-git-send-email-marian-cristian.rotariu.rb@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
The IMU chip on the librem5-devkit is not mounted at the "natural" place
that would match normal phone orientation (see the documentation for the
details about what that is).
Since the lsm9ds1 driver supports providing a mount matrix, we can describe
the orientation on the board in the dts:
Create a right-handed coordinate system (x * -1; see the datasheet for the
axis) and rotate 180 degrees around the y axis because the device sits on
the back side from the display.
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The poly fuses can handle 6V 4Amps so incease the kernel limts to 5V
3.5Amps.
Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
By adding broken-cd to the usdhc2 stanza the Redpine card can be
detected when the HKS is turned off and on.
Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Specify which regulator is used for cpufreq DVFS.
Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Connect the WoWWAN signal to a gpio key to wake up the system from suspend.
Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the simcom SIM7100 modem and the sai6 interface that connects it.
Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Describe the sgtl5000 of the librem 5 devkit in devicetree.
Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Without a VBUS supply the dwc3 driver won't go into otg mode.
Fixes: eb4ea0857c ("arm64: dts: fsl: librem5: Add a device tree for the Librem5 devkit")
Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds 4 eeprom support on i2c mux channel #0 -
1. Bootable 512Kbit eeprom at address 0x50.
2. Memory SO-DIMMs SPD channels at 0x51 (upper SO-DIMM) and 0x53.
3. 2Kb eeprom at 0x57 will be used by SolidRun to hold manufacturing
data.
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for the LTC3882 regulator so that the hardware monitoring
can be used with this device. This regulator provides the 0.78V
supply for the LX2160A.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Node name should be generic, use "pinctrl" instead of "iomuxc"
for all i.MX8M SoCs.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On i.MX8MM, the SNVS requires a clock. This is similar to the clock
bound to the SNVS RTC node, but if the SNVS RTC driver isn't enabled,
then SNVS doesn't work, and as such the pwrkey driver doesn't
work (i.e. hangs the kernel, as the clock isn't enabled).
Also see commit ec2a844ef7
("ARM: dts: imx7s: add snvs rtc clock")
for a similar fix.
Signed-off-by: André Draszik <git@andred.net>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On i.MX8MM, the SNVS requires a clock. This is similar to the clock
bound to the SNVS RTC node, but if the SNVS RTC driver isn't enabled,
then SNVS doesn't work, and as such the pwrkey driver doesn't
work (i.e. hangs the kernel, as the clock isn't enabled).
Also see commit ec2a844ef7
("ARM: dts: imx7s: add snvs rtc clock")
for a similar fix.
Signed-off-by: André Draszik <git@andred.net>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Since commit b9213899d2b0 ("arm64: dts: ls1028a: disable all enetc ports
by default") all the network ports are disabled by default. This makes
sense, but now we have to enable them explicitly in the boards. Do so
for the sl28 module.
Since we are at it. Make sure the second port is only enabled for the
variant 4 of the module. Variant 3 has only one network port.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Link the switch PHY nodes to the central MDIO controller PCIe endpoint
node on LS1028A (implemented as PF3) so that PHYs are accessible via
MDIO.
Enable SGMII AN on the Felix PCS by telling PHYLINK that the VSC8514
quad PHY is capable of in-band-status.
The PHYs are used in poll mode due to an issue with the interrupt line
on current revisions of the LS1028A-RDB board.
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the switch device node, available on PF5, so that the switch port
sub-nodes (net devices) can be linked to corresponding board specific
phy nodes (external ports) or have their link mode defined (internal
ports).
The switch device features 6 ports, 4 with external links and 2
internally facing to the LS1028A SoC and connected via fixed links to 2
internal ENETC Ethernet controller ports.
Add the corresponding ENETC host port device nodes, mapped to PF2 and
PF6 PCIe functions. Since the switch only supports tagging on one CPU
port, only one port pair (swp4, eno2) is enabled by default and the
other, lower speed, port pair is disabled to prevent the PCI core from
probing them. If enabled, swp5 will be a fixed-link slave port.
DSA tagging can also be moved from the swp4-eno2 2.5G port pair to the
1G swp5-eno3 pair by changing the ethernet = <&enetc_port2> phandle to
<&enetc_port3> and moving it under port5, but in that case enetc_port2
should not be disabled, because it is the hardware owner of the Felix
PCS and disabling its memory would result in access faults in the Felix
DSA driver.
All ports are disabled by default, including the CPU port, and need to
be enabled on a per-board basis.
The phy-mode binding of the internal ENETC ports was modified from
"gmii" to "internal" to match the phy-mode of the internal-facing switch
ports connected to them. The ENETC driver does not perform any phy_mode
validation anyway, so the change is only cosmetic. Also, enetc_port2 is
defined as a fixed-link 1000 Mbps port even though it is 2500 Mbps (as
can be seen by the fact that it is connected to mscc_felix_port4). The
fact that it is currently defined as 1000 Mbps is an artifact of its
PHYLIB implementation instead of PHYLINK (the former can't describe a
fixed-link speed higher than what swphy can emulate from the Clause 22
MDIO spec).
The switch's INTB interrupt line signals:
- PTP TX timestamp availability
- TSN Frame Preemption
And don't forget to enable the 4MB BAR4 in the root complex ECAM space,
where the switch registers are mapped.
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
There are few boards that enable all ENETC ports, so instead of having
board DTs disable them, do so in the DTSI and have the boards enable the
ports they use.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This specifier overrides the interrupt specifier with 3 cells from gic
(/interrupt-controller@6000000), but in fact ENETC is not an interrupt
controller, so the property is bogus.
Interrupts used by the children of the ENETC RCIE must use the full
3-cell specifier required by the GIC.
The issue has no functional consequence so there is no real reason to
port the patch to stable trees.
Fixes: 927d7f8575 ("arm64: dts: fsl: ls1028a: Add PCI IERC node and ENETC endpoints")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
We need to indicate that powering off the TI WiFi is safe, to avoid:
wl18xx_driver wl18xx.2.auto: Unbalanced pm_runtime_enable!
wl1271_sdio mmc0:0001:2: wl12xx_sdio_power_on: failed to get_sync(-13)
which prevents the WiFi being functional.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The pmic is a mfd device and supports gpios. Those gpios are not routed
to the SoM baseboard pin header but they are connected to the i.MX6. We
need the GPIO's to configure the pmic to select between the
suspend/resume arm and soc voltages
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
By default the phycore-som has support for two watchdog devices: 1st the
internal imx6 watchdog and 2nd the DA9062 PMIC watchdog. According [1]
the PMIC watchdog is used as boot watchdog. It is common to use this
watchdog during "system up" time too. Furthermore the PMIC watchdog can
be used to address ERR007117 since the phycore-som can be equipped with
NAND or eMMC storage.
The PMIC watchdog can be enabled/disabled by the PMIC itself if the PMIC
enters POWERDOWN mode or by the host. The PMIC powerdown mode can't be
used due to the PCB design. So the watchdog is still enabled during a
suspend which causes a system reset. We need to tell the driver to
disable the watchdog during a system suspend and to reenable it upon a
resume to fix this.
[1] https://git.pengutronix.de/cgit/barebox/tree/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi#n73
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Node name should be generic, use "pinctrl" instead of "iomuxc"
for all i.MX6/7 SoCs.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On i.MX7, the SNVS requires a clock. This is similar to the clock
bound to the SNVS RTC node, but if the SNVS RTC driver isn't enabled,
then SNVS doesn't work, and as such the pwrkey driver doesn't
work (i.e. hangs the kernel, as the clock isn't enabled).
Also see commit ec2a844ef7
("ARM: dts: imx7s: add snvs rtc clock")
for a similar fix.
Signed-off-by: André Draszik <git@andred.net>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Consolidate and move the 'secondary-boot-reg' property from the 3
existing binding documents into the main cpus.yaml documentation, also
make sure that the property is enforced when relevant.
Acked-by: Maxime Ripard <mripard@kernel.org>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Update Vulcan SoC family binding document for boards/SoCs to use YAML.
Verified with dt_binding_check and dtbs_check.
Acked-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Update the Broadcom BCM11351 SoC family binding document for boards/SoCs
to use YAML. Verified with dt_binding_check and dtbs_check.
Acked-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Update the Broadcom BCM4708 SoC family binding document for boards/SoCs
to use YAML. Verified with dt_binding_check and dtbs_check.
Acked-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Update the Broadcom BCM23550 SoC binding document for boards/SoCs to use
YAML. Verified with dt_binding_check and dtbs_check.
Acked-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Update the Broadcom BCM21664 SoC binding document for boards/SoCs to use
YAML. Verified with dt_binding_check and dtbs_check.
Acked-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Update the Broadcom Stingray SoC binding document for boards/SoCs to use
YAML. Verified with dt_binding_check and dtbs_check.
Acked-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Update the Broadcom Northstar 2 SoC binding document for boards/SoCs to
use YAML. Verified with dt_binding_check and dtbs_check.
Acked-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
