Add Sharp-QVGA panel support for MX27ADS board
Signed-off-by: Vladimir Barinov <vbarinov@embeddedalley.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds the SMSC platform device to the Litekit board.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Several comments in board config files stated "mandatory for
CONFIG_LL_DEBUG" but the correct name is CONFIG_DEBUG_LL.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This support both sdhc1 and sdhc2 with WP and CD for the marxbot and
devboard mx31moboard baseboards.
sdhc2 is present on both, but is not directly included in the
mx31moboard file because a third baseboard (not supported yet) without
sdhc2 is planned.
Changes since v1: removed pin initialization from init/exit function and
taken different comments into account
Changes since v2: pin initialiation now is done in another patch for all
current mx31moboard pins
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Changes since v1: all the pins needed for the drivers are claimed in
another patch
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As suggested by Sascha, here we setup all the pins that we are using in
the current (and currently reviewed) drivers for mx31moboard system.
changes since v1: changed I2C1 pin names
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As suggested by Sascha, I regroup them in a single patch so that the
other patches become more orthogonal.
changes since v1: changed I2C1 pin names
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This hw-random driver add support to RNGA hardware found
on some i.MX processors.
Signed-off-by: Alan Carvalho de Assis <acassis@gmail.com>
Acked-by: Matt Mackall <mpm@selenic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Various improvements (includes in alphabetical order, platform devices
declaration order change, ...)
The pins now are claimed in a single function call from a main table for
every board for a better clarity and to adopt the current agreement for
mx31 devices.
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Adds a defconfig file for the i.MX21 SoC, targeting
the Freescale i.MX21ADS (M9328MX21ADSE) Application
Development System.
Signed-off-by: Ivo Clarysse <ivo.clarysse@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Kconfig enables now HAVE_PWM (this enables in turn the selection of
CONFIG_BACKLIGHT_PWM)
* changes CONFIG_ARCH_MXyy to CONFIG_MACH_MXyy
* fix some register names to match those of the reference manual
* write a stub code so that the PWM can be used to program the
LCD backlight
* convert from #ifdef CONFIG_ARCH_MXxx to cpu_is_mxXX()
* remove unneeded defines and fix 80-column "violations" of checkpatch.pl
Signed-off-by: Holger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
[PATCH v6] MXC: mx21ads base support
Base machine support for the Freescale i.MX21ADS
(M9328MX21ADSE) Application Development System.
Signed-off-by: Ivo Clarysse <ivo.clarysse@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MXC GPIO controller does not support generation of interrupts on both
edges. Emulate this mode in software by reconfiguring the irq trigger
polarity on each interrupt. This follows an example of
drivers/mfd/asic3.c.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
arch-imx is superseeded by the MXC architecture support.
This patch removes arch/arm/mach-imx from the kernel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
arch-imx is superseeded by the MXC architecture support.
This patch removes arch-imx from the build system.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently we depend on hardcoded base addresses for the interrupt
controller. This prevents us from compiling in more than one i.MX
architecture at a time. This patch changes the base address to a
runtime calculated one.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently we depend on hardcoded base addresses for the timer.
This prevents us from compiling in more than one i.MX architecture
at a time. This patch changes the base address to a runtime
calculated one.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allows us to have more mapping functions for more than one
i.MX architecture in the kernel. As this is the earliest board
specific hook we have, also use it to set the cpu type.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
It is no longer present in newer cores. Unfortunately Freescale decided
to put the bit which decides between automotive clock path and consumer
clock path in the automotive clock path direction. With current code we
cannot detect the core revision, so just remove automotive path completely.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This iomux is called iomux-v3 in the tree because it is the third known
incarnation of MXC iomuxers. It is not only found on the MX35 but also
on the MX51 and probably others.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX31 ARM11 core is not a v6K core. Disable this option as it
is incompatible with non v6K cores.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Before this patch I got the following line in my dmesg:
[ 0.000000] BUG: mapping for 0xd4000000 at 0xeb000000 overlaps vmalloc space
VMALLOC_END is 0xf4000000 and there are the following other mappings
defined for mx27ads:
(0xa0500000,+0x00001000) maps to 0xffff0000
(0x10000000,+0x00100000) maps to 0xf4000000
(0x80000000,+0x00100000) maps to 0xf4100000
(0xd8000000,+0x00100000) maps to 0xf4200000
So map PBC to 0xf4300000.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On i.MX31 I sometimes get spurious interrupts. There is no need
to crash the whole system when this happens. Instead, silently
ignore it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We want to have a mx31_defconfig file that builds a kernel that is able
to boot on all support mx31 systems and thus also can be better tested
by automatic build scripts. For these reasons, this config file is not
needed anymore.
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
All i.MX platforms support <linux/clk.h> calls and should select HAVE_CLK.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On MX2 platforms imx_dma_request() calls request_irq() which may sleep
with interrupts disabled.
Signed-off-by: Martin Fuzzey <mfuzzey@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The sequence
imx_dma_request()
imx_dma_enable()
imx_dma_free()
left the dma channel in_use mode and did not release the timer.
Signed-off-by: Martin Fuzzey <mfuzzey@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* master.kernel.org:/home/rmk/linux-2.6-arm: (45 commits)
[ARM] 5489/1: ARM errata: Data written to the L2 cache can be overwritten with stale data
[ARM] 5490/1: ARM errata: Processor deadlock when a false hazard is created
[ARM] 5487/1: ARM errata: Stale prediction on replaced interworking branch
[ARM] 5488/1: ARM errata: Invalidation of the Instruction Cache operation can fail
davinci: DM644x: NAND: update partitioning
davinci: update DM644x support in preparation for more SoCs
davinci: DM644x: rename board file
davinci: update pin-multiplexing support
davinci: serial: generalize for more SoCs
davinci: DM355 IRQ Definitions
davinci: DM646x: add interrupt number and priorities
davinci: PSC: Clear bits in MDCTL reg before setting new bits
davinci: gpio bugfixes
davinci: add EDMA driver
davinci: timers: use clk_get_rate()
[ARM] pxa/littleton: add missing da9034 touchscreen support
[ARM] pxa/zylonite: configure GPIO18/19 correctly, used by 2 GPIO expanders
[ARM] pxa/zylonite: fix the issue of unused SDATA_IN_1 pin get AC97 not working
[ARM] pxa: make ads7846 on corgi and spitz to sync on HSYNC
[ARM] pxa: remove unused CPU_FREQ_PXA Kconfig symbol
...
This patch is a workaround for the 460075 Cortex-A8 (r2p0) erratum. It
configures the L2 cache auxiliary control register so that the Write
Allocate mode for the L2 cache is disabled.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds a workaround for the 458693 Cortex-A8 (r2p0)
erratum. It sets the corresponding bits in the auxiliary control
register so that the PLD instruction becomes a NOP.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds the workaround for the 430973 Cortex-A8 (r1p0..r1p2)
erratum. The BTAC/BTB is now flushed at every context switch.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
