Commit Graph

218 Commits

Author SHA1 Message Date
Linus Torvalds
532c2b926d - New Drivers
- Add Cirrus Logic Madera Codec (CS47L35, CS47L85 and CS47L90/91) driver
    - Add ChromeOS EC CEC driver
    - Add ROHM BD71837 PMIC driver
 
  - New Device Support
    - Add support for Dialog Semi DA9063L PMIC variant to DA9063
    - Add support for Intel Ice Lake to Intel-PLSS-PCI
    - Add support for X-Powers AXP806 to AXP20x
 
  - New Functionality
    - Add support for USB Charging to the ChromeOS Embedded Controller
    - Add support for HDMI CEC to the ChromeOS Embedded Controller
    - Add support for HDMI CEC to Intel HDMI
    - Add support for accessory detection to Madera devices
    - Allow individual pins to be configured via DT' wlf,csnaddr-pd
    - Provide legacy platform specific EEPROM/Watchdog commands; rave-sp
 
  - Fix-ups
    - Trivial renaming/spelling fixes; cros_ec, da9063-*
    - Convert to Managed Resources (devm_*); da9063-*, ti_am335x_tscadc
    - Transition to helper macros/functions; da9063-*
    - Constify; kempld-core
    - Improve error path/messages; wm8994-core
    - Disable IRQs locally instead of relying on USB subsystem; dln2
    - Remove unused code; rave-sp
    - New exports; sec-core
 
  - Bug Fixes
    - Fix possible false I2C transaction error; arizona-core
    - Fix declared memory area size; hi655x-pmic
    - Fix checksum type; rave-sp
    - Fix incorrect default serial port configuration: rave-sp
    - Fix incorrect coherent DMA mask for sub-devices; sm501
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Merge tag 'mfd-next-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull MFD updates from Lee Jones:
 "New Drivers:
   - Add Cirrus Logic Madera Codec (CS47L35, CS47L85 and CS47L90/91) driver
   - Add ChromeOS EC CEC driver
   - Add ROHM BD71837 PMIC driver

  New Device Support:
   - Add support for Dialog Semi DA9063L PMIC variant to DA9063
   - Add support for Intel Ice Lake to Intel-PLSS-PCI
   - Add support for X-Powers AXP806 to AXP20x

  New Functionality:
   - Add support for USB Charging to the ChromeOS Embedded Controller
   - Add support for HDMI CEC to the ChromeOS Embedded Controller
   - Add support for HDMI CEC to Intel HDMI
   - Add support for accessory detection to Madera devices
   - Allow individual pins to be configured via DT' wlf,csnaddr-pd
   - Provide legacy platform specific EEPROM/Watchdog commands; rave-sp

  Fix-upsL
   - Trivial renaming/spelling fixes; cros_ec, da9063-*
   - Convert to Managed Resources (devm_*); da9063-*, ti_am335x_tscadc
   - Transition to helper macros/functions; da9063-*
   - Constify; kempld-core
   - Improve error path/messages; wm8994-core
   - Disable IRQs locally instead of relying on USB subsystem; dln2
   - Remove unused code; rave-sp
   - New exports; sec-core

  Bug Fixes:
   - Fix possible false I2C transaction error; arizona-core
   - Fix declared memory area size; hi655x-pmic
   - Fix checksum type; rave-sp
   - Fix incorrect default serial port configuration: rave-sp
   - Fix incorrect coherent DMA mask for sub-devices; sm501"

* tag 'mfd-next-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (60 commits)
  mfd: madera: Add register definitions for accessory detect
  mfd: sm501: Set coherent_dma_mask when creating subdevices
  mfd: bd71837: Devicetree bindings for ROHM BD71837 PMIC
  mfd: bd71837: Core driver for ROHM BD71837 PMIC
  media: platform: cros-ec-cec: Fix dependency on MFD_CROS_EC
  mfd: sec-core: Export OF module alias table
  mfd: as3722: Disable auto-power-on when AC OK
  mfd: axp20x: Support AXP806 in I2C mode
  mfd: axp20x: Add self-working mode support for AXP806
  dt-bindings: mfd: axp20x: Add "self-working" mode for AXP806
  mfd: wm8994: Allow to configure CS/ADDR Pulldown from dts
  mfd: wm8994: Allow to configure Speaker Mode Pullup from dts
  mfd: rave-sp: Emulate CMD_GET_STATUS on device that don't support it
  mfd: rave-sp: Add legacy watchdog ping command translation
  mfd: rave-sp: Add legacy EEPROM access command translation
  mfd: rave-sp: Initialize flow control and parity of the port
  mfd: rave-sp: Fix incorrectly specified checksum type
  mfd: rave-sp: Remove unused defines
  mfd: hi655x: Fix regmap area declared size for hi655x
  mfd: ti_am335x_tscadc: Fix struct clk memory leak
  ...
2018-08-20 15:38:44 -07:00
Quentin Schulz
be36abb71d pinctrl: ocelot: add support for interrupt controller
This GPIO controller can serve as an interrupt controller as well on the
GPIOs it handles.

An interrupt is generated whenever a GPIO line changes and the
interrupt for this GPIO line is enabled. This means that both the
changes from low to high and high to low generate an interrupt.

For some use cases, it makes sense to ignore the high to low change and
not generate an interrupt. Such a use case is a line that is hold in a
level high/low manner until the event holding the line gets acked.
This can be achieved by making sure the interrupt on the GPIO controller
side gets acked and masked only after the line gets hold in its default
state, this is what's done with the fasteoi functions.

Only IRQ_TYPE_EDGE_BOTH and IRQ_TYPE_LEVEL_HIGH are supported for now.

Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-08-06 13:00:17 +02:00
Lee Jones
e5ff19cf75 Immutable branch (mfd, chrome) due for the v4.19 window
Immutable Branch which moves the cros_ec_i2c and cros_ec_spi
 transport drivers from mfd to platform/chrome. Changes in arm are a simple
 rename in defconfigs. Change in input is a rename in help text.
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Merge branches 'ib-mfd-4.19', 'ib-mfd-gpio-pinctrl-4.19', 'ib-mfd-i915-media-platform-4.19' and 'ib-mfd-regulator-4.19', tag 'ib-platform-chrome-mfd-move-cros-ec-transport-for-4.19' into ibs-for-mfd-merged

Immutable branch (mfd, chrome) due for the v4.19 window

Immutable Branch which moves the cros_ec_i2c and cros_ec_spi
transport drivers from mfd to platform/chrome. Changes in arm are a simple
rename in defconfigs. Change in input is a rename in help text.
2018-07-27 08:11:37 +01:00
Jan Kundrát
6ff4556655 pinctrl: mcp23s08: Kconfig: update to reflect supported features
Commit d8f4494e70 removed comments which described this limitation.
The code supported interrupts even before.

Also add some spacing so that the chip IDs are a bit more readable.

Signed-off-by: Jan Kundrát <jan.kundrat@cesnet.cz>
Reviewed-by: Phil Reid <preid@electromag.com.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-06-18 07:56:05 +02:00
Richard Fitzgerald
218d72a77b pinctrl: madera: Add driver for Cirrus Logic Madera codecs
These codecs have a variable number of I/O lines each of which
is individually selectable to a wide range of possible functions.

The functionality is slightly different from the traditional muxed
GPIO since most of the functions can be mapped to any pin (and even
the same function to multiple pins). Most pins have a dedicated
"alternate" function that is only available on that pin. The
alternate functions are usually a group of signals, though it is
not always necessary to enable the full group, depending on the
alternate function and how it is to be used. The mapping between
alternate functions and GPIO pins varies between codecs depending
on the number of alternate functions and available pins.

Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2018-06-05 11:15:23 +01:00
Manivannan Sadhasivam
2242ddfbf4 pinctrl: actions: Add Actions S900 pinctrl driver
Add pinctrl driver for Actions Semi S900 SoC. The driver supports
pinctrl, pinmux and pinconf functionalities through a range of registers
common to both gpio driver and pinctrl driver.

Pinmux functionality is available only for the pin groups while the
pinconf functionality is available for both pin groups and individual
pins.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-05-02 14:36:08 +02:00
Linus Torvalds
77624cd2a7 Pin control bulk changes for the v4.17 kernel cycle:
New drivers:
 
 - Qualcomm SDM845: this is their new flagship SoC platform
   which seems to be targeted at premium mobile handsets.
 
 - Renesas R-Car M3-N SoC.
 
 - Renesas R8A77980 SoC.
 
 - NXP (ex Freescale) i.MX 6SLL SoC.
 
 - Mediatek MT2712 SoC.
 
 - Allwinner H6 SoC.
 
 Improvements:
 
 - Uniphier adds a few new functions and pins.
 
 - Renesas refactorings and additional pin definitions.
 
 - Improved pin groups for Axis Artpec6.
 
 Cleanup:
 
 - Drop the TZ1090 drivers. This platform is no longer
   maintained and is being deleted.
 
 - Drop ST-Ericsson U8540/U9540 support as this was never
   productified.
 
 - Overall minor fixes and janitorial.
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Merge tag 'pinctrl-v4.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control bulk updates from Linus Walleij:
 "New drivers:

   - Qualcomm SDM845: this is their new flagship SoC platform which
     seems to be targeted at premium mobile handsets.

   - Renesas R-Car M3-N SoC.

   - Renesas R8A77980 SoC.

   - NXP (ex Freescale) i.MX 6SLL SoC.

   - Mediatek MT2712 SoC.

   - Allwinner H6 SoC.

  Improvements:

   - Uniphier adds a few new functions and pins.

   - Renesas refactorings and additional pin definitions.

   - Improved pin groups for Axis Artpec6.

  Cleanup:

   - Drop the TZ1090 drivers. This platform is no longer maintained and
     is being deleted.

   - Drop ST-Ericsson U8540/U9540 support as this was never
     productified.

   - Overall minor fixes and janitorial"

* tag 'pinctrl-v4.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (82 commits)
  pinctrl: uniphier: add UART hardware flow control pin-mux settings
  pinctrl: sunxi: add support for the Allwinner H6 main pin controller
  pinctrl: sunxi: change irq_bank_base to irq_bank_map
  pinctrl: sunxi: introduce IRQ bank conversion function
  pinctrl: sunxi: refactor irq related register function to have desc
  pinctrl: msm8998: Remove owner assignment from platform_driver
  pinctrl: uniphier: divide I2S and S/PDIF audio out pin-mux group
  pinctrl: uniphier: add PXs2 Audio in/out pin-mux settings
  pinctrl/amd: poll InterruptEnable bits in enable_irq
  pinctrl: ocelot: fix gpio direction
  pinctrl: mtk: fix check warnings.
  pintcrl: mtk: support bias-disable of generic and special pins simultaneously
  pinctrl: add mt2712 pinctrl driver
  pinctrl: pinctrl-single: Fix pcs_request_gpio() when bits_per_mux != 0
  pinctrl: imx: Add pinctrl driver support for imx6sll
  dt-bindings: imx: update pinctrl doc for imx6sll
  pinctrl: intel: Implement intel_gpio_get_direction callback
  pinctrl: stm32: add 'depends on HAS_IOMEM' to fix unmet dependency
  pinctrl: mediatek: mtk-common: use true and false for boolean values
  pinctrl: sunxi: always look for apb block
  ...
2018-04-03 12:20:54 -07:00
Arnd Bergmann
f59b2dc2de pinctrl: remove adi2/blackfin drivers
The blackfin architecture is getting removed, so these are
now obsolete.

Acked-by: Aaron Wu <aaron.wu@analog.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-03-26 15:56:55 +02:00
James Hogan
4a7cba71ca pinctrl: Drop TZ1090 drivers
Now that arch/metag/ has been removed, along with TZ1090 SoC support,
remove the TZ1090 pinctrl drivers. They are of no value without the
architecture and SoC platform code.

Signed-off-by: James Hogan <jhogan@kernel.org>
Cc: linux-gpio@vger.kernel.org
Cc: linux-metag@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-03-01 15:34:15 +01:00
Alexandre Belloni
ce8dc09433 pinctrl: Add Microsemi Ocelot SoC driver
The Microsemi Ocelot SoC has a few pins that can be used as GPIOs or take
multiple other functions. Add a driver for the pinmuxing and the GPIOs.

There is currently no support for interrupts.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-01-09 14:54:59 +01:00
Quentin Schulz
971f1b38f9 pinctrl: axp209: add missing Kconfig dependencies
This fixes some compilation issues.

GENERIC_PINCONF and OF at least for pinconf_generic_dt_*, PINMUX at
least for pinmux_ops and GPIOLIB for at least gpio_chip.

Fixes: 23f75d7dfa ("pinctrl: axp209: add pinctrl features")

Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-12-20 09:13:14 +01:00
Quentin Schulz
449317a8b4 pinctrl: move gpio-axp209 to pinctrl
To prepare the driver for the upcoming pinctrl features, move the GPIO
driver AXP209 from GPIO to pinctrl subsystem.

Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-12-07 10:05:30 +01:00
Linus Torvalds
b630a23a73 This is the bulk of pin control changes for the v4.15
kernel cycle:
 
 Core:
 
 - The pin control Kconfig entry PINCTRL is now turned into
   a menuconfig option. This obviously has the implication of
   making the subsystem menu visible in menuconfig. This is
   happening because of two things:
 
   - Intel have started to deploy and depend on pin controllers
     in a way that is affecting users directly. This happens
     on the highly integrated laptop chipsets named after
     geographical places: baytrail, broxton, cannonlake,
     cedarfork, cherryview, denverton, geminilake, lewisburg,
     merrifield, sunrisepoint... It started a while back and
     now it is ever more evident that this is crucial
     infrastructure for x86 laptops and not an embedded
     obscurity anymore. Users need to be aware.
 
   - Pin control expanders on I2C and SPI that are
     arch-agnostic. Currently Semtech SX150X and Microchip
     MCP28x08 but more are expected. Users will have to be
     able to configure these in directly for their set-up.
 
 - Just go and select GPIOLIB now that we made sure that
   GPIOLIB is a very vanilla subsystem. Do not depend on
   it, if we need it, select it.
 
 - Exposing the pin control subsystem in menuconfig uncovered
   a bunch of obscure bugs that are now hopefully fixed,
   all more or less pertaining to Blackfin.
 
 - Unified namespace for cross-calls between pin control and
   GPIO.
 
 - New support for clock skew/delay generic DT bindings
   and generic pin config options for this.
 
 - Minor documentation improvements.
 
 Various:
 
 - The Renesas SH-PFC pin controller has evolved a lot. It seems
   Renesas are churning out new SoCs by the minute.
 
 - A bunch of non-critical fixes for the Rockchip driver.
 
 - Improve the use of library functions instead of open coding.
 
 - Support the MCP28018 variant in the MCP28x08 driver.
 
 - Static constifying.
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Merge tag 'pinctrl-v4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v4.15 kernel cycle:

  Core:

   - The pin control Kconfig entry PINCTRL is now turned into a
     menuconfig option. This obviously has the implication of making the
     subsystem menu visible in menuconfig. This is happening because of
     two things:

      (a) Intel have started to deploy and depend on pin controllers in
          a way that is affecting users directly. This happens on the
          highly integrated laptop chipsets named after geographical
          places: baytrail, broxton, cannonlake, cedarfork, cherryview,
          denverton, geminilake, lewisburg, merrifield, sunrisepoint...
          It started a while back and now it is ever more evident that
          this is crucial infrastructure for x86 laptops and not an
          embedded obscurity anymore. Users need to be aware.

      (b) Pin control expanders on I2C and SPI that are arch-agnostic.
          Currently Semtech SX150X and Microchip MCP28x08 but more are
          expected. Users will have to be able to configure these in
          directly for their set-up.

   - Just go and select GPIOLIB now that we made sure that GPIOLIB is a
     very vanilla subsystem. Do not depend on it, if we need it, select
     it.

   - Exposing the pin control subsystem in menuconfig uncovered a bunch
     of obscure bugs that are now hopefully fixed, all more or less
     pertaining to Blackfin.

   - Unified namespace for cross-calls between pin control and GPIO.

   - New support for clock skew/delay generic DT bindings and generic
     pin config options for this.

   - Minor documentation improvements.

  Various:

   - The Renesas SH-PFC pin controller has evolved a lot. It seems
     Renesas are churning out new SoCs by the minute.

   - A bunch of non-critical fixes for the Rockchip driver.

   - Improve the use of library functions instead of open coding.

   - Support the MCP28018 variant in the MCP28x08 driver.

   - Static constifying"

* tag 'pinctrl-v4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (91 commits)
  pinctrl: gemini: Fix missing pad descriptions
  pinctrl: Add some depends on HAS_IOMEM
  pinctrl: samsung/s3c24xx: add CONFIG_OF dependency
  pinctrl: gemini: Fix GMAC groups
  pinctrl: qcom: spmi-gpio: Add pmi8994 gpio support
  pinctrl: ti-iodelay: remove redundant unused variable dev
  pinctrl: max77620: Use common error handling code in max77620_pinconf_set()
  pinctrl: gemini: Implement clock skew/delay config
  pinctrl: gemini: Use generic DT parser
  pinctrl: Add skew-delay pin config and bindings
  pinctrl: armada-37xx: Add edge both type gpio irq support
  pinctrl: uniphier: remove eMMC hardware reset pin-mux
  pinctrl: rockchip: Add iomux-route switching support for rk3288
  pinctrl: intel: Add Intel Cedar Fork PCH pin controller support
  pinctrl: intel: Make offset to interrupt status register configurable
  pinctrl: sunxi: Enforce the strict mode by default
  pinctrl: sunxi: Disable strict mode for old pinctrl drivers
  pinctrl: sunxi: Introduce the strict flag
  pinctrl: sh-pfc: Save/restore registers for PSCI system suspend
  pinctrl: sh-pfc: r8a7796: Use generic IOCTRL register description
  ...
2017-11-16 10:57:11 -08:00
Linus Walleij
fd35b2023b pinctrl: Add some depends on HAS_IOMEM
Some compilation fallout from UM Linux (which does not have
IOMEM) makes it necessary to depend on HAS_IOMEM for drivers
that doesn't have other factors restricting their selection.

Cc: Phil Reid <preid@electromag.com.au>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Reported-by: R. Daneel Olivaw <kbuild-all@01.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-13 22:28:26 +01:00
Linus Walleij
1c5b7f3c34 pinctrl: gemini: Use generic DT parser
We can just use the generic Device Tree parser code
in this driver and save some code.

Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08 13:49:56 +01:00
Linus Walleij
1c363531dd pinctrl: adi2: Fix Kconfig build problem
The build robot is complaining on Blackfin:

drivers/pinctrl/pinctrl-adi2.c: In function 'port_setup':
>> drivers/pinctrl/pinctrl-adi2.c:221:21: error: dereferencing
   pointer to incomplete type 'struct gpio_port_t'
      writew(readw(&regs->port_fer) & ~BIT(offset),
                        ^~
drivers/pinctrl/pinctrl-adi2.c: In function 'adi_gpio_ack_irq':
>> drivers/pinctrl/pinctrl-adi2.c:266:18: error: dereferencing
pointer to incomplete type 'struct bfin_pint_regs'
      if (readl(&regs->invert_set) & pintbit)
                     ^~
It seems the driver need to include <asm/gpio.h> and <asm/irq.h>
to compile.

The Blackfin architecture was re-defining the Kconfig
PINCTRL symbol which is not OK, so replaced this with
PINCTRL_BLACKFIN_ADI2 which selects PINCTRL and PINCTRL_ADI2
just like most arches do.

Further, the old GPIO driver symbol GPIO_ADI was possible to
select at the same time as selecting PINCTRL. This was not
working because the arch-local <asm/gpio.h> header contains
an explicit #ifndef PINCTRL clause making compilation break
if you combine them. The same is true for DEBUG_MMRS.

Make sure the ADI2 pinctrl driver is not selected at the same
time as the old GPIO implementation. (This should be converted
to use gpiolib or pincontrol and move to drivers/...) Also make
sure the old GPIO_ADI driver or DEBUG_MMRS is not selected at
the same time as the new PINCTRL implementation, and only make
PINCTRL_ADI2 selectable for the Blackfin families that actually
have it.

This way it is still possible to add e.g. I2C-based pin
control expanders on the Blackfin.

Cc: Steven Miao <realmz6@gmail.com>
Cc: Huanhuan Feng <huanhuan.feng@analog.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-19 10:10:56 +02:00
Jerome Brunet
277d14eb81 pinctrl: meson: separate soc drivers
When meson pinctrl is enabled, all meson platforms pinctrl drivers are
built in the kernel, with a significant amount of data.

This leads to situation where pinctrl drivers targeting an architecture
are also compiled and shipped on another one (ex: meson8 - ARM - compiled
and shipped on ARM64 builds). This is a waste of memory we can easily
avoid.

This change makes 4 pinctrl drivers (1 per SoC) out the original single
driver, allowing to compile and ship only the ones required.

Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-16 23:14:10 +02:00
Linus Walleij
e2a021d449 pinctrl: Do not depend in GPIOLIB, select it
Instead of depends on GPIOLIB and having to run around in
Kconfig menus looking for why your device is not available,
simply select it from the pin control drivers that need it.

The Kconfig for GPIOLIB is improved, selectable and this
should "just work".

Cc: Phil Reid <preid@electromag.com.au>
Cc: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Cc: Peter Rosin <peda@axentia.se>
Cc: Andrey Smirnov <andrew.smirnov@gmail.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-12 09:15:33 +02:00
Phil Reid
d219b92461 pinctrl: change Kconfig PINCTRL variable to a menuconfig
This allows PINCTRL to be selected manually to allow enabling of the
mcp23s08 i2c/spi gpio driver. Which is not platform specific.

Signed-off-by: Phil Reid <preid@electromag.com.au>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-11 09:58:03 +02:00
Petr Mladek
83b31c2a5f pinctrl/amd: Fix build dependency on pinmux code
The commit 79d2c8bede ("pinctrl/amd: save pin registers over
suspend/resume") caused the following compilation errors:

drivers/pinctrl/pinctrl-amd.c: In function ‘amd_gpio_should_save’:
drivers/pinctrl/pinctrl-amd.c:741:8: error: ‘const struct pin_desc’ has no member named ‘mux_owner’
  if (pd->mux_owner || pd->gpio_owner ||
        ^
drivers/pinctrl/pinctrl-amd.c:741:25: error: ‘const struct pin_desc’ has no member named ‘gpio_owner’
  if (pd->mux_owner || pd->gpio_owner ||

We need to enable CONFIG_PINMUX for this driver as well.

Cc: stable@vger.kernel.org
Fixes: 79d2c8bede ("pinctrl/amd: save pin registers over suspend/resume")
Signed-off-by: Petr Mladek <pmladek@suse.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-27 15:50:11 +02:00
Linus Torvalds
968c61f7da - New Drivers
- RK805 Power Management IC (PMIC)
    - ROHM BD9571MWV-M MFD Power Management IC (PMIC)
    - Texas Instruments TPS68470 Power Management IC (PMIC) & LEDs
 
  - New Device Support
    - Add support for HiSilicon Hi6421v530 to hi6421-pmic-core
    - Add support for X-Powers AXP806 to axp20x
    - Add support for X-Powers AXP813 to axp20x
    - Add support for Intel Sunrise Point LPSS to intel-lpss-pci
 
  - New Functionality
    - Amend API to provide register layout; atmel-smc
 
 - Fix-ups
    - DT re-work; omap, nokia
    - Header file location change {I2C => MFD}; dm355evm_msp, tps65010
    - Fix chip ID formatting issue(s); rk808
    - Optionally register touchscreen devices; da9052-core
    - Documentation improvements; twl-core
    - Constification; rtsx_pcr, ab8500-core, da9055-i2c, da9052-spi
    - Drop unnecessary static declaration; max8925-i2c
    - Kconfig changes (missing deps and remove module support)
    - Slim down oversized licence statement; hi6421-pmic-core
    - Use managed resources (devm_*); lp87565
    - Supply proper error checking/handling; t7l66xb
 
  - Bug Fixes
    - Fix counter duplication issue; da9052-core
    - Fix potential NULL deference issue; max8998
    - Leave SPI-NOR write-protection bit alone; lpc_ich
    - Ensure device is put into reset during suspend; intel-lpss
    - Correct register offset variable size; omap-usb-tll
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Merge tag 'mfd-next-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull MFD updates from Lee Jones:
 "New Drivers
   - RK805 Power Management IC (PMIC)
   - ROHM BD9571MWV-M MFD Power Management IC (PMIC)
   - Texas Instruments TPS68470 Power Management IC (PMIC) & LEDs

  New Device Support:
   - Add support for HiSilicon Hi6421v530 to hi6421-pmic-core
   - Add support for X-Powers AXP806 to axp20x
   - Add support for X-Powers AXP813 to axp20x
   - Add support for Intel Sunrise Point LPSS to intel-lpss-pci

  New Functionality:
   - Amend API to provide register layout; atmel-smc

  Fix-ups:
   - DT re-work; omap, nokia
   - Header file location change {I2C => MFD}; dm355evm_msp, tps65010
   - Fix chip ID formatting issue(s); rk808
   - Optionally register touchscreen devices; da9052-core
   - Documentation improvements; twl-core
   - Constification; rtsx_pcr, ab8500-core, da9055-i2c, da9052-spi
   - Drop unnecessary static declaration; max8925-i2c
   - Kconfig changes (missing deps and remove module support)
   - Slim down oversized licence statement; hi6421-pmic-core
   - Use managed resources (devm_*); lp87565
   - Supply proper error checking/handling; t7l66xb

  Bug Fixes:
   - Fix counter duplication issue; da9052-core
   - Fix potential NULL deference issue; max8998
   - Leave SPI-NOR write-protection bit alone; lpc_ich
   - Ensure device is put into reset during suspend; intel-lpss
   - Correct register offset variable size; omap-usb-tll"

* tag 'mfd-next-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (61 commits)
  mfd: intel_soc_pmic: Differentiate between Bay and Cherry Trail CRC variants
  mfd: intel_soc_pmic: Export separate mfd-cell configs for BYT and CHT
  dt-bindings: mfd: Add bindings for ZII RAVE devices
  mfd: omap-usb-tll: Fix register offsets
  mfd: da9052: Constify spi_device_id
  mfd: intel-lpss: Put I2C and SPI controllers into reset state on suspend
  mfd: da9055: Constify i2c_device_id
  mfd: intel-lpss: Add missing PCI ID for Intel Sunrise Point LPSS devices
  mfd: t7l66xb: Handle return value of clk_prepare_enable
  mfd: Add ROHM BD9571MWV-M PMIC DT bindings
  mfd: intel_soc_pmic_chtwc: Turn Kconfig option into a bool
  mfd: lp87565: Convert to use devm_mfd_add_devices()
  mfd: Add support for TPS68470 device
  mfd: lpc_ich: Do not touch SPI-NOR write protection bit on Haswell/Broadwell
  mfd: syscon: atmel-smc: Add helper to retrieve register layout
  mfd: axp20x: Use correct platform device ID for many PEK
  dt-bindings: mfd: axp20x: Introduce bindings for AXP813
  mfd: axp20x: Add support for AXP813 PMIC
  dt-bindings: mfd: axp20x: Add AXP806 to supported list of chips
  mfd: Add ROHM BD9571MWV-M MFD PMIC driver
  ...
2017-09-07 13:51:13 -07:00
Baolin Wang
41d32cfce1 pinctrl: sprd: Add Spreadtrum pin control driver
This patch adds the pin control driver for Spreadtrum SC9860 platform.

Signed-off-by: Baolin Wang <baolin.wang@spreadtrum.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-31 09:23:14 +02:00
Joseph Chen
ea479996c7 pinctrl: Add pinctrl driver for the RK805 PMIC
RK805 is one of Rockchip PMICs family, it has 2 output only GPIOs.

This driver is also designed for other Rockchip PMICs to expend.
Different PMIC maybe have different pin features, for example,
RK816 has one pin which can be used for TS or GPIO(input/out).
The mainly difference between PMICs pins are pinmux, direction
and output value, that is 'struct rk805_pin_config'.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-08-21 08:54:46 +01:00
Linus Walleij
06351d133d pinctrl: add a Gemini SoC pin controller
This adds a pin control (only multiplexing) driver for the Gemini
SoC so we can sort out this complex platform in an orderly manner.

This driver will detect the chip/package version as SL3512 or SL3516
(also known as CS3512 and CS3516 etc) and register the apropriate
pin set.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-14 15:01:59 +02:00
Linus Walleij
df81b9411a pinctrl: sh-pfc: Updates for v4.13 (take two)
- Add SCIF1 and SCIF2 pin groups for R-Car V2H,
   - Add EtherAVB, DU parallel RGB output, and PWM pin groups for R-Car
     H3 ES2.0,
   - Add pin and gpio controller support for RZ/A1.
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Merge tag 'sh-pfc-for-v4.13-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: sh-pfc: Updates for v4.13 (take two)

  - Add SCIF1 and SCIF2 pin groups for R-Car V2H,
  - Add EtherAVB, DU parallel RGB output, and PWM pin groups for R-Car
    H3 ES2.0,
  - Add pin and gpio controller support for RZ/A1.
2017-06-29 15:05:51 +02:00
Jacopo Mondi
5a49b644b3 pinctrl: Renesas RZ/A1 pin and gpio controller
Add combined gpio and pin controller driver for Renesas RZ/A1
r7s72100 SoC.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-06-23 08:46:52 +02:00
Arnd Bergmann
adeac77549 pinctrl: mcp23s08: improve I2C Kconfig dependency
With "SPI_MASTER=y && I2C=m", we can build mcp23s08 as a built-in driver,
which then results in a link failure:

drivers/pinctrl/built-in.o: In function `mcp23s08_probe_one.isra.0':
:(.text+0x7910): undefined reference to `__devm_regmap_init_i2c'
drivers/pinctrl/built-in.o: In function `mcp23s08_init':
:(.init.text+0x110): undefined reference to `i2c_register_driver'
drivers/pinctrl/built-in.o: In function `mcp23s08_exit':
:(.exit.text+0x3c): undefined reference to `i2c_del_driver'

To avoid the problem, this adds another dependency on I2C that enforces
mcp23s08 to be a loadable module whenever the I2C core is a module.

Fixes: 64ac43e6fa ("gpio: mcp23s08: move to pinctrl")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-31 01:58:36 +02:00
Linus Walleij
c504985e3b gpio/pinctrl: ingenic: depend on OF
Fix compile errors due to missing OF.

Cc: Paul Cercueil <paul@crapouillou.net>
Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-29 13:41:50 +02:00
Linus Walleij
fe421052b3 Merge branch 'mcp23s08' into devel 2017-05-23 09:52:08 +02:00
Sebastian Reichel
25ca1cea78 pinctrl: mcp23s08: drop OF_GPIO dependency
The driver compiles & works perfectly fine without OF_GPIO on x86,
so lets drop the dependency.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-23 09:47:52 +02:00
Sebastian Reichel
82039d244f pinctrl: mcp23s08: add pinconf support
mcp23xxx device have configurable 100k pullup resistors. This adds
support for enabling them using pinctrl's pinconf interface.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-23 09:46:32 +02:00
Sebastian Reichel
64ac43e6fa gpio: mcp23s08: move to pinctrl
This moves the mcp23s08 driver from gpio to pinctrl. Actual
pinctrl support for configuration of the pull-up resistors
follows in its own patch.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-23 09:45:29 +02:00
Linus Walleij
bdb18d93a7 Merge branch 'ingenic' into devel 2017-05-22 17:27:18 +02:00
Paul Cercueil
b5c23aa465 pinctrl: add a pinctrl driver for the Ingenic jz47xx SoCs
This driver handles pin configuration and pin muxing for the
JZ4740 and JZ4780 SoCs from Ingenic.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-22 17:17:23 +02:00
Shawn Guo
cbff0c4d27 pinctrl: add ZTE ZX pinctrl driver support
The pin controller on ZTE ZX platforms is kinda of hybrid.  It consists
of a main controller and an auxiliary one.  For example, on ZX296718 SoC,
the main controller is TOP_PMM and the auxiliary one is AON_IOCFG.  Both
controllers work together to control pin multiplexing and configuration.

For most of pins, the pinmux function is controlled by main controller
only, and this type of pins are meant by term 'TOP pins'.  For other
pins, the pinmux is controlled by both main and auxiliary controllers,
as the available multiplexing functions for the pin spread in both
controllers.  This type of pins are called 'AON pins'.  Though pinmux
implementation is quite different, pinconf is same for both types of
pins.  Both are controlled by auxiliary controller, i.e. AON_IOCFG on
ZX296718.

The patch adds the ZTE ZX core pinctrl driver to support this hybrid
pin controller as well as ZX296718 SoC specific pin data.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-22 10:39:23 +02:00
Jesper Nilsson
00df0582ea pinctrl: Add pincontrol driver for ARTPEC-6 SoC
Add pinctrl driver support for the Axis ARTPEC-6 SoC.
There are only some pins that actually have different
functions available, but all can control bias (pull-up/-down)
and drive strength.

Code originally written by Chris Paterson.

Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-04-07 11:48:33 +02:00
Nishanth Menon
003910ebc8 pinctrl: Introduce TI IOdelay configuration driver
SoC family such as DRA7 family of processors have, in addition
to the regular muxing of pins (as done by pinctrl-single), a separate
hardware module called IODelay which is also expected to be configured.
The "IODelay" module has it's own register space that is independent
of the control module and the padconf register area.

With recent changes to the pinctrl framework, we can now support
this hardware with a reasonably minimal driver by using #pinctrl-cells,
GENERIC_PINCTRL_GROUPS and GENERIC_PINMUX_FUNCTIONS.

It is advocated strongly in TI's official documentation considering
the existing design of the DRA7 family of processors during mux or
IODelay reconfiguration, there is a potential for a significant glitch
which may cause functional impairment to certain hardware. It is
hence recommended to do as little of muxing as absolutely necessary
without I/O isolation (which can only be done in initial stages of
bootloader).

NOTE: with the system wide I/O isolation scheme present in DRA7 SoC
family, it is not reasonable to do stop all I/O operations for every
such pad configuration scheme. So, we will let it glitch when used in
this mode.

Even with the above limitation, certain functionality such as MMC has
mandatory need for IODelay reconfiguration requirements, depending on
speed of transfer. In these cases, with careful examination of usecase
involved, the expected glitch can be controlled such that it does not
impact functionality.

In short, IODelay module support as a padconf driver being introduced
here is not expected to do SoC wide I/O Isolation and is meant for
a limited subset of IODelay configuration requirements that need to
be dynamic and whose glitchy behavior will not cause functionality
failure for that interface.

IMPORTANT NOTE: we take the approach of keeping LOCK_BITs cleared
to 0x0 at all times, even when configuring Manual IO Timing Modes.
This is done by eliminating the LOCK_BIT=1 setting from Step
of the Manual IO timing Mode configuration procedure. This option
leaves the CFG_* registers unprotected from unintended writes to the
CTRL_CORE_PAD_* registers while Manual IO Timing Modes are configured.

This approach is taken to allow for a generic driver to exist in kernel
world that has to be used carefully in required usecases.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[tony@atomide.com: updated to use generic pinctrl functions, added
 binding documentation, updated comments]
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-09 19:43:21 +01:00
Tony Lindgren
571aec4df5 pinctrl: single: Use generic pinmux helpers for managing functions
We can now drop the driver specific code for managing functions.

Signed-off-by: Tony Lindgren <tony@atomide.com>
[Replaces GENERIC_PINMUX with GENERIC_PINMUX_FUNCTIONS]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-03 09:26:19 +01:00
Tony Lindgren
caeb774ea3 pinctrl: single: Use generic pinctrl helpers for managing groups
We can now drop the driver specific code for managing groups.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-03 09:26:19 +01:00
Tony Lindgren
a76edc89b1 pinctrl: core: Add generic pinctrl functions for managing groups
We can add generic helpers for function handling for cases where the pin
controller driver does not need to use static arrays.

Signed-off-by: Tony Lindgren <tony@atomide.com>
[Renamed the Kconfig item and moved things around]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-03 09:26:18 +01:00
Linus Walleij
c033a718f6 pinctrl: stricten up generic group code
Rename the symbol PINCTRL_GENERIC to PINCTRL_GENERIC_GROUPS since
it all pertains to groups. Replace everywhere.

ifdef out the radix tree and the struct when not using the
generic groups.

Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-03 09:26:18 +01:00
Tony Lindgren
c7059c5ac7 pinctrl: core: Add generic pinctrl functions for managing groups
We can add generic helpers for pin group handling for cases where the pin
controller driver does not need to use static arrays.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-03 09:26:17 +01:00
David Lechner
1ff91f0ae3 pinctrl: New driver for TI DA850/OMAP-L138/AM18XX pinconf
This adds a new driver for pinconf on TI DA850/OMAP-L138/AM18XX. These
SoCs have a separate controller for controlling pullup/pulldown groups.

Signed-off-by: David Lechner <david@lechnology.com>
Reviewed-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-12-07 15:27:00 +01:00
Andrey Smirnov
0db0f26c2c pinctrl-sx150x: Convert driver to use regmap API
To allow for future code simplification

Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-11-08 09:39:06 +01:00
Arnd Bergmann
24d6a91c9d pinctrl: max77620: add OF dependency
Drivers using pinconf_generic_params tables cannot be built with
CONFIG_OF disabled:

drivers/pinctrl/pinctrl-max77620.c:53:44: error: array type has incomplete element type ‘struct pinconf_generic_params’
drivers/pinctrl/pinctrl-max77620.c:55:3: error: field name not in record or union initializer
drivers/pinctrl/pinctrl-max77620.c:55:3: note: (near initialization for ‘max77620_cfg_params’)
drivers/pinctrl/pinctrl-max77620.c:56:3: error: field name not in record or union initializer

This adds a dependency for max77620 to disallow that configuration.

Alternatively, we could rework the pinctrl infrastructure to make the
configuration valid for compile-testing.

Cc: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Lee Jones <lee.jones@linaro.org>
Fixes: 453943dc8f45 ("mfd: Enable compile testing for max77620 and max77686")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-10-29 10:30:16 +02:00
Neil Armstrong
9e80f9064e pinctrl: Add SX150X GPIO Extender Pinctrl Driver
Since the I2C sx150x GPIO expander driver uses platform_data to manage
the pins configurations, rewrite the driver as a pinctrl driver using
pinconf to get/set pin configurations from DT or debugfs.

The pinctrl driver is functionnally equivalent as the gpio-only driver
and can use DT for pinconf. The platform_data confirmation is dropped.

This patchset removed the gpio-only driver and selects the Pinctrl driver
config instead. This patchset also migrates the gpio dt-bindings to pinctrl
and add the pinctrl optional properties.

The driver was tested with a SX1509 device on a BeagleBone black with
interrupt support and on an X86_64 machine over an I2C to USB converter.

This is a fixed version that builds and runs on non-OF platforms and on
arm based OF. The GPIO version is removed and the bindings are also moved
to the pinctrl bindings.

Changes since v2
 - rebased on v4.9-rc1
 - removed MODULE_DEVICE_TABLE as in upstream bb411e771b
   ("gpio: sx150x: fix implicit assumption module.h is present")

Changes since v1
 - Fix Kconfig descriptions on pinctrl and gpio
 - Fix Kconfig dependency
 - Remove oscio support for non-789 devices
 - correct typo in dt bindings
 - remove probe reset for non-789 devices

Changes since RFC
 - Put #ifdef CONFIG_OF/CONFIG_OF_GPIO to remove OF code for non-of platforms
 - No more rely on OF_GPIO config
 - Moved and enhanced bindings to pinctrl bindings
 - Removed gpio-sx150x.c
 - Temporary select PINCTRL_SX150X when GPIO_SX150X
 - Temporary mark GPIO_SX150X as deprecated

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Peter Rosin <peda@axentia.se>
Acked-by: Rob Herring <robh@kernel.org>
ested-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-10-24 16:30:40 +02:00
Andrew Jeffery
4d3d0e4272 pinctrl: Add core support for Aspeed SoCs
The Aspeed SoCs typically provide more than 200 pins for GPIO and other
functions. The signal enabled on a pin is determined on a priority
basis, where a given pin can provide a number of different signal types.

In addition to the priority levels, the Aspeed pin controllers describe
the signal active on a pin by compound logical expressions involving
multiple operators, registers and bits. Some difficulty arises as a
pin's function bit masks for each priority level are frequently not the
same (i.e. we cannot just flip a bit to change from a high to low
priority signal), or even in the same register(s). Some configuration
bits affect multiple pins, while in other cases the signals for a bus
must each be enabled individually.

Together, these features give rise to some complexity in the
implementation. A more complete description of the complexities is
provided in the associated header file.

The patch doesn't implement pinctrl/pinmux/pinconf for any particular
Aspeed SoC, rather it adds the framework for defining pinmux
configurations.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-09-07 16:48:22 +02:00
Paul Gortmaker
9385f35d64 pinctrl: as3722: convert PINCTRL_AS3722 from bool to tristate
The Kconfig currently controlling compilation of this code is:

config PINCTRL_AS3722
        bool "Pinctrl and GPIO driver for ams AS3722 PMIC"

...meaning that it currently is not being built as a module by anyone.

During an audit for non-modular drivers using modular infrastructure
this driver showed up.

But rather than demodularize it, Laxman indicated that it would be
prefereable to instead convert the driver option to tristate.

This does that, and confirms that it will compile and modpost as
such.  However, since I do not have the hardware to confirm that
no new runtime issues exist when modular, that remains untested.

Cc: Laxman Dewangan <ldewangan@nvidia.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-gpio@vger.kernel.org
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-22 18:09:24 +02:00
Paul Gortmaker
767b8ce361 pinctrl: palmas: convert PINCTRL_PALMAS from bool to tristate
The Kconfig currently controlling compilation of this code is:

config PINCTRL_PALMAS
        bool "Pinctrl driver for the PALMAS Series MFD devices"

...meaning that it currently is not being built as a module by anyone.

During an audit for non-modular drivers using modular infrastructure
this driver showed up.

But rather than demodularize it, Laxman indicated that it would be
prefereable to instead convert the driver option to tristate.

This does that, and confirms that it will compile and modpost as
such.  However, since I do not have the hardware to confirm that
no new runtime issues exist when modular, that remains untested.

Cc: Laxman Dewangan <ldewangan@nvidia.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-gpio@vger.kernel.org
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-22 18:08:31 +02:00
Arnd Bergmann
79f28b9fcd pinctrl: max77620: select PINMUX
The recently added max77620 driver fails to build when CONFIG_PINMUX
is not set:

pinctrl/pinctrl-max77620.c:272:21: error: variable 'max77620_pinmux_ops' has initializer but incomplete type
 static const struct pinmux_ops max77620_pinmux_ops = {
                     ^~~~~~~~~~
pinctrl/pinctrl-max77620.c:273:2: error: unknown field 'get_functions_count' specified in initializer

This adds the Kconfig 'select' statement that was clearly meant
to be there and is used in all other pinmux drivers.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-15 08:37:41 +02:00