The Inter-IC Sound Controller (I2SMCC) provides a 5-wire, bidirectional,
synchronous, digital audio link to external audio devices: I2SMCC_DIN,
I2SMCC_DOUT, I2SMCC_WS, I2SMCC_CK, and I2SMCC_MCK pins.
The I2SMCC complies with the Inter-IC Sound (I2S) bus specification and
supports a Time Division Multiplexed (TDM) interface with external
multi-channel audio codecs.
The I2SMCC consists of a receiver, a transmitter and a common clock
generator that can be enabled separately to provide Master, Slave or
Controller modes with receiver and/or transmitter active.
DMA Controller channels, separate for the receiver and for the transmitter,
allow a continuous high bit rate data transfer without processor
intervention to the following:
- Audio CODECs in Master, Slave, or Controller mode
- Stereo DAC or ADC through a dedicated I2S serial interface
- Multi-channel or multiple stereo DACs or ADCs, using the TDM format
This IP is embedded in Microchip's new sam9x60 SoC.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
