Commit Graph

7 Commits

Author SHA1 Message Date
Neil Armstrong
6a0ab255ae pinctrl: meson-gxl: Fix inverted registers and add missing pins
Fix some inverted bit numbers in some pinctrl groups and add missing pins
and groups to be in pair with the GXBB pinctrl pins definition.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-28 11:25:35 +02:00
Martin Blumenstingl
cc97a95f95 pinctrl: meson: gxl: add the missing PWM pin definitions
This adds support for the missing PWM pins on Meson GXL SoCs, namely:
- PWM_A
- PWM_B
- PWM_C
- PWM_F (GPIOX_7 and GPIOCLK_1 can be selected as output)
- PWM_AO_A (GPIOAO_3 and GPIOAO_8 can be selected as output)

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-23 09:46:04 +01:00
Linus Walleij
7f36f5d11c Linux 4.10-rc6
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Merge tag 'v4.10-rc6' into devel

Linux 4.10-rc6

Resolved conflicts in:
	drivers/pinctrl/pinctrl-amd.c
	drivers/pinctrl/samsung/pinctrl-exynos.c
2017-01-30 14:39:20 +01:00
Martin Blumenstingl
cff2b01025 pinctrl: meson: meson-gxl: add the pwm_ao_b pin
This adds support for the pwm_ao_b pin. Unfortunately the registers for
the pwm_ao pins are not documented at all. The source for the pwm_ao_b
pin from this patch is the Khadas VIM GPL kernel source, which sets bit
3 and unsets bits 4 and 31 to enable the PWM LEDs.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-26 15:40:46 +01:00
Martin Blumenstingl
b27e36482c pinctrl: meson: fix uart_ao_b for GXBB and GXL/GXM
The GXBB and GXL/GXM pinctrl drivers had a configuration which conflicts
with uart_ao_a. According to the GXBB ("S905") datasheet the AO UART
functions are:
- GPIOAO_0: Func1 = UART_TX_AO_A (bit 12), Func2 = UART_TX_AO_B (bit 26)
- GPIOAO_1: Func1 = UART_RX_AO_A (bit 11), Func2 = UART_RX_AO_B (bit 25)
- GPIOAO_4: Func2 = UART_TX_AO_B (bit 24)
- GPIOAO_5: Func2 = UART_RX_AO_B (bit 25)

The existing definition for uart_AO_A already uses GPIOAO_0 and GPIOAO_1.
The old definition of uart_AO_B however was broken, as it used GPIOAO_0
for TX (which would be fine) and two pins (GPIOAO_1 and GPIOAO_5) for RX
(which does not make any sense).

This fixes the uart_AO_B configuration by moving it to GPIOAO_4 and
GPIOAO_5 (it would be possible to use GPIOAO_0 and GPIOAO_1 in theory,
but all existing hardware uses uart_AO_A there).
The fix for GXBB and GXL/GXM is identical since it seems that these
specific pins are identical on both SoC variants.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-19 10:36:25 +01:00
Neil Armstrong
1fe8d6cbfb pinctrl: meson: Add HDMI HPD/DDC pins functions
Add pinctrl functions for HDMI HPD pin and DDC pins on Amlogic Meson
GXL and GXBB SoCs.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-18 13:27:30 +01:00
Neil Armstrong
0f15f500ff pinctrl: meson: Add GXL pinctrl definitions
Add support for the Amlogic Meson GXL SoC, this is a partially complete
definition only based on the Amlogic Vendor tree.

This definition differs a lot from the GXBB and needs a separate entry.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-11-04 23:05:06 +01:00