Commit Graph

17742 Commits

Author SHA1 Message Date
Rob Clark
b7bbd6406a drm/msm: select REGULATOR
Fixes a potential error, spotted by Felipe with randconfig:

-----
drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c: In function ‘mdp4_kms_init’:
drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c:384:2: error: implicit declaration \
        of function ‘devm_regulator_get_exclusive’ [-Werror=implicit-function-declaration]
  mdp4_kms->vdd = devm_regulator_get_exclusive(&pdev->dev, "vdd");
  ^
drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c:384:16: error: assignment makes \
        pointer from integer without a cast [-Werror]
  mdp4_kms->vdd = devm_regulator_get_exclusive(&pdev->dev, "vdd");
                ^
-----

Also add a brief comment explaining the use of _get_exclusive()

Reported-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-16 14:22:42 -05:00
Dave Airlie
ca5a71de48 drm: Sanitize DRM_IOCTL_MODE_CREATE_DUMB input
Some drivers erroneously treat the .pitch and .size fields of struct
 drm_mode_create_dumb as inputs. While the include/uapi/drm/drm_mode.h
 header has a comment denoting them as outputs, that seemingly wasn't
 enough to make drivers use them properly.
 
 The result is that some userspace doesn't explicitly zero out those
 fields, assuming that the kernel won't use them. That causes problems
 since the data within the structure might be uninitialized, so bogus
 data may end up confusing drivers (ridiculously large values for the
 pitch, ...).
 
 This series attempts to improve the situation by fixing all drivers to
 not use the output fields. Furthermore to spare new drivers this bad
 surprise, the DRM core now zeros out these fields prior to handing the
 data structure to the driver.
 
 Lessons learned from this are that future IOCTLs should be properly
 documented (in the DRM DocBook for example) and should be rigorously
 defined. To prevent misuse like this, userspace should be required to
 zero out all output fields. The kernel should check for this and fail
 if that's not the case.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABAgAGBQJUZKbcAAoJEN0jrNd/PrOh57QQAKdX7ASd4XVhMC6fuVGXHUXI
 HVZuJ3Own+e3aAJKhZ2DZ263+PtBLfe3+eEF1WRWqZcDu647Nj3wSV64celdZdIl
 WHU2RokxneHTPHlttZ+MLhVwtzSddO8712iLU/2B7Rg/MNlN9tv9tbRtGqPWwlzg
 IZNAdU5etnm+YDYil8/I8f84+5vT59Z/X2NHbq+jReD3V6I2WBAK6zlRIy4o54io
 fccK7M6+uGlbNmtPwoKXufeiqTxxdYYelZoQzO4NjWEhdU0LoUnTFdfqISSdt3HV
 26NwTmqVTx38AD5bGwot2b1VFEkja5tkP7G+DeFkj0DRHbFfAQK/tNeqdf9xq4gQ
 UEVjljyEW6dauibtT6ASk2RoTmQmMVWw44aSulcaz6eVqa21zpEwOZVMX/VW3QM+
 vKh4Vy6eVbCHmdOiXgtQSexQAN6uO1o9cHEGamJQpMshm+kax9T7hBdcHMH0ORtL
 uEYHXzqB/bbkhAodHTraoZ5aM8YFwS2TgGtCJoYw1GHehMhjpJG9HaDlL50lkObk
 LDUShta8AwN9iu3/qmkaYaxkbBPEnRtU9d9qO6S1NsZugBmmEUj6lNKFOK13U9Ho
 vjKWTpB4USgKdrTwJXEAXJTBmubwrPBnZb1vdCovCtC3JS7sXUH8AM/E6tp4Q0Go
 idGCjMglaSFO8EUeScFT
 =QZIW
 -----END PGP SIGNATURE-----

Merge tag 'drm/gem-cma/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux into drm-next

drm: Sanitize DRM_IOCTL_MODE_CREATE_DUMB input

Some drivers erroneously treat the .pitch and .size fields of struct
drm_mode_create_dumb as inputs. While the include/uapi/drm/drm_mode.h
header has a comment denoting them as outputs, that seemingly wasn't
enough to make drivers use them properly.

The result is that some userspace doesn't explicitly zero out those
fields, assuming that the kernel won't use them. That causes problems
since the data within the structure might be uninitialized, so bogus
data may end up confusing drivers (ridiculously large values for the
pitch, ...).

This series attempts to improve the situation by fixing all drivers to
not use the output fields. Furthermore to spare new drivers this bad
surprise, the DRM core now zeros out these fields prior to handing the
data structure to the driver.

Lessons learned from this are that future IOCTLs should be properly
documented (in the DRM DocBook for example) and should be rigorously
defined. To prevent misuse like this, userspace should be required to
zero out all output fields. The kernel should check for this and fail
if that's not the case.

* tag 'drm/gem-cma/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux:
  drm/cma: Remove call to drm_gem_free_mmap_offset()
  drm: Sanitize DRM_IOCTL_MODE_CREATE_DUMB input
  drm/rcar: gem: dumb: pitch is an output
  drm/omap: gem: dumb: pitch is an output
  drm/cma: Introduce drm_gem_cma_dumb_create_internal()
  drm/doc: Add GEM/CMA helpers to kerneldoc
  drm/doc: mm: Fix indentation
  drm/gem: Fix a few kerneldoc typos
2014-11-15 09:50:21 +10:00
Dave Airlie
7dea0941f8 drm/qxl: use suggested x/y offset properties to pass guest prefs
This passes the guest preferences for a where to place the
outputs through to userspace. Userspace would need to be updated
to take note of this information, X server and GNOME.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-15 09:47:48 +10:00
Dave Airlie
5bb2bbf596 drm: add properties for suggested x/y offset for connectors. (v2)
Virtual GPUs would like to give the guest some indication where on the screen
the outputs are layed out. So far we only provide modes, these
properties could be exposed to userspace so the desktop environment
could use them as hints to set the correct offsets.

v2: rename properties to be more consistent.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-15 09:43:23 +10:00
Daniel Vetter
baf698b049 drm: Simplify return value handling in drm_crtc.c
While looking through drm_crtc.c to double-check make locking changes
I've noticed that there's a few other places that would now benefit
from simplified return value handling.

So let's flatten the control flow and replace and always 0 ret with 0
where possible.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-15 09:40:33 +10:00
Dave Airlie
b0654103f5 drm/tegra: Changes for v3.19-rc1
The highlights in this pull request are:
 
   * IOMMU support: The Tegra DRM driver can now deal with discontiguous
     buffers if an IOMMU exists in the system. That means it can allocate
     using drm_gem_get_pages() and will map them into IOVA space via the
     IOMMU API. Similarly, non-contiguous PRIME buffers can be imported
     from a different driver, which allows better integration with gk20a
     (nouveau) and less hacks.
 
   * Universal planes: This is precursory work for atomic modesetting and
     will allow hardware cursor support to be implemented on pre-Tegra114
     where RGB cursors were not supported.
 
   * DSI ganged-mode support: The DSI controller can now gang up with a
     second DSI controller to drive high resolution DSI panels.
 
 Besides those bigger changes there is a slew of fixes, cleanups, plugged
 memory leaks and so on.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABAgAGBQJUZM29AAoJEN0jrNd/PrOhd1EP/iGBGppcPiYhFI6CC2V5IyGO
 j4GaNU656QQj0RNS3RH0Oby0oHdQum2rFNtHnkGYjoXFiSznId3OwVQ1+Y1s5804
 BkPSR1Q3fyIfsQdGA9DEkVGuyavCEbJ9yOalIBLda456nxfkPFBJdNjq5AJDT2N1
 J54MSRtV3fV5Uerd7WbmiNdLyuly4Gyyb7ApotOQEsfYvaGgobdpMRGyp38tvYbD
 pNDZ69iYBSJmaVaF1a/NxFw3/25CSHakY5J95R9eXK1Y3BKDBhqHo7b1L1XMt1L5
 yKEy+eqjnnB7/itszjKG3dnMHunKsch9C+nyxR4xKMf036Pesz65tMbg07Pd0cIy
 oYZMDGdm380d0mu41LydN7zK/ZZf6bBfcZallnxk1CSEQB6BcMZhOmQP2aa8r9rU
 VdaNGlNio7XAjVGDsd8Y652y27NH7VJTpx3nxXB0f7eyGg7AlfLKxOFehDE+beVJ
 OAzRQrHJ63vOIAUg21G84W4cvpsVSG4FomgRTXC8Se6WcwP3TWD5MmOzLYNjbFnb
 ayuIiIfNtyu2KJU60hCOqWQg05UcWIYRkvxmdnQQcFyItmw4qJzh9ep7ebAqTx0t
 0p0y5/O7KGYKS1pB7o1XJtL84N7SPiNGB3fdwiGryl9Z7hypuhKS7/lRBDTiiTAd
 Ok1HHSRDxTaiGhrN3TKH
 =v4QW
 -----END PGP SIGNATURE-----

Merge tag 'drm/tegra/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux into drm-next

drm/tegra: Changes for v3.19-rc1

The highlights in this pull request are:

  * IOMMU support: The Tegra DRM driver can now deal with discontiguous
    buffers if an IOMMU exists in the system. That means it can allocate
    using drm_gem_get_pages() and will map them into IOVA space via the
    IOMMU API. Similarly, non-contiguous PRIME buffers can be imported
    from a different driver, which allows better integration with gk20a
    (nouveau) and less hacks.

  * Universal planes: This is precursory work for atomic modesetting and
    will allow hardware cursor support to be implemented on pre-Tegra114
    where RGB cursors were not supported.

  * DSI ganged-mode support: The DSI controller can now gang up with a
    second DSI controller to drive high resolution DSI panels.

Besides those bigger changes there is a slew of fixes, cleanups, plugged
memory leaks and so on.

* tag 'drm/tegra/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux: (44 commits)
  drm/tegra: gem: Check before freeing CMA memory
  drm/tegra: fb: Add error codes to error messages
  drm/tegra: fb: Properly release GEM objects on failure
  drm/tegra: Detach panel when a connector is removed
  drm/tegra: Plug memory leak
  drm/tegra: gem: Use more consistent data types
  drm/tegra: fb: Do not destroy framebuffer
  drm/tegra: gem: dumb: pitch and size are outputs
  drm/tegra: Enable the hotplug interrupt only when necessary
  drm/tegra: dc: Universal plane support
  drm/tegra: dc: Registers are 32 bits wide
  drm/tegra: dc: Factor out DC, window and cursor commit
  drm/tegra: Add IOMMU support
  drm/tegra: Fix error handling cleanup
  drm/tegra: gem: Use dma_mmap_writecombine()
  drm/tegra: gem: Remove redundant drm_gem_free_mmap_offset()
  drm/tegra: gem: Cleanup tegra_bo_create_with_handle()
  drm/tegra: gem: Extract tegra_bo_alloc_object()
  drm/tegra: dsi: Set up PHY_TIMING & BTA_TIMING registers earlier
  drm/tegra: dsi: Replace 1000000 by USEC_PER_SEC
  ...
2014-11-15 09:38:55 +10:00
Dave Airlie
4fb2ac6ebe drm: Miscellaneous fixes for v3.19-rc1
This is a small collection of fixes that I've been carrying around for a
 while now. Many of these have been posted and reviewed or acked. The few
 that haven't I deemed too trivial to bother.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABAgAGBQJUZKenAAoJEN0jrNd/PrOhNwkQAJTGxhol/k0Vj+P+HVj+MROU
 9EEw67mh/c2Y4zQxEmWRE/rHdIgoz4zPL5hoJLLjPmorvKil6BIfURUybxYu9n3b
 MrunoA7adxvL+Uce+XMkuvWUE2fxFNaEwU+FT66Ib+Lo8A25FZXBqo125/RmhAHZ
 EQKcr0MBH76jybYoyB1H1pf/O3i6qODmh3kXT4Fved3jf5mZNPl5wgCSSr/4ilOZ
 wx3pzG3BvIrsyvGF6Q0oAjDEbaBTOhglfAvPFhC16cfhtPJMzVvx6v/abtipMjRv
 pUY3t96BvL1pyszcEc/ykjDX/ODlY00uOe1GgRSSXS/bThF0HJP14rTpjO+6ycON
 rap17o2feRuK3c2NzLMqv4bjkaNF/ut+2YnByulJWnpg1dDjIpJOzJ6Heep5D6+H
 lV5QP0B9LGI4718le2tv5hkH0NnQygiyRlACRzLBpq9gnXuSoSZYxjo6SuVid1X8
 Ebs+QKNoTl1NEYeEvT/CnC552MdWzntcNjE9SA1yj0RgrIS87x8bmXqh/zAwa2dI
 1Lq1wZ965ruDUPCGrd6jE8JiiEEXJjJr0y6zA4LBnR+OvmR/2GN7KCwjX+jwBthq
 9dyO9YEnxSXT/dFEUumx3F4ZKcPUntT61pT6ZblIljiJ5vw6SegDXdWDc+eZ4QyD
 y2YyxRL+KxPftkeyfU4j
 =OUaP
 -----END PGP SIGNATURE-----

Merge tag 'drm/fixes/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux into drm-next

drm: Miscellaneous fixes for v3.19-rc1

This is a small collection of fixes that I've been carrying around for a
while now. Many of these have been posted and reviewed or acked. The few
that haven't I deemed too trivial to bother.

* tag 'drm/fixes/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux:
  video/hdmi: Relicense header under MIT license
  drm/gma500: mdfld: Reuse video/mipi_display.h
  drm: Make drm_mode_create_tv_properties() signature consistent
  drm: Implement drm_get_pci_dev() dummy for !PCI
  drm/prime: Use unsigned type for number of pages
  drm/gem: Fix typo in kerneldoc
  drm: Use const data when creating blob properties
  drm: Use size_t for blob property sizes
2014-11-15 09:37:20 +10:00
Dave Airlie
8aa3dc3c17 drm/panel: Changes for v3.19-rc1
This contains support for a couple of new panels, updates for some GPIO
 API changes and a bunch of updates to the MIPI DSI support that should
 make it easier to write panel drivers in the future.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABAgAGBQJUZKsmAAoJEN0jrNd/PrOhvoQP/Ryl8OHSEOB6vNxn7cmz3nQf
 0l+2Q3V3qpJALC3Dlm57kSF1760mHNjPuwiVLhjINn5zcDS4kB3Llgx/dmAzgTZA
 Ikm8iDgcOmlBUBE1W5YuzdSCXJK8Eth9JQiA4yQVS0RWi+WEClwb+F7KBLi+9Ep3
 1C3qURrBAfe9DRzU4GswrsCzBQACCKH8f+2OcYeFMW0eMa7ejHNs+n0wi6lMLvLn
 JrxEuMBKWdXbM2sw4UXvpVZm3CTh8dJtXBkpwOBK75XhY9DSsrqmbdk0qKIDCY+y
 JB/5UTU2sg37ZFnvhFoHN10AtXWnGbwS2iCitNSmKaBOARVbcoWk9pJtR3AHc44c
 cpLVTsJgZStYZAydtVZKQDJWLNTnTMtyLPcy9eq6kLMc8sVe930U8IsGQyihyyUU
 cSDP8Z6THZ2zHqfDnmogjm8XWsUa+LimNwAgm5oub8JKxdqGb49J8ry+Ny4a19cS
 MgqVZE85K9aF7e/VxeGFiIpUb5ax5bLQxrcpVJg/d2TFuftNBslmL3FOkvEbwrLM
 WS9KJ8e8VIRNoI5dtemfx0+LGlLwoPaUWSeWpb8OxUAuy6e5NabazkFQuCb5E+HM
 JLqnMFCCVvwtGyr+DrFiF4ye8ZTZNcFcdidgB4mr9D5k7RksyeZTT4vz13y2JyAr
 VcfbBQICIQzn91osEetJ
 =+xMK
 -----END PGP SIGNATURE-----

Merge tag 'drm/panel/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux into drm-next

drm/panel: Changes for v3.19-rc1

This contains support for a couple of new panels, updates for some GPIO
API changes and a bunch of updates to the MIPI DSI support that should
make it easier to write panel drivers in the future.

* tag 'drm/panel/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux: (31 commits)
  drm/panel: Add Sharp LQ101R1SX01 support
  drm/dsi: Do not require .owner field to be set
  drm/dsi: Resolve MIPI DSI device from phandle
  drm/dsi: Implement DCS set_{column,page}_address commands
  drm/dsi: Implement DCS {get,set}_pixel_format commands
  drm/dsi: Implement DCS get_power_mode command
  drm/dsi: Implement DCS soft_reset command
  drm/dsi: Implement DCS nop command
  drm/dsi: Add to DocBook documentation
  drm/dsi: Implement some standard DCS commands
  drm/dsi: Implement generic read and write commands
  drm/panel: s6e8aa0: Use standard MIPI DSI function
  drm/dsi: Add mipi_dsi_set_maximum_return_packet_size() helper
  drm/dsi: Constify mipi_dsi_msg
  drm/dsi: Make mipi_dsi_dcs_{read,write}() symmetrical
  drm/dsi: Add DSI transfer helper
  drm/dsi: Add message to packet translator
  drm/dsi: Introduce packet format helpers
  drm/panel: s6e8aa0: Fix build warnings on 64-bit
  drm/panel: ld9040: Fix build warnings on 64-bit
  ...
2014-11-15 09:36:13 +10:00
Dave Airlie
fd172d0c47 Merge tag 'drm-intel-next-2014-11-07-fixups' of git://anongit.freedesktop.org/drm-intel into drm-next
- skl watermarks code (Damien, Vandana, Pradeep)
- reworked audio codec /eld handling code (Jani)
- rework the mmio_flip code to use the vblank evade logic and wait for rendering
  using the standard wait_seqno interface (Ander)
- skl forcewake support (Zhe Wang)
- refactor the chv interrupt code to use functions shared with vlv (Ville)
- prep work for different global gtt views (Tvrtko Ursulin)
- precompute the display PLL config before touching hw state (Ander)
- completely reworked panel power sequencer code for chv/vlv (Ville)
- pre work to split the plane update code into a prepare and commit phase
  (Gustavo Padovan)
- golden context for skl (Armin Reese)
- as usual tons of fixes and improvements all over

* tag 'drm-intel-next-2014-11-07-fixups' of git://anongit.freedesktop.org/drm-intel: (135 commits)
  drm/i915: Use correct pipe config to update pll dividers. V2
  drm/i915: Plug memory leak in intel_shared_dpll_start_config()
  drm/i915: Update DRIVER_DATE to 20141107
  drm/i915: Add gen to the gpu hang ecode
  drm/i915: Cache HPLL frequency on VLV/CHV
  Revert "drm/i915/vlv: Remove check for Old Ack during forcewake"
  drm/i915: Make mmio flip wait for seqno in the work function
  drm/i915: Make __wait_seqno non-static and rename to __i915_wait_seqno
  drm/i915: Move the .global_resources() hook call into modeset_update_crtc_power_domains()
  drm/i915/audio: add DOC comment describing HDA over HDMI/DP
  drm/i915: make pipe/port based audio valid accessors easier to use
  drm/i915/audio: add audio codec enable debug log for g4x
  drm/i915/audio: add audio codec disable on g4x
  drm/i915: enable audio codec after port
  drm/i915/audio: add vlv/chv/gen5-7 audio codec disable sequence
  drm/i915/audio: rewrite vlv/chv and gen 5-7 audio codec enable sequence
  drm/i915/skl: Enable Gen9 RC6
  drm/i915/skl: Gen9 Forcewake
  drm/i915/skl: Log the order in which we flush the pipes in the WM code
  drm/i915/skl: Flush the WM configuration
  ...
2014-11-15 09:33:40 +10:00
Chris Wilson
b853fdb3c0 drm/dp/mst: Handle invalid link bandwidth from DPCD gracefully
Don't BUG out if the link reports an invalid (or plain unknown)
bandwidth value, but report the failure and fail gracefully.

Fixes a trivial compiler warning in case the BUG is ever compiled away.

Link: http://lkml.kernel.org/p/1415785566-12758-1-git-send-email-geert@linux-m68k.org
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Dave Airlie <airlied@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-15 09:31:34 +10:00
Rob Clark
db88362884 drm/atomic: rip out unnecessary locking checks
For async commit, it is *intentional* that those locks are not held.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-15 09:30:24 +10:00
Boris BREZILLON
d7f8db5300 drm: flip-work: change drm_flip_work_init prototype
Now that we're using lists instead of kfifo to store drm flip-work tasks
we do not need the size parameter passed to drm_flip_work_init function
anymore.
Moreover this function cannot fail anymore, we can thus remove the return
code.

Modify drm_flip_work_init users to take account of these changes.

[airlied: fixed two unused variable warnings]

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-15 09:29:14 +10:00
Boris BREZILLON
8bd4ae2028 drm: rework flip-work helpers to avoid calling func when the FIFO is full
Make use of lists instead of kfifo in order to dynamically allocate
task entry when someone require some delayed work, and thus preventing
drm_flip_work_queue from directly calling func instead of queuing this
call.
This allow drm_flip_work_queue to be safely called even within irq
handlers.

Add new helper functions to allocate a flip work task and queue it when
needed. This prevents allocating data within irq context (which might
impact the time spent in the irq handler).

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-15 09:25:35 +10:00
Bob Paauwe
e1f234bde6 drm/i915: Use correct pipe config to update pll dividers. V2
Use the new pipe config values to calculate the updated pll dividers.

This regression was introduced in

commit 0dbdf89f27b17ae1eceed6782c2917f74cbb5d59
Author: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Date:   Wed Oct 29 11:32:33 2014 +0200

    drm/i915: Add infrastructure for choosing DPLLs before disabling crtcs

	and

	commit 00d958817dd3daaa452c221387ddaf23d1e4c06f
	Author: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
	Date:   Wed Oct 29 11:32:36 2014 +0200

	    drm/i915: Covert remaining platforms to choose DPLLS before disabling CRTCs

v2: Use intel_pipe_will_have_type() to look at new configuration - Ander

Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com>
CC: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Tested-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-11-14 10:28:52 +01:00
Thierry Reding
7e0180e357 drm/tegra: gem: Check before freeing CMA memory
dma_free_writecombine() must not be called on a buffer that couldn't be
allocated. Check for a valid virtual address before attempting to free
the memory to avoid a crash.

Reported-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:34 +01:00
Thierry Reding
cb10c81fdf drm/tegra: fb: Add error codes to error messages
This helps in determining what errors happened at specifics points in
the initialization sequence.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:34 +01:00
Thierry Reding
b88f005ea3 drm/tegra: fb: Properly release GEM objects on failure
When fbdev initialization fails, make sure to unreference the GEM
objects properly. Note that we can't do this in the general error
unwinding path because ownership of the GEM object references is
transferred to the framebuffer upon creation.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:33 +01:00
Thierry Reding
9aaa0cebcb drm/tegra: Detach panel when a connector is removed
When the DRM device is torn down and the connector is removed, make sure
to detach the panel to make sure there are no dangling pointers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:33 +01:00
Thierry Reding
1053f4dd82 drm/tegra: Plug memory leak
Free the DRM device-private memory upon driver unload to make sure the
memory doesn't leak.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:32 +01:00
Thierry Reding
71c38629d6 drm/tegra: gem: Use more consistent data types
Use size_t consistently for sizes and u32/u64 instead of uint32_t and
uint64_t.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:32 +01:00
Thierry Reding
3feaf3e5ae drm/tegra: fb: Do not destroy framebuffer
Drop a reference instead of directly calling the framebuffer .destroy()
callback at fbdev free time. This is necessary to make sure the object
isn't destroyed if anyone else still has a reference.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:32 +01:00
Thierry Reding
dc6057ecb3 drm/tegra: gem: dumb: pitch and size are outputs
When creating a dumb buffer object using the DRM_IOCTL_MODE_CREATE_DUMB
IOCTL, only the width, height, bpp and flags parameters are inputs. The
caller is not guaranteed to zero out or set handle, pitch and size, so
the driver must not treat these values as possible inputs.

Fixes a bug where running the Weston compositor on Tegra DRM would cause
an attempt to allocate a 3 GiB framebuffer to be allocated.

Fixes: de2ba664c3 ("gpu: host1x: drm: Add memory manager and fb")
Cc: stable@vger.kernel.org
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:31 +01:00
Thierry Reding
8fc8f7da97 drm/tegra: Enable the hotplug interrupt only when necessary
The hotplug handling needs access to the DRM device, which only appears
at ->init() time. Disable interrupts up until that time. Similarly, when
an output is removed, disable the hotplug interrupt again because the
DRM device (and with it the hotplug infrastructure) is going away.

Also make sure to only access the DRM device if it's available. Given
the above change for the hotplug interrupt this should really never
happen, but the extra check doesn't hurt either.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:31 +01:00
Thierry Reding
c7679306a9 drm/tegra: dc: Universal plane support
This allows the primary plane and cursor to be exposed as regular
DRM/KMS planes, which is a prerequisite for atomic modesetting and gives
userspace more flexibility over controlling them.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:28 +01:00
Thierry Reding
03a6056976 drm/tegra: dc: Registers are 32 bits wide
Using an unsigned long type will cause these variables to become 64-bit
on 64-bit SoCs. In practice this should always work, but there's no need
for carrying around the additional 32 bits.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:17:03 +01:00
Thierry Reding
205d48edee drm/tegra: dc: Factor out DC, window and cursor commit
The sequence to commit changes to the DC, window or cursor configuration
is repetitive and can be extracted into separate functions for ease of
use.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:17:01 +01:00
Thierry Reding
df06b759f2 drm/tegra: Add IOMMU support
When an IOMMU device is available on the platform bus, allocate an IOMMU
domain and attach the display controllers to it. The display controllers
can then scan out non-contiguous buffers by mapping them through the
IOMMU.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:14:48 +01:00
Thierry Reding
1d1e6fe9b5 drm/tegra: Fix error handling cleanup
The DRM driver's ->load() implementation didn't do a good job (no job at
all really) cleaning up on failure. Fix that by undoing any prior setup
when an error occurs. This requires a bit of rework to make it possible
to clean up fbdev midway.

This was tested by injecting errors at various points during the
initialization sequence and verifying that error cleanup didn't crash
and no memory leaked (using kmemleak).

Reported-by: Stéphane Marchesin <marcheu@chromium.org>
Reported-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:14:48 +01:00
Thierry Reding
53ea72132d drm/tegra: gem: Use dma_mmap_writecombine()
Use the existing API rather than open-coding equivalent functionality
in the driver.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:14:48 +01:00
Thierry Reding
e55a8bd8ea drm/tegra: gem: Remove redundant drm_gem_free_mmap_offset()
The drm_gem_object_release() function already performs this cleanup, so
there is no reason to do it explicitly.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:14:47 +01:00
Thierry Reding
a8b48df592 drm/tegra: gem: Cleanup tegra_bo_create_with_handle()
There is only a single location where the function needs to do cleanup.
Skip the error unwinding path and call the cleanup function directly
instead.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:14:47 +01:00
Thierry Reding
c28d4a317f drm/tegra: gem: Extract tegra_bo_alloc_object()
This function implements the common buffer object allocation used for
both allocation and import paths.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:14:46 +01:00
Sean Paul
7e3bc3a98f drm/tegra: dsi: Set up PHY_TIMING & BTA_TIMING registers earlier
Make sure the DSI PHY_TIMING and BTA_TIMING registers are initialized
when the clocks are set up as opposed to when the output is enabled.
This makes sure that the PHY timings are properly set up when the panel
is prepared and that DCS commands sent at that time use the appropriate
timings.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:44 +01:00
Thierry Reding
030611ecc5 drm/tegra: dsi: Replace 1000000 by USEC_PER_SEC
Using the symbolic constant instantly provides a lot more context.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:41 +01:00
Thierry Reding
369bc65b6b drm/tegra: dsi: Replace 1000000000UL by NSEC_PER_SEC
Using the symbolic constant instantly provides a lot more context.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:39 +01:00
Thierry Reding
0fffdf6ca9 drm/tegra: dsi: Implement host transfers
Add support for sending MIPI DSI command packets from the host to a
peripheral. This is required for panels that need configuration before
they accept video data.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:36 +01:00
Thierry Reding
e94236cde4 drm/tegra: dsi: Add ganged mode support
Implement ganged mode support for the Tegra DSI driver. The DSI host
controller to gang up with is specified via a phandle in the device tree
and the resolved DSI host controller used for the programming of the
ganged-mode registers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:28 +01:00
Thierry Reding
3f6b406f7d drm/tegra: dsi: Split out tegra_dsi_set_timeout()
In preparation for adding ganged-mode support, this commit splits out
the tegra_dsi_set_timeout() function so that it can be reused for the
slave DSI controller.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:26 +01:00
Thierry Reding
337b443d58 drm/tegra: dsi: Add command mode support
Add support for DC-driven command mode. This is a mode where the video
stream sent by the display controller is packed into DCS command packets
(write_memory_start and write_memory_continue) by the DSI controller. It
can be used for panels with a remote framebuffer and is useful to save
power when used with a dynamic refresh rate (not yet supported by the
driver).

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:23 +01:00
Thierry Reding
563eff1f98 drm/tegra: dsi: Refactor in preparation for command mode
For command mode panels, the DSI controller needs to be enabled and
configured so that panel drivers can send commands prior to the video
stream being enabled.

Move code from the monolithic output enable/disable functions into
smaller, reusable units to allow more fine-grained control over the
controller state.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:20 +01:00
Thierry Reding
d2d0a9d212 drm/tegra: dsi: Properly cleanup on probe failure
The driver wasn't even attempting to do any cleanup when probing failed.
Fix this by releasing any resources acquired up to the point of failure
and putting the device back into the original state (reset, clocks off).

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:18 +01:00
Thierry Reding
ba3df97922 drm/tegra: dsi: Mark connector hotpluggable
DSI panels can always be hotplugged via the DSI bus' attach/detach
infrastructure, so unconditionally mark the connector hotpluggable.

While at it, also make sure that when a panel is detached the connector
is marked unconnected before calling into the DRM hotplug helpers to
reflect the correct state.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:16 +01:00
Thierry Reding
41a8e72e0e drm/tegra: dsi: Leave parent clock alone
The common clock framework will take care of preparing and enabling the
parent of the DSI clock automatically.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:13 +01:00
Thierry Reding
183ef2883d drm/tegra: dsi: Do not manage clock on enable/disable
In preparation for supporting command mode panels, don't disable the
clock when the output is disabled. The output will be enabled only after
the panel has been programmed in command mode, so the clock must always
remain on.

As a side-effect, pad calibration now only needs to be done at driver
probe time, since neither power nor controller state will go away before
driver removal. While at it, use a 32-bit variable to store register
content because the registers are 32-bit even on 64-bit Tegra.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:10 +01:00
Thierry Reding
976cebc35b drm/tegra: dsi: Make FIFO depths host parameters
Rather than hardcoding them as macros, make the host and video FIFO
depths parameters so that they can be more easily adjusted if a new
generation of the Tegra SoC changes them.

While at it, set the depth of the video FIFO to the correct value of
1920 *words* rather than *bytes*.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:07 +01:00
Sean Paul
0bfad39671 drm/tegra: DPMS off/on in encoder prepare/commit
Previously the panel and output were only enabled on encoder->dpms(). If
userspace called dpms on before doing a modeset, the driver would get into
a state where the connector had a dpms state of ON, but the encoder and output
were not enabled (because the encoder is not yet attached to the connector).
Subsequent dpms ON calls are ignored b/c the connector's state already matches
the desired state.

This patch enables/disables the panel and output on modeset as well, so we
can catch the above case.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:04 +01:00
Thierry Reding
dc670e49e7 drm/tegra: Do not enable output on .mode_set()
The output is already enabled in .dpms(), doing it in .mode_set() too
can cause noticeable flicker.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:12:02 +01:00
Thierry Reding
9c0127004f drm/tegra: dc: Add powergate support
Both display controllers are in their own power partition. Currently the
driver relies on the assumption that these partitions are on (which is
the hardware default). However some bootloaders may disable them, so the
driver must make sure to turn them back on to avoid hangs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:11:59 +01:00
Sean Paul
b298e98ef6 gpu: host1x: mipi: Set MIPI_CAL_BIAS_PAD_CFG1 register
During calibration, sets the "internal reference level for drive pull-
down" to the value specified in the Tegra TRM.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:11:57 +01:00
Sean Paul
08a15cc34d gpu: host1x: mipi: Calibrate clock lanes
Include the clock lanes when calibrating the MIPI PHY on Tegra124
compatible devices.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
[treding@nvidia.com: bikeshedding]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:11:54 +01:00