Add clock support for Vybrid VF610. It uses dtc macro support to
define all clock IDs in vf610-clock.h to keep clock IDs coherence
between kernel and DT.
Signed-off-by: Jingchang Lu <b35083@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add clock support for i.MX6 SoloLite. It uses the dtc marco support to
define all clock IDs in imx6sl-clock.h, which will be included by both
clock driver and device tree sources, so that the data will stay sync
all the time between kernel and DT.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This driver adds support the Cortex-A9 based SoCs from Rockchip,
so at least the RK2928, RK3066 (a and b) and RK3188.
Earlier Rockchip SoCs seem to use similar mechanics for gpio
handling so should be supportable with relative small changes.
Pull handling on the rk3188 is currently a stub, due to it being
a bit different to the earlier SoCs.
Pinmuxing as well as gpio (and interrupt-) handling tested on
a rk3066a based machine.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
- DMA binding update with one patch shared with slave-dma tree
- more SPI DT activation
- enable the USB gadget HS for DT platforms
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJRu5r2AAoJEAf03oE53VmQvAsIAMa06mb42kGJQ6JhUV0HcL+8
+a2FHN076DreWEtM5vq9ibIEF2pnz+XHafUYGRfjfYRsbEfy41N0OmISNBwIRgP6
yKB6ZnGQp21Fw/SwOGntuEw0PH9bQmM9pNYttMlBfvMlM3TdFWc2fztwvqpP71x4
a1zOsLRNYLk4WO33gh50bRTQeS81GRvn3hrGPKKFXuC7AQ0TCHOH/l1c1Fo5INpk
TiQMy5JvkrJNSerdq23u5uAp2zstuhiVMbSY6eWQwJy1RfOSqVYY91KzGKGpOPT2
g6LB/Z6sZ5wwJ8jbbPV1XAEl45oojPDyNl+KxJc5gir5wfWEVpoayRt1Nfggz98=
=MZkL
-----END PGP SIGNATURE-----
Merge tag 'at91-dt' of git://github.com/at91linux/linux-at91 into next/dt
From Nicolas Ferre:
Again some nice DT updates for AT91:
- DMA binding update with one patch shared with slave-dma tree
- more SPI DT activation
- enable the USB gadget HS for DT platforms
* tag 'at91-dt' of git://github.com/at91linux/linux-at91:
ARM: at91: sam9m10g45ek add udc DT support
ARM: at91: sam9g45 add udc DT support
ARM: at91: sam9x5ek add udc DT support
ARM: at91: sam9x5 add udc DT support
ARM: at91: dt: at91sam9x5: add SPI DMA client infos
ARM: at91: dt: switch DMA DT bindings to pre-processor
ARM: at91: dt: add header to define at_hdmac configuration
This branch contains all device tree updates for Tegra boards.
The changes are:
* Converted all DT files to use the C pre-processor, to support the use
of named constants. This included use of defines for GPIO, IRQ, and
clock constants.
* Enabling new features such as:
- SPI on Dalmore.
- Audio on Dalmore and Beaver.
- gpio-leds on Beaver.
- Power-supply/batter linkage on Dalmore.
* A minor fix to the RAM size node on Beaver.
It is based on previous pull request tegra-for-3.11-deps-for-usb
followed by a merge of tegra-for-3.11-deps-for-clk.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRu0J2AAoJEMzrak5tbycxUEMP/iTyH5lQZ6NadMyR765G0++Y
XzMrZDgkTu1tqbWo4NhKeYuRThoSwDReq+yfecTWLXGBHjxQ5SZ7mSi1arQLF2Gt
rdKaOe0BibeFg55OM3S02XPG5wPz7vw/f0lXXz8nI2dq59QU59+dx1zfWDrXPAKc
62AKTTx0Wnn5ZljNrvRgZd5wT17pj2CfSHyEV7tdJAxyW13V6aSoQFBxrJcStKrg
N0i5WfOgmmoraNbu7zV+7iRyQc5cmJgjGNQ5lkThHQoFV4tSM64op5cCPWW/9ZC/
USOWrGQLm3vexJnCm9Y7JmPZR4n+PgPffDYKVXHSidd74kM2t7qciHs39sEgIVRT
DJb6AU1xxJw7Lbb8pcae+8Zy4xrcQPdbYzHj1LH08VliCNO4rC5PCwCPYB0AcA6u
DSeU2eYALvnKxUoJga9cLeeUsDwfwjOcNvWM2YkAoSDe3h5hQhwVgq9HxTpKvMpz
5MSsPjQ9zLSFAdU72SIRXJlnMLxezqok9j631dyk+3rLC24ARmklQbvBcpG7hc7Y
lo9JJz4MBF3y55v71H5Ytz7dh+8cb2bPYckCI8CpxH9gx2qVFgqbK+gKucR8VbyY
jJJe6Bvb/5BA9lQOh97HObewE9sJbh3olGZTFl3yOgML0tuUXNnpPKkqGpWYlgJS
+us+/0GXZctU3vT2zlR0
=4sJe
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.11-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/dt
From Stephen Warren:
ARM: tegra: device tree updates
This branch contains all device tree updates for Tegra boards.
The changes are:
* Converted all DT files to use the C pre-processor, to support the use
of named constants. This included use of defines for GPIO, IRQ, and
clock constants.
* Enabling new features such as:
- SPI on Dalmore.
- Audio on Dalmore and Beaver.
- gpio-leds on Beaver.
- Power-supply/batter linkage on Dalmore.
* A minor fix to the RAM size node on Beaver.
It is based on previous pull request tegra-for-3.11-deps-for-usb
followed by a merge of tegra-for-3.11-deps-for-clk.
* tag 'tegra-for-3.11-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (21 commits)
ARM: tegra: enable audio on Beaver
ARM: tegra: enable audio on Dalmore
ARM: tegra: add power-supplies link between battery and charger
ARM: tegra: add audio-related nodes to Tegra114 DT
ARM: tegra114: convert device tree files to use CLK defines
ARM: tegra30: convert device tree files to use CLK defines
ARM: tegra20: convert device tree files to use CLK defines
ARM: tegra: Add charger subnode to tps65090 node
ARM: tegra: convert device tree files to use IRQ defines
ARM: tegra: convert device tree files to use GPIO defines
ARM: tegra: create a DT header defining GPIO IDs
ARM: tegra: use #include for all device trees
ARM: tegra: Add gpio-leds to Tegra30 Beaver
ARM: tegra: fix memory size on Beaver
ARM: tegra: enable spi4 on Dalmore
ARM: tegra114: create a DT header defining CLK IDs
ARM: tegra30: create a DT header defining CLK IDs
ARM: tegra20: create a DT header defining CLK IDs
ARM: tegra: update device trees for USB binding rework
ARM: tegra: modify ULPI reset GPIO properties
...
Signed-off-by: Olof Johansson <olof@lixom.net>
DMA-cell content is a concatenation of several values. In order to keep this
stuff human readable, macros are introduced.
The values for the FIFO configuration are not the same as the ones used in the
configuration register in order to keep backward compatibility. Most devices
use the half FIFO configuration but USART ones have to use the ASAP
configuration. This parameter was not initially planed to be into the at91 dma
dt binding. The third cell will be used to store this parameter, it will
become a concatenation of the FIFO configuration and of the peripheral ID. In
order to keep backward compatibility i.e. FIFO configuration is equal to 0, we
have to perform a translation since the value to put in the register to set
half FIFO is 1.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
All Tegra GPIOs are named after the GPIO bank and GPIO number within
the bank. Define a macro to calculate the GPIO ID based on those
parameters. Make the macro available via all Tegra .dtsip files.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Create a header file to define the clock IDs used by the Tegra114 clock
binding. Remove the list of definitions from the binding documentation,
and refer the reader to the header file.
This will allow the same header to be used by both device tree files,
and drivers implementing this binding, which guarantees that the two
stay in sync. This also makes device trees more readable by using names
instead of magic numbers.
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
[swarren, add header to clock/ instead of clk/ to match binding location]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Create a header file to define the clock IDs used by the Tegra30 clock
binding. Remove the list of definitions from the binding documentation,
and refer the reader to the header file.
This will allow the same header to be used by both device tree files,
and drivers implementing this binding, which guarantees that the two
stay in sync. This also makes device trees more readable by using names
instead of magic numbers.
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
[swarren, add header to clock/ instead of clk/ to match binding location]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Create a header file to define the clock IDs used by the Tegra20 clock
binding. Remove the list of definitions from the binding documentation,
and refer the reader to the header file.
This will allow the same header to be used by both device tree files,
and drivers implementing this binding, which guarantees that the two
stay in sync. This also makes device trees more readable by using names
instead of magic numbers.
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
[swarren, add header to clock/ instead of clk/ to match binding location]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The ARM GIC binding defines a few custom cells and flags for its IRQ
specifier. Provide names for those.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Many IRQ device tree bindings use the same flags. Create a header to
define those.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Many GPIO device tree bindings use the same flags. Create a header to
define those.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>