Commit Graph

1161 Commits

Author SHA1 Message Date
Linus Torvalds
79e615420c ARM: SoC fixes for 3.14-rc
A collection of fixes for ARM platforms. A little large due to us missing to
 do one last week, but there's nothing in particular here that is in itself
 large and scary.
 
 Mostly a handful of smaller fixes all over the place. The majority is made
 up of fixes for OMAP, but there are a few for others as well. In particular,
 there was a decision to rename a binding for the Broadcom pinctrl block that
 we need to go in before the final release since we then treat it as ABI.
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from from Olof Johansson:
 "A collection of fixes for ARM platforms.  A little large due to us
  missing to do one last week, but there's nothing in particular here
  that is in itself large and scary.

  Mostly a handful of smaller fixes all over the place.  The majority is
  made up of fixes for OMAP, but there are a few for others as well.  In
  particular, there was a decision to rename a binding for the Broadcom
  pinctrl block that we need to go in before the final release since we
  then treat it as ABI"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: dts: omap3-gta04: Add ti,omap36xx to compatible property to avoid problems with booting
  ARM: tegra: add LED options back into tegra_defconfig
  ARM: dts: omap3-igep: fix boot fail due wrong compatible match
  ARM: OMAP3: Fix pinctrl interrupts for core2
  pinctrl: Rename Broadcom Capri pinctrl binding
  pinctrl: refer to updated dt binding string.
  Update dtsi with new pinctrl compatible string
  ARM: OMAP: Kill warning in CPUIDLE code with !CONFIG_SMP
  ARM: OMAP2+: Add support for thumb mode on DT booted N900
  ARM: OMAP2+: clock: fix clkoutx2 with CLK_SET_RATE_PARENT
  ARM: OMAP4: hwmod: Fix SOFTRESET logic for OMAP4
  ARM: DRA7: hwmod data: correct the sysc data for spinlock
  ARM: OMAP5: PRM: Fix reboot handling
  ARM: sunxi: dt: Change the touchscreen compatibles
  ARM: sun7i: dt: Fix interrupt trigger types
2014-03-09 19:27:31 -07:00
Barry Song
e291fd20ef pinctrl: sirf: fix kernel panic in gpio_lock_as_irq
commit 655dada627 causes kernel panic, this patch fixes it.

    [    1.197816] [ffffffee] *pgd=0d7fd821, *pte=00000000, *ppte=00000000
    [    1.204070] Internal error: Oops: 17 [#1] PREEMPT SMP ARM
    [    1.209447] Modules linked in:
    [    1.212490] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.14.0-rc1 #3
    [    1.218737] task: cd03c000 ti: cd040000 task.ti: cd040000
    [    1.224127] PC is at gpiod_lock_as_irq+0xc/0x64
    [    1.228634] LR is at sirfsoc_gpio_irq_startup+0x18/0x44
    [    1.233842] pc : [<c01d3990>]    lr : [<c01d1c38>]    psr: a0000193
    [    1.233842] sp : cd041d30  ip : 00000000  fp : 00000000
    [    1.245296] r10: 00000000  r9 : cd023db4  r8 : 60000113
    [    1.250505] r7 : 0000003e  r6 : cd023dd4  r5 : c06bfa54  r4 : cd023d80
    [    1.257014] r3 : 00000020  r2 : 00000000  r1 : ffffffea  r0 : ffffffea
    [    1.263526] Flags: NzCv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
    [    1.270903] Control: 10c53c7d  Table: 00004059  DAC: 00000015
    [    1.276631] Process swapper/0 (pid: 1, stack limit = 0xcd040240)
    [    1.282620] Stack: (0xcd041d30 to 0xcd042000)
    [    1.286963] 1d20:                                     cd023d80 c01d1c38 c01d1c20 cd023d80
    [    1.295124] 1d40: 00000001 c0068438 cd023d80 ccb6d880 cd023dd4 c0067044 0000718e c006719c
    [    1.286963] 1d20:                                     cd023d80 c01d1c38 c01d1c20 cd023d80
    [    1.295124] 1d40: 00000001 c0068438 cd023d80 ccb6d880 cd023dd4 c0067044 0000718e c006719c
    [    1.295124] 1d40: 00000001 c0068438 cd023d80 ccb6d880 cd023dd4 c0067044 0000718e c006719c
    [    1.303283] 1d60: 00000800 00000083 ccb6d880 cd023d80 c02b41d8 00000083 0000003e ccb7c410
    [    1.311442] 1d80: 00000000 c00671dc 00000083 0000003e c02b41d8 cd3dd5c0 0000003e ccb7c634
    [    1.319601] 1da0: cd040030 c00672a8 cd3dd5c0 ccb7c410 ccb6d340 ccb7c410 ccb6d340 cd3dd400
    [    1.327760] 1dc0: cd3dd410 c02b4434 ccb7c410 c01265a8 00000001 cd3dd410 c0687108 00000000
    [    1.335919] 1de0: c0687108 00000000 00000000 c0240170 c0240158 cd3dd410 c06c30d0 c023e8bc
    [    1.344079] 1e00: c023e9d4 00000000 cd3dd410 c023e9d4 c0682150 c023cf88 cd003e98 cd2d50c4
    [    1.352238] 1e20: cd3dd410 cd3dd444 c06822f0 c023e768 cd3dd418 cd3dd410 c06822f0 c023de14
    [    1.360397] 1e40: cd3dd418 00000000 cd3dd410 c023c398 cd041e78 cd041ea8 cd3dd400 cd3dd410
    [    1.368556] 1e60: 00000083 00000000 cd3dd400 cd3dd410 00000083 000000c8 c04e00c8 c023fee8
    [    1.376715] 1e80: 00000000 cd041ea8 cd3dd400 00000001 00000083 c024048c c0435ef8 c0434dec
    [    1.384874] 1ea0: c068da58 c04c6d04 c0682150 c0435ef8 ffffffff 00000000 00000000 c068da58
    [    1.393033] 1ec0: 00000020 00000000 00000000 00000000 c05dabb8 00000007 c068d640 c068d640
    [    1.401193] 1ee0: c04c247c c04c249c 00000000 c00088e8 cd004c00 c043bbb8 cd029180 c03812a0
    [    1.409352] 1f00: 00000000 00000000 60000113 c0673728 60000113 c0673728 00000000 00000000
    [    1.417511] 1f20: cd7fce01 c0390a54 00000065 c003a81c c049e8bc 00000007 cd7fce0e 00000007
    [    1.425670] 1f40: 00000000 c05dabb8 00000007 c068d640 c068d640 c04c050c c04e00c8 00000065
    [    1.433829] 1f60: c04e00c0 c04c0c54 00000007 00000007 c04c050c c037d8fc cd03c000 c004322c
    [    1.441988] 1f80: c0662b40 0000d640 c03737c0 00000000 00000000 00000000 00000000 00000000
    [    1.450147] 1fa0: 00000000 c03737cc 00000000 c000e478 00000000 00000000 00000000 00000000
    [    1.458307] 1fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
    [    1.466467] 1fe0: 00000000 00000000 00000000 00000000 00000013 00000000 0002d481 05014092
    [    1.474640] [<c01d3990>] (gpiod_lock_as_irq) from [<c01d1c38>] (sirfsoc_gpio_irq_startup+0x18/0x44)
    [    1.483661] [<c01d1c38>] (sirfsoc_gpio_irq_startup) from [<c0068438>] (irq_startup+0x34/0x6c)
    [    1.492163] [<c0068438>] (irq_startup) from [<c0067044>] (__setup_irq+0x450/0x4b8)
    [    1.499714] [<c0067044>] (__setup_irq) from [<c00671dc>] (request_threaded_irq+0xa8/0x128)
    [    1.507960] [<c00671dc>] (request_threaded_irq) from [<c00672a8>] (request_any_context_irq+0x4c/0x7c)
    [    1.517164] [<c00672a8>] (request_any_context_irq) from [<c02b4434>] (gpio_extcon_probe+0x144/0x1d4)
    [    1.526279] [<c02b4434>] (gpio_extcon_probe) from [<c0240170>] (platform_drv_probe+0x18/0x48)
    [    1.534783] [<c0240170>] (platform_drv_probe) from [<c023e8bc>] (driver_probe_device+0x120/0x238)
    [    1.543641] [<c023e8bc>] (driver_probe_device) from [<c023cf88>] (bus_for_each_drv+0x58/0x8c)
    [    1.552143] [<c023cf88>] (bus_for_each_drv) from [<c023e768>] (device_attach+0x74/0x88)
    [    1.560126] [<c023e768>] (device_attach) from [<c023de14>] (bus_probe_device+0x84/0xa8)
    [    1.568113] [<c023de14>] (bus_probe_device) from [<c023c398>] (device_add+0x440/0x520)
    [    1.576012] [<c023c398>] (device_add) from [<c023fee8>] (platform_device_add+0xb4/0x214)
    [    1.584084] [<c023fee8>] (platform_device_add) from [<c024048c>] (platform_device_register_full+0xb8/0xdc)
    [    1.593719] [<c024048c>] (platform_device_register_full) from [<c04c6d04>] (sirfsoc_init_late+0xec/0xf4)
    [    1.603185] [<c04c6d04>] (sirfsoc_init_late) from [<c04c249c>] (init_machine_late+0x20/0x28)
    [    1.611603] [<c04c249c>] (init_machine_late) from [<c00088e8>] (do_one_initcall+0xf8/0x144)
    [    1.619934] [<c00088e8>] (do_one_initcall) from [<c04c0c54>] (kernel_init_freeable+0x13c/0x1dc)
    [    1.628620] [<c04c0c54>] (kernel_init_freeable) from [<c03737cc>] (kernel_init+0xc/0x118)

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-03-05 17:11:47 +08:00
Magnus Damm
b5973fcd76 pinctrl: sh-pfc: r8a7791: SD1_CLK fix
Fix the SD1_CLK handling for r8a7791. Without this patch
it is impossible to request all pins needed for SDHI1 on
the Koelsch board.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-03-05 09:57:47 +08:00
Josh Cartwright
5ba341604a pinctrl: msm: make PINCTRL_MSM bool instead of tristate
Modular builds of pinctrl-msm break due to handle_bad_irq being
unexported for module use.  For now, make PINCTRL_MSM 'bool'.

Signed-off-by: Josh Cartwright <joshc@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-03-05 09:57:47 +08:00
Hans de Goede
ef5aff05f1 pinctrl: sunxi: Fix interrupt register offset calculation
This fixing setting the interrupt type for eints >= 8.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-03-05 09:57:42 +08:00
Hans de Goede
d82f94013a pinctrl: sunxi: Fix masking when setting irq type
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-03-05 09:57:36 +08:00
Chen-Yu Tsai
905a5117e7 pinctrl: sunxi: use chained_irq_{enter, exit} for GIC compatibility
On tha Allwinner A20 SoC, the external interrupts on the pin controller
device are connected to the GIC. Without chained_irq_{enter, exit},
external GPIO interrupts, such as used by mmc core card detect, cause
the system to hang.

This issue was first encountered during my attempt to get out-of-band
interrupts for WiFi on the Cubietruck working. With David's new series
of sunci-mci using mmc slot-gpio for (GPIO interrupt based) card
detection, removing the SD card also causes my Cubietruck to hang. This
problem should extend to all Allwinner A20 based boards.

With this fix, the system no longer hangs when I remove or insert the
SD card. /proc/interrupts show that the interrupt has correctly fired.
However the system still does not detect card removal/insertion. I
believe this is another unrelated issue.

Cc: stable@vger.kernel.org
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-03-05 09:57:10 +08:00
Christian Daudt
d0deca0276 pinctrl: refer to updated dt binding string.
Bring the driver in line with the bcm-based dt name for pinctrl.
This is being done to keep consistency with other Broadcom mobile
SoC drivers.

Signed-off-by: Christian Daudt <bcm@fixthebug.org>
Reviewed-by: Matt Porter <mporter@linaro.org>
2014-02-24 20:25:54 -08:00
Laxman Dewangan
5b232c5add pinctrl: tegra: return correct error type
When memory allocation failed, drive should return error as ENOMEM.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-06 14:21:19 +01:00
Florian Vaussard
e7f2a44489 pinctrl: do not init debugfs entries for unimplemented functionalities
Commit c420619 "pinctrl: pinconf: remove checks on ops->pin_config_get"
removed the check on (ops != NULL) when performing pinconf_pins_show() or
pinconf_groups_show(). As these entries are always enabled, even if
pinconf is not supported, reading will result in an oops due to NULL
ops.

Instead of checking for ops, remove the corresponding debugfs entries if
pinconf and/or pinmux are not implemented.

Tested on OMAP3 (pinctrl-single).

Cc: stable@vger.kernel.org
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-06 13:48:17 +01:00
Stanislaw Gruszka
7b320cb1ed pinctrl: protect pinctrl_list add
We have few fedora bug reports about list corruption on pinctrl,
for example:
https://bugzilla.redhat.com/show_bug.cgi?id=1051918

Most likely corruption happen due lack of protection of pinctrl_list
when adding new nodes to it. Patch corrects that.

Fixes: 42fed7ba44 ("pinctrl: move subsystem mutex to pinctrl_dev struct")
Cc: stable@vger.kernel.org
Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-04 21:59:45 +01:00
Qipan Li
fa74d0d3e3 pinctrl: sirf: correct the pin index of ac97_pins group
according to datasheet and ac97_muxmask assignment, ac97_pins should be
corrected.

Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-03 09:08:17 +01:00
Chris Ruehl
e3365d0974 pinctrl: imx27: fix offset calculation in imx_read_2bit
The offset for the 2bit register calculate wrong, this patch
fixes the problem. The debugfs printout for oconf, iconfa, iconfb
now shows the real values.

Cc: stable@vger.kernel.org
Signed-off-by: Chris Ruehl <chris.ruehl@gtsys.com.hk>
Reviewed-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-03 09:08:09 +01:00
Tony Prisk
f17248ed86 pinctrl: vt8500: Change devicetree data parsing
Due to an assumption in the VT8500 pinctrl driver, the value passed
from devicetree for 'wm,pull' was not explicitly translated before
being passed to pinconf.

Since v3.10, changes to 'enum pin_config_param', PIN_CONFIG_BIAS_PULL_(UP/DOWN)
no longer map 1-to-1 with the expected values in devicetree.

This patch adds a small translation between the devicetree values (0..2)
and the enum pin_config_param equivalent values.

Cc: <stable@vger.kernel.org> # v3.10+
Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-03 09:08:01 +01:00
Chris Ruehl
795779df22 pinctrl: imx27: fix wrong offset to ICONFB
The offset to ICONFB was incorrect, this patch set the correct value 0x14.
dev_dbg in function imx1_write_2bit print the wrong address and had been
moved after address calculation.

Cc: stable@vger.kernel.org
Signed-off-by: Chris Ruehl <chris.ruehl@gtsys.com.hk>
Reviewed-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-03 09:07:52 +01:00
Nicolas Ferre
b0dcfd8732 pinctrl: at91: use locked variant of irq_set_handler
When setting the gpio irq type, use the __irq_set_handler_locked()
variant instead of the irq_set_handler() to prevent false
spinlock recursion warning.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: stable <stable@vger.kernel.org> # v3.12
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-03 09:07:30 +01:00
Linus Torvalds
9b6d351a75 ARM: SoC DT updates for 3.14
DT and DT-conversion-related changes for various ARM platforms. Most
 of these are to enable various devices on various boards, etc, and not
 necessarily worth enumerating.
 
 New boards and systems continue to come in as new devicetree files that
 don't require corresponding C changes any more, which is indicating that
 the system is starting to work fairly well.
 
 A few things worth pointing out:
 
 * ST Ericsson ux500 platforms have made the major push to move over to fully
   support the platform with DT.
 * Renesas platforms continue their conversion over from legacy platform devices
   to DT-based for hardware description.
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Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC DT updates from Olof Johansson:
 "DT and DT-conversion-related changes for various ARM platforms.  Most
  of these are to enable various devices on various boards, etc, and not
  necessarily worth enumerating.

  New boards and systems continue to come in as new devicetree files
  that don't require corresponding C changes any more, which is
  indicating that the system is starting to work fairly well.

  A few things worth pointing out:

   * ST Ericsson ux500 platforms have made the major push to move over
     to fully support the platform with DT
   * Renesas platforms continue their conversion over from legacy
     platform devices to DT-based for hardware description"

* tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (327 commits)
  ARM: dts: SiRF: add pin group for USP0 with only RX or TX frame sync
  ARM: dts: SiRF: add lost usp1_uart_nostreamctrl pin group for atlas6
  ARM: dts: sirf: add lost minigpsrtc device node
  ARM: dts: sirf: add clock, frequence-voltage table for CPU0
  ARM: dts: sirf: add lost bus_width, clock and status for sdhci
  ARM: dts: sirf: add lost clocks for cphifbg
  ARM: dts: socfpga: add pl330 clock
  ARM: dts: socfpga: update L2 tag and data latency
  arm: sun7i: cubietruck: Enable the i2c controllers
  ARM: dts: add support for EXYNOS4412 based TINY4412 board
  ARM: dts: Add initial support for Arndale Octa board
  ARM: bcm2835: add USB controller to device tree
  ARM: dts: MSM8974: Add MMIO architected timer node
  ARM: dts: MSM8974: Add restart node
  ARM: dts: sun7i: external clock outputs
  ARM: dts: sun7i: Change 32768 Hz oscillator node name to clk@N style
  ARM: dts: sun7i: Add pin muxing options for clock outputs
  ARM: dts: sun7i: Add rtp controller node
  ARM: dts: sun5i: Add rtp controller node
  ARM: dts: sun4i: Add rtp controller node
  ...
2014-01-23 18:45:38 -08:00
Linus Torvalds
ac26663572 MFD changes due for the v3.14 merge window
New drivers
  - Samsung Maxim 14577; Micro USB, Regulator, IRQ Controller and Battery Charger
  - TI/National Semiconductor LP3943 I2C GPIO Expander and PWM Generator
 
 Existing driver adaptions
  - Expansion of Wolfson Arizona DSP and High-Pass filter controls
  - TI TWL6040 default Regmap support and Regcache addition/bypass
  - Some nice Smatch catch fixes
  - Conversion of TI OMAP-USB and TI TWL6030 to endian neutralness
  - ChromeOS EC timing (delay) adaptions and added dependency on OF
  - Many constifications of 'struct {mfd_cell,regmap_irq,et. al}'
  - Watchdog support added for NVIDIA AS3722
  - Convert functions to static in TI AM335x
  - Realigned previously defeated functionality in TI AM335x
  - IIO ADC-TSC concurrency dead-lock/timeout resolution
  - Addition of Power Management and Clock support for Samsung core
  - DEFINE_PCI_DEVICE_TABLE macro removal from MFD Subsystem
  - Greater use of irqdomain functionality in ST-E AB8500
  - Removal of 'include/linux/mfd/abx500/ab8500-gpio.h'
  - Wolfson WM831x PMIC Power Management changes s/poweroff/shutdown/
  - Device Tree documentation added for TI/Nat Semi LP3943
  - Version detection and voltage tables for TI TPS6586x PMIC devices
  - Simplification of Freescale MC13XXX (de-)initialisation routines
  - Clean-up and simplification of the Realtek parent driver
  - Added support for RTL8402 Realtek PCI-Express card reader
  - Resource leak fix for Maxim 77686
  - Possible suspend BUG() fix in OMAP USB TLL
  - Support for new Wolfson WM5110 Revision (D)
  - Testing of automatic assignment of of_node in mfd_add_device()
    - Reversion of the above when it started to cause issues
  - Remove legacy Platform Data from;
               TI TWL Core, Qualcomm SSBI and ST-E ABx500 Pinctrl
  - Clean-ups; tabbing issues, function name changes, 'drvdata = NULL' removal,
               unused uninitialised warning mitigation, error message clarity,
               removal of redundant/duplicate checks, licensing (GPL -> GPL2),
               coding consistency, duplicate function declaration, ret checks,
               commit corrections, redundant of_match_ptr() helper removal,
               spelling, #if-deffery removal and header guards name changes
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Merge tag 'mfd-3.14-1' of git://git.linaro.org/people/ljones/mfd

Pull MFD changes from Lee Jones:
 "New drivers
   - Samsung Maxim 14577; Micro USB, Regulator, IRQ Controller and
     Battery Charger
   - TI/National Semiconductor LP3943 I2C GPIO Expander and PWM
     Generator

  Existing driver adaptions
   - Expansion of Wolfson Arizona DSP and High-Pass filter controls
   - TI TWL6040 default Regmap support and Regcache addition/bypass
   - Some nice Smatch catch fixes
   - Conversion of TI OMAP-USB and TI TWL6030 to endian neutralness
   - ChromeOS EC timing (delay) adaptions and added dependency on OF
   - Many constifications of 'struct {mfd_cell,regmap_irq,et.al}'
   - Watchdog support added for NVIDIA AS3722
   - Convert functions to static in TI AM335x
   - Realigned previously defeated functionality in TI AM335x
   - IIO ADC-TSC concurrency dead-lock/timeout resolution
   - Addition of Power Management and Clock support for Samsung core
   - DEFINE_PCI_DEVICE_TABLE macro removal from MFD Subsystem
   - Greater use of irqdomain functionality in ST-E AB8500
   - Removal of 'include/linux/mfd/abx500/ab8500-gpio.h'
   - Wolfson WM831x PMIC Power Management changes s/poweroff/shutdown/
   - Device Tree documentation added for TI/Nat Semi LP3943
   - Version detection and voltage tables for TI TPS6586x PMIC devices
   - Simplification of Freescale MC13XXX (de-)initialisation routines
   - Clean-up and simplification of the Realtek parent driver
   - Added support for RTL8402 Realtek PCI-Express card reader
   - Resource leak fix for Maxim 77686
   - Possible suspend BUG() fix in OMAP USB TLL
   - Support for new Wolfson WM5110 Revision (D)
   - Testing of automatic assignment of of_node in mfd_add_device()
   - Reversion of the above when it started to cause issues
   - Remove legacy Platform Data from;
              TI TWL Core, Qualcomm SSBI and ST-E ABx500 Pinctrl
   - Clean-ups; tabbing issues, function name changes, 'drvdata = NULL'
              removal, unused uninitialised warning mitigation, error
              message clarity, removal of redundant/duplicate checks,
              licensing (GPL -> GPL2), coding consistency, duplicate
              function declaration, ret checks, commit corrections,
              redundant of_match_ptr() helper removal, spelling,
              #if-deffery removal and header guards name changes"

* tag 'mfd-3.14-1' of git://git.linaro.org/people/ljones/mfd: (78 commits)
  mfd: wm5110: Add register patch for rev D chip
  mfd: omap-usb-tll: Don't hold lock during pm_runtime_get/put_sync()
  gpio: lp3943: Remove redundant of_match_ptr helper
  mfd: sta2x11-mfd: Use named constants for pci_power_t values
  Documentation: mfd: Fix LDO index in s2mps11.txt
  mfd: Cleanup mfd-mcp-sa11x0.h header
  mfd: max8997: Use "IS_ENABLED(CONFIG_OF)" for DT code.
  mfd: twl6030: Fix endianness problem in IRQ handler
  mfd: sec-core: Add cells for S5M8767-clocks
  mfd: max14577: Remove redundant of_match_ptr helper
  mfd: twl6040: Fix sparse non static symbol warning
  mfd: Revert "mfd: Always assign of_node in mfd_add_device()"
  mfd: rtsx: Fix sparse non static symbol warning
  mfd: max77693: Set proper maximum register for MUIC regmap
  mfd: max77686: Fix regmap resource leak on driver remove
  mfd: Represent correct filenames in file headers
  mfd: rtsx: Add support for card reader rtl8402
  mfd: rtsx: Add set pull control macro and simplify rtl8411
  mfd: max8997: Enforce mfd_add_devices() return value check
  mfd: mc13xxx: Simplify probe() & remove()
  ...
2014-01-21 10:58:17 -08:00
Linus Torvalds
a547df99aa Bulk pin control changes for the v3.14 cycle:
- New driver for the Qualcomm TLMM pin controller and its
   msm8x74 subdriver.
 
 - New driver for the Broadcom Capri BCM281xx SoC.
 
 - New subdriver for the imx25 pin controller.
 
 - New subdriver for the Tegra124 pin controller.
 
 - Lock GPIO lines as IRQs for select combined pin control and
   GPIO drivers for baytrail and sirf.
 
 - Some semi-big refactorings and extenstions to the sirf
   driver.
 
 - Lots of patching, cleanup and fixing in the Renesas "PFC"
   driver and associated subdrivers as usual. It is settling
   down a little bit now it seems.
 
 - Minor fixes and incremental updates here and there as usual.
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Merge tag 'pinctrl-v3.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull bulk pin control changes from Linus Walleij:
 "This has been queued and tested for a while.  Lots of action here,
  like in the GPIO tree, embedded stuff like this is really hot now it
  seems.  Details in the signed tag.  I'm especially happy about the
  Qualcomm driver as it is used in such a huge subset of mobile handsets
  out there, and these platforms in general need better upstream support

   - New driver for the Qualcomm TLMM pin controller and its msm8x74
     subdriver.

   - New driver for the Broadcom Capri BCM281xx SoC.

   - New subdriver for the imx25 pin controller.

   - New subdriver for the Tegra124 pin controller.

   - Lock GPIO lines as IRQs for select combined pin control and GPIO
     drivers for baytrail and sirf.

   - Some semi-big refactorings and extenstions to the sirf driver.

   - Lots of patching, cleanup and fixing in the Renesas "PFC" driver
     and associated subdrivers as usual.  It is settling down a little
     bit now it seems.

   - Minor fixes and incremental updates here and there as usual"

* tag 'pinctrl-v3.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (72 commits)
  pinctrl: sunxi: Honor GPIO output initial vaules
  pinctrl: capri: add dependency on OF
  ARM: bcm11351: Enable pinctrl for Broadcom Capri SoCs
  ARM: pinctrl: Add Broadcom Capri pinctrl driver
  pinctrl: Add pinctrl binding for Broadcom Capri SoCs
  pinctrl: Add void * to pinctrl_pin_desc
  pinctrl: st: Fix a typo in probe
  pinctrl: Fix some typos and grammar issues in the documentation
  pinctrl: sirf: lock IRQs when starting them
  pinctrl: sirf: put gpio interrupt pin into input status automatically
  pinctrl: sirf: use only one irq_domain for the whole device node
  pinctrl: single: fix infinite loop caused by bad mask
  pinctrl: single: fix pcs_disable with bits_per_mux
  pinctrl: single: fix DT bindings documentation
  pinctrl: as3722: Set pin to output mode for some function
  pinctrl: sirf: add pin group for USP0 with only RX or TX frame sync
  pinctrl: sirf: fix the pins of sdmmc5 connected with TriG
  pinctrl: sirf: add lost usp1_uart_nostreamctrl group for atlas6
  pinctrl: sunxi: Add Allwinner A20 clock output pin functions
  pinctrl/lantiq: fix typo
  ...
2014-01-21 10:14:10 -08:00
Linus Torvalds
8e50966072 GPIO tree bulk changes for v3.14
A big set this merge window, as we have much going on in
 this subsystem. Major changes this time:
 
 - Some core improvements and cleanups to the new GPIO
   descriptor API. This seems to be working now so we can
   start the exodus to this API, moving gradually away from
   the global GPIO numberspace.
 
 - Incremental improvements to the ACPI GPIO core, and move
   the few GPIO ACPI clients we have to the GPIO descriptor
   API right *now* before we go any further. We actually
   managed to contain this *before* we started to litter
   the kernel with yet another hackish global numberspace for
   the ACPI GPIOs, which is a big win.
 
 - The RFkill GPIO driver and all platforms using it have
   been migrated to use the GPIO descriptors rather than
   fixed number assignments. Tegra machine has been migrated
   as part of this.
 
 - New drivers for MOXA ART, Xtensa GPIO32 and SMSC SCH311x.
   Those should be really good examples of how I expect a
   nice GPIO driver to look these days.
 
 - Do away with custom GPIO implementations on a major
   part of the ARM machines: ks8695, lpc32xx, mv78xx0.
   Make a first step towards the same in the horribly
   convoluted Samsung S3C include forest. We expect to
   continue to clean this up as we move forward.
 
 - Flag GPIO lines used for IRQ on adnp, bcm-kona, em,
   intel-mid and lynxpoint.
   This makes the GPIOlib core aware that a certain GPIO line
   is used for IRQs and can then enforce some semantics such
   as disallowing a GPIO line marked as in use for IRQ to be
   switched to output mode.
 
 - Drop all use of irq_set_chip_and_handler_name().
   The name provided in these cases were just unhelpful
   tags like "mux" or "demux".
 
 - Extend the MCP23s08 driver to handle interrupts.
 
 - Minor incremental improvements for rcar, lynxpoint, em
   74x164 and msm drivers.
 
 - Some non-urgent bug fixes here and there, duplicate
   #includes and that usual kind of cleanups.
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Merge tag 'gpio-v3.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO tree bulk changes from Linus Walleij:
 "A big set this merge window, as we have much going on in this
  subsystem.  The changes to other subsystems (notably a slew of ARM
  machines as I am doing away with their custom APIs) have all been
  ACKed to the extent possible.

  Major changes this time:

   - Some core improvements and cleanups to the new GPIO descriptor API.
     This seems to be working now so we can start the exodus to this
     API, moving gradually away from the global GPIO numberspace.

   - Incremental improvements to the ACPI GPIO core, and move the few
     GPIO ACPI clients we have to the GPIO descriptor API right *now*
     before we go any further.  We actually managed to contain this
     *before* we started to litter the kernel with yet another hackish
     global numberspace for the ACPI GPIOs, which is a big win.

   - The RFkill GPIO driver and all platforms using it have been
     migrated to use the GPIO descriptors rather than fixed number
     assignments.  Tegra machine has been migrated as part of this.

   - New drivers for MOXA ART, Xtensa GPIO32 and SMSC SCH311x.  Those
     should be really good examples of how I expect a nice GPIO driver
     to look these days.

   - Do away with custom GPIO implementations on a major part of the ARM
     machines: ks8695, lpc32xx, mv78xx0.  Make a first step towards the
     same in the horribly convoluted Samsung S3C include forest.  We
     expect to continue to clean this up as we move forward.

   - Flag GPIO lines used for IRQ on adnp, bcm-kona, em, intel-mid and
     lynxpoint.

     This makes the GPIOlib core aware that a certain GPIO line is used
     for IRQs and can then enforce some semantics such as disallowing a
     GPIO line marked as in use for IRQ to be switched to output mode.

   - Drop all use of irq_set_chip_and_handler_name().  The name provided
     in these cases were just unhelpful tags like "mux" or "demux".

   - Extend the MCP23s08 driver to handle interrupts.

   - Minor incremental improvements for rcar, lynxpoint, em 74x164 and
     msm drivers.

   - Some non-urgent bug fixes here and there, duplicate #includes and
     that usual kind of cleanups"

Fix up broken Kconfig file manually to make this all compile.

* tag 'gpio-v3.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (71 commits)
  gpio: mcp23s08: fix casting caused build warning
  gpio: mcp23s08: depend on OF_GPIO
  gpio: mcp23s08: Add irq functionality for i2c chips
  ARM: S5P[v210|c100|64x0]: Fix build error
  gpio: pxa: clamp gpio get value to [0,1]
  ARM: s3c24xx: explicit dependency on <plat/gpio-cfg.h>
  ARM: S3C[24|64]xx: move includes back under <mach/> scope
  Documentation / ACPI: update to GPIO descriptor API
  gpio / ACPI: get rid of acpi_gpio.h
  gpio / ACPI: register to ACPI events automatically
  mmc: sdhci-acpi: convert to use GPIO descriptor API
  ARM: s3c24xx: fix build error
  gpio: f7188x: set can_sleep attribute
  gpio: samsung: Update documentation
  gpio: samsung: Remove hardware.h inclusion
  gpio: xtensa: depend on HAVE_XTENSA_GPIO32
  gpio: clps711x: Enable driver compilation with COMPILE_TEST
  gpio: clps711x: Use of_match_ptr()
  net: rfkill: gpio: convert to descriptor-based GPIO interface
  leds: s3c24xx: Fix build failure
  ...
2014-01-21 10:09:12 -08:00
Linus Walleij
97b583f3b4 mfd/pinctrl: Delete platform data header
This deletes the special AB8500 GPIO platform data passing
header and merges the few remaining contents down into the
abx500 pinctrl driver which handles the abx500 GPIO device.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-01-21 08:27:42 +00:00
Linus Walleij
ac99a037bc pinctrl: abx500: Delete non-devicetree probe path
All instances of this device are now coming from device tree-
enabled platforms probing without using platform data.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-01-21 08:13:39 +00:00
Chen-Yu Tsai
fa8cf57c92 pinctrl: sunxi: Honor GPIO output initial vaules
Some GPIO users, such as fixed-regulator, request GPIO output with
initial value of 1. This was ignored by sunxi driver.

Cc: stable@vger.kernel.org
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-20 09:19:17 +01:00
Rafael J. Wysocki
2b844ba79f Revert "ACPI: Add BayTrail SoC GPIO and LPSS ACPI IDs"
This reverts commit f6308b36c4 (ACPI: Add BayTrail SoC GPIO and LPSS
ACPI IDs), because it causes the Alan Cox' ASUS T100TA to "crash and
burn" during boot if the Baytrail pinctrl driver is compiled in.

Fixes: f6308b36c4 (ACPI: Add BayTrail SoC GPIO and LPSS ACPI IDs)
Reported-by: One Thousand Gnomes <gnomes@lxorguk.ukuu.org.uk>
Requested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2014-01-18 14:04:58 +01:00
Linus Walleij
fe0ec0ee07 pinctrl: capri: add dependency on OF
As this driver is using pinconf_generic_dt_node_to_map_pin() it
needs to depend on OF so as not to cause build problems on
archs that do not support OF.

Cc: Sherman Yin <syin@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-16 23:44:25 +01:00
Sherman Yin
54b1aa5a5b ARM: pinctrl: Add Broadcom Capri pinctrl driver
Adds pinctrl driver for Broadcom Capri (BCM281xx) SoCs.

v4: - PINCTRL selected in Kconfig, PINCTRL_CAPRI selected in bcm_defconfig
    - make use of regmap
    - change CAPRI_PIN_UPDATE from macro to inline function.
    - Handle pull-up strength arg in Ohm instead of enum
v3: Re-work driver to be based on generic pin config. Moved config selection
    from Kconfig to bcm_defconfig.
v2: Use hyphens instead of underscore in DT property names.

Signed-off-by: Sherman Yin <syin@broadcom.com>
Reviewed-by: Christian Daudt <bcm@fixthebug.org>
Reviewed-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-16 14:25:38 +01:00
Srinivas Kandagatla
c9dd66b73c pinctrl: st: Fix a typo in probe
Probe function had commas instead of semi-colons on some of the lines.
This patch just fixes those lines. No functional chagnes done in this
patch.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-15 13:59:51 +01:00
Linus Walleij
655dada627 pinctrl: sirf: lock IRQs when starting them
This uses the new API for tagging GPIO lines as in use by
IRQs. This enforces a few semantic checks on how the underlying
GPIO line is used.

Also assign the gpio_chip.dev pointer to be used for error
messages.

Cc: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-15 13:59:44 +01:00
Barry Song
b07ddcdcb2 pinctrl: sirf: put gpio interrupt pin into input status automatically
busses like i2c, spi and so on can parse the virq of their subnode automatically by
irq_of_parse_and_map(). for example, i2c will do that in of_i2c_register_devices().
people can put hwirq number attached to a gpio controller in dts, and drivers can
directly request the parsed virq.

for example, for an i2c client as below,
tangoc-ts@5c{
	compatible = "pixcir,tangoc-ts";
	interrupt-parent = <&gpio>;
	interrupts = <3 0>;
	reg = <0x5c>;
};
in i2c client probe(), it will request_irq(client->irq, ...) without
calling gpio_direction_input().
so here when we set irq type, we also put the pin to input direction.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-15 09:10:00 +01:00
Barry Song
8daeffb058 pinctrl: sirf: use only one irq_domain for the whole device node
in sirfsoc gpio probe(), we create 5 irq_domains for 5 gpio banks. but
in irq_create_of_mapping() of irqchip core level, irq_find_host() can
only return the 1st irq_domain attached the pinctrl dt device node as
we can see from the codes:

unsigned int irq_create_of_mapping(struct device_node *controller,
				   const u32 *intspec, unsigned int intsize)
{
	struct irq_domain *domain;
	...
	domain = controller ? irq_find_host(controller) : irq_default_domain;
}

struct irq_domain *irq_find_host(struct device_node *node)
{
	struct irq_domain *h, *found = NULL;
	int rc;

	/* We might want to match the legacy controller last since
	 * it might potentially be set to match all interrupts in
	 * the absence of a device node. This isn't a problem so far
	 * yet though...
	 */
	mutex_lock(&irq_domain_mutex);
	list_for_each_entry(h, &irq_domain_list, link) {
		if (h->ops->match)
			rc = h->ops->match(h, node);
		else
			rc = (h->of_node != NULL) && (h->of_node == node);

		if (rc) {
			found = h;
			break;
		}
	}
	mutex_unlock(&irq_domain_mutex);
	return found;
}

for sirfsoc, the 1st irq_domain attached to the device_node(controller) only
can do linear for the 1st 32 gpios. so for devices who use gpio hwirq above
32 and put the information in dt like:
                                tangoc-ts@5c{
                                        compatible = "pixcir,tangoc-ts";
+                                       interrupt-parent = <&gpio>;
+                                       interrupts = <34 0>;
                                };

we will fail to get the virq for these devices as hwirq will be bigger than
domain->revmap_data.linear.size in:
unsigned int irq_linear_revmap(struct irq_domain *domain,
			       irq_hw_number_t hwirq)
{

	/* Check revmap bounds; complain if exceeded */
	if (WARN_ON(hwirq >= domain->revmap_data.linear.size))
		return 0;

	return domain->revmap_data.linear.revmap[hwirq];
}

this patch drops redundant irq_domain and keep only one to fix the problem.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-15 09:07:56 +01:00
Tomi Valkeinen
ad5d25fef8 pinctrl: single: fix infinite loop caused by bad mask
commit 4e7e8017a8 (pinctrl: pinctrl-single:
enhance to configure multiple pins of different modules) improved
support for pinctrl-single,bits option, but also caused a regression
in parsing badly configured mask data.

If the masks in DT data are not quite right,
pcs_parse_bits_in_pinctrl_entry() can end up in an infinite loop,
trashing memory at the same time.

Add a check to verify that each loop actually removes bits from the
'mask', so that the loop can eventually end.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-15 08:31:53 +01:00
Tomi Valkeinen
dd4c2b3cb3 pinctrl: single: fix pcs_disable with bits_per_mux
pcs_enable() uses vals->mask instead of pcs->fmask when bits_per_mux is
enabled. However, pcs_disable() always uses pcs->fmask.

Fix pcs_disable() to use vals->mask with bits_per_mux.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-15 08:30:08 +01:00
Mallikarjun Kasoju
f8720e5ec7 pinctrl: as3722: Set pin to output mode for some function
If pins are used for function output like pwm, clk32k,
power good etc then set it as output mode default.

Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-14 10:34:18 +01:00
Mika Westerberg
664e3e5ac6 gpio / ACPI: register to ACPI events automatically
Instead of asking each driver to register to ACPI events we can just call
acpi_gpiochip_register_interrupts() for each chip that has an ACPI handle.
The function checks chip->to_irq and if it is set to NULL (a GPIO driver
that doesn't do interrupts) the function does nothing.

We also add the a new header drivers/gpio/gpiolib.h that is used for
functions internal to gpiolib and add ACPI GPIO chip registering functions
to that header.

Once that is done we can remove call to acpi_gpiochip_register_interrupts()
from its only user, pinctrl-baytrail.c

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-08 15:07:28 +01:00
Rongjun Ying
8385af02ba pinctrl: sirf: add pin group for USP0 with only RX or TX frame sync
USP0 has multiple functions, and has RX and TX frame sync signals,
for some scenarios like audio PCM, we don't need both of them.
so here we add two possibilities for USP0 only holding one of TX
and RX frame sync.

Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com>
Signed-off-by: Barry Song <Barry.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-08 10:51:10 +01:00
Bin Shi
cbc3b873c8 pinctrl: sirf: fix the pins of sdmmc5 connected with TriG
sdmmc5 has only 3 pins CMD, CLK, DATA which are connected with CSR
TriG RF multi-GNSS. The hardware connection is like:
DATA -- GPS_SGN
CLK  -- GPS_RF_CLK
CMD  -- GPS_MAG
here we drop redundant pins in sdmmc5 group.

Signed-off-by: Bin Shi <Bin.Shi@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-08 10:50:21 +01:00
Qipan Li
6225633d71 pinctrl: sirf: add lost usp1_uart_nostreamctrl group for atlas6
commit af614b2301 adds lost USP-based UART pin groups for prima2,
but missed usp1_uart_nostreamctrl group for atlas6, this patch fixes it.

this makes USP(Universal Serial Ports) port1 can work as uart without
stream ctrl.

Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-08 10:48:38 +01:00
Chen-Yu Tsai
b6a32a28cd pinctrl: sunxi: Add Allwinner A20 clock output pin functions
This patch adds the clock output pin functions on the A20.
The 2 pins can output a configurable clock to be used by
external modules. This is used on the CubieTruck, to supply
a 32768 Hz low power clock to the onboard Wifi+BT module.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-08 10:46:28 +01:00
Antonios Vamporakis
a1edd49e42 pinctrl/lantiq: fix typo
Signed-off-by: Antonios Vamporakis <ant@area128.com>
CC: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-08 10:13:38 +01:00
Valentine Barshak
a5ffaf6445 pinctrl: sh-pfc: r8a7791: Add I2C pins
This adds I2C[0-4] pinmux support to R8A7791 SoC.

Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-07 16:48:54 +01:00
Valentine Barshak
8e32c9671f pinctrl: sh-pfc: r8a7791: Add VIN pins
This adds VIN[0-2] pinmux support to r8a7791 SoC.
VIN1 B mirror is also added along with the primary
configuration since it's the only one that provides
access to all 24 data bits on VIN1.

Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-07 16:48:50 +01:00
Valentine Barshak
5e5a298cdb pinctrl: sh-pfc: r8a7791: Group USB PWEN and OVC pins together
This groups USB PWEN and OVC pins together on R8A7791 SoC,
the same way it's done on R8A7790, since both are needed
for a USB device.

Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-07 16:48:46 +01:00
Valentine Barshak
646ae3ef7e pinctrl: sh-pfc: r8a7790: Fix vsync value in the vin3_sync_mux array
This fixes a typo in the vin3_sync_mux array (s/VI2/VI3/).

Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-07 16:48:35 +01:00
Olof Johansson
11b35a3525 Third Round of Renesas ARM Based SoC DT Updates for v3.14
* r8a7791 (R-Car M2) and r8a7790 (R-Car H2) SoCSs
   - Add SSI, QSPI and MSIOF  clocks in device tree
 
 r8a7791 (R-Car M2) based Koelsch and r8a7790 (R-Car H2) based Lager boards
   - Remove reference DTS
   - Specify external clock frequency in DT
   - Sync non-reference DTS with referene DTS
   - Add clocks to DTS
 
 * r8a7740 (R-Mobile A1) based Armadillo board
   - Add gpio-keys device
   - Add PWM backlight enable GPIO
   - Add PWM backlight power supply
 
 * r8a73a0 (SH-Mobile AG5), r8a7740 (R-Mobile A1) and
   r8a73a4 (SH-Mobile APE6) SoCs
   - Specify PFC interrupts in DT
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Merge tag 'renesas-dt3-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

From Simon Horman:
Third Round of Renesas ARM Based SoC DT Updates for v3.14

* r8a7791 (R-Car M2) and r8a7790 (R-Car H2) SoCSs
  - Add SSI, QSPI and MSIOF  clocks in device tree

r8a7791 (R-Car M2) based Koelsch and r8a7790 (R-Car H2) based Lager boards
  - Remove reference DTS
  - Specify external clock frequency in DT
  - Sync non-reference DTS with referene DTS
  - Add clocks to DTS

* r8a7740 (R-Mobile A1) based Armadillo board
  - Add gpio-keys device
  - Add PWM backlight enable GPIO
  - Add PWM backlight power supply

* r8a73a0 (SH-Mobile AG5), r8a7740 (R-Mobile A1) and
  r8a73a4 (SH-Mobile APE6) SoCs
  - Specify PFC interrupts in DT

* tag 'renesas-dt3-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (72 commits)
  ARM: shmobile: r8a7791: Add SSI clocks in device tree
  ARM: shmobile: r8a7790: Add SSI clocks in device tree
  ARM: shmobile: r8a7791: Add QSPI module clock in device tree
  ARM: shmobile: r8a7790: Add QSPI module clock in device tree
  ARM: shmobile: r8a7791: Add MSIOF clocks in device tree
  ARM: shmobile: r8a7790: Add MSIOF clocks in device tree
  ARM: shmobile: Remove Koelsch reference DTS
  ARM: shmobile: Remove Lager reference DTS
  ARM: shmobile: koelsch: Specify external clock frequency in DT
  ARM: shmobile: lager: Specify external clock frequency in DT
  ARM: shmobile: Sync Koelsch DTS with Koelsch reference DTS
  ARM: shmobile: Sync Lager DTS with Lager reference DTS
  ARM: shmobile: r8a7791: Add clocks
  ARM: shmobile: r8a7790: Reference clocks
  ARM: shmobile: r8a7790: Add clocks
  ARM: shmobile: armadillo: dts: Add gpio-keys device
  ARM: shmobile: sh73a0: Specify PFC interrupts in DT
  ARM: shmobile: r8a7740: Specify PFC interrupts in DT
  ARM: shmobile: r8a73a4: Specify PFC interrupts in DT
  ARM: shmobile: armadillo: dts: Add PWM backlight enable GPIO
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2014-01-03 21:09:51 -08:00
Rafael J. Wysocki
bfde19c4c2 Merge branches 'powercap' and 'acpi-lpss' with new device IDs
* powercap:
  powercap / RAPL: add support for ValleyView Soc

* acpi-lpss:
  ACPI: Add BayTrail SoC GPIO and LPSS ACPI IDs
2013-12-27 00:43:24 +01:00
Olof Johansson
770039fef4 Merge branch 'tegra/dma-reset-rework' into next/dt
Bringing in the tegra dma/reset framework cleanup as a base for the DT changes.

* tegra/dma-reset-rework: (320 commits)
  spi: tegra: checking for ERR_PTR instead of NULL
  ASoC: tegra: update module reset list for Tegra124
  clk: tegra: remove bogus PCIE_XCLK
  clk: tegra: remove legacy reset APIs
  ARM: tegra: remove legacy DMA entries from DT
  ARM: tegra: remove legacy clock entries from DT
  USB: EHCI: tegra: use reset framework
  Input: tegra-kbc - use reset framework
  serial: tegra: convert to standard DMA DT bindings
  serial: tegra: use reset framework
  spi: tegra: convert to standard DMA DT bindings
  spi: tegra: use reset framework
  staging: nvec: use reset framework
  i2c: tegra: use reset framework
  ASoC: tegra: convert to standard DMA DT bindings
  ASoC: tegra: allocate AHUB FIFO during probe() not startup()
  ASoC: tegra: call pm_runtime APIs around register accesses
  ASoC: tegra: use reset framework
  dma: tegra: register as an OF DMA controller
  dma: tegra: use reset framework
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-12-26 11:03:29 -08:00
Laurent Pinchart
44a45b55a7 pinctrl: sh-pfc: ARM: Constify pins and cfg_regs arrays
The arrays are never modified, declare them as const.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-20 12:28:40 +01:00
Laurent Pinchart
f41a1efe63 pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays
The arrays are never modified, declare them as const.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-20 12:27:43 +01:00
Laurent Pinchart
6d5bddd525 pinctrl: sh-pfc: Constify IRQ GPIOs arrays
The arrays are never modified, make them const.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-20 12:26:54 +01:00
Laurent Pinchart
9aecff583e pinctrl: sh-pfc: Constify enum_ids and var_field_width compound literals
The enum_ids and var_field_width fields of struct pinmux_data_reg and
pinmux_cfg_reg are initialized using compound literals. Cast them to
const to store them in .rodata.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-20 12:25:59 +01:00