Commit Graph

4265 Commits

Author SHA1 Message Date
Sowjanya Komatineni
a4873accca pinctrl: tegra: Flush pinctrl writes during resume
This patch adds pinctrl register read to flush all the prior pinctrl
writes and then adds barrier for pinctrl register read to complete
during resume to make sure all pinctrl changes are effective.

Acked-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Link: https://lore.kernel.org/r/1565984527-5272-3-git-send-email-skomatineni@nvidia.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-21 09:00:16 +02:00
Sowjanya Komatineni
c2cf351eba pinctrl: tegra: Fix write barrier placement in pmx_writel
pmx_writel uses writel which inserts write barrier before the
register write.

This patch has fix to replace writel with writel_relaxed followed
by a readback and memory barrier to ensure write operation is
completed for successful pinctrl change.

Acked-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Link: https://lore.kernel.org/r/1565984527-5272-2-git-send-email-skomatineni@nvidia.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-21 09:00:16 +02:00
Linus Walleij
6f265e5d4d pinctrl: bcm-iproc: Pass irqchip when adding gpiochip
We need to convert all old gpio irqchips to pass the irqchip
setup along when adding the gpio_chip. For more info see
drivers/gpio/TODO.

For chained irqchips this is a pretty straight-forward
conversion.

Cc: Pramod Kumar <pramodku@broadcom.com>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Cc: Thierry Reding <treding@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20190812132554.18313-1-linus.walleij@linaro.org
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-21 09:00:16 +02:00
Linus Walleij
eb1e8bd6e3 gpio: Use callback presence to determine need of valid_mask
After we switched the two drivers that have .need_valid_mask
set to use the callback for setting up the .valid_mask,
we can just use the presence of the .init_valid_mask()
callback (or the OF reserved ranges, nota bene) to determine
whether to allocate the mask or not and we can drop the
.need_valid_mask field altogether.

Cc: Benjamin Gaignard <benjamin.gaignard@st.com>
Cc: Amelie Delaunay <amelie.delaunay@st.com>
Cc: Stephen Boyd <swboyd@chromium.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20190819093058.10863-1-linus.walleij@linaro.org
2019-08-20 10:42:07 +02:00
Linus Walleij
da9b142ab2 pinctrl: stmfx: Use the callback to populate valid_mask
This makes use of the existing callback to populate the
valid mask instead of iteratively setting it up during
probe.

Cc: Benjamin Gaignard <benjamin.gaignard@st.com>
Cc: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20190819091140.622-1-linus.walleij@linaro.org
2019-08-20 10:42:07 +02:00
Linus Walleij
c9fc5aff21 gpio: Pass mask and size with the init_valid_mask()
It is more helpful for drivers to have the affected fields
directly available when we use the callback to set up the
valid mask. Change this and switch over the only user
(MSM) to use the passed parameters. If we do this we can
also move the mask out of publicly visible struct fields.

Cc: Stephen Boyd <swboyd@chromium.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20190819084904.30027-1-linus.walleij@linaro.or
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-20 10:42:07 +02:00
Chris Chiu
6cb0880f08 pinctrl: intel: remap the pin number to gpio offset for irq enabled pin
On Asus X571GT, GPIO 297 is configured as an interrupt and serves
for the touchpad. The touchpad will report input events much less
than expected after S3 suspend/resume, which results in extremely
slow cursor movement. However, the number of interrupts observed
from /proc/interrupts increases much more than expected even no
touching touchpad.

This is due to the value of PADCFG0 of PIN 225 for the interrupt
has been changed from 0x80800102 to 0x80100102. The GPIROUTIOXAPIC
is toggled on which results in the spurious interrupts. The PADCFG0
of PIN 225 is expected to be saved during suspend, but the 297 is
saved instead because the gpiochip_line_is_irq() expect the GPIO
offset but what's really passed to it is PIN number. In this case,
the /sys/kernel/debug/pinctrl/INT3450:00/gpio-ranges shows

288: INT3450:00 GPIOS [436 - 459] PINS [216 - 239]

So gpiochip_line_is_irq() returns true for GPIO offset 297, the
suspend routine spuriously saves the content for PIN 297 which
we expect to save for PIN 225.

This commit maps the PIN number to GPIO offset first in the
intel_pinctrl_should_save() to make sure the values for the
specific PINs can be correctly saved and then restored.

Fixes: c538b94367 ("pinctrl: intel: Only restore pins that are used by the driver")
Signed-off-by: Chris Chiu <chiu@endlessm.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-08-19 12:41:44 +03:00
Andy Shevchenko
1bd231538c pinctrl: intel: Allow to request locked pads
Some firmwares would like to protect pads from being modified by OS
and at the same time provide them to OS as a resource. So, the driver
in such circumstances may request pad and may not change its state.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-08-18 20:57:50 +03:00
Brian Masney
821c76c4c3 qcom: spmi-gpio: convert to hierarchical IRQ helpers in gpio core
Now that the GPIO core has support for hierarchical IRQ chips, convert
Qualcomm's spmi-gpio over to use these new helpers to reduce duplicated
code across drivers.

This change was tested on a LG Nexus 5 (hammerhead) phone.

Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20190808123242.5359-3-linus.walleij@linaro.org
2019-08-15 09:44:19 +02:00
Yoshihiro Shimoda
b13431ed6e pinctrl: sh-pfc: Remove incomplete flag "cfg->type"
The old commit c58d9c1b26 ("sh-pfc: Implement generic pinconf
support") broke the cfg->type flag to PINMUX_TYPE_FUNCTION because
sh_pfc_pinconf_set() didn't call sh_pfc_reconfig_pin().
Now if we fix the cfg->type condition, it gets worse because:
 - Some drivers might be deferred so that .set_mux() will be called
   multiple times.
 - In such the case, the sh-pfc driver returns -EBUSY even if
   the group is the same, and then that driver fails to probe.

Since the pinctrl subsystem already has such conditions according
to @set_mux and @gpio_request_enable, this patch just remove
the incomplete flag from sh-pfc/pinctrl.c.

Fixes: c58d9c1b26 ("sh-pfc: Implement generic pinconf support")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-08-12 15:55:26 +02:00
Yoshihiro Shimoda
1d4ba593d0 pinctrl: sh-pfc: Add new flags into struct sh_pfc_pin_config
To clean/modify the code up later, this patch just adds new flags
"mux_set" and "gpio_enabled" into the struct sh_pfc_pin_config.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-08-12 15:55:15 +02:00
Linus Walleij
76837e02a2 pinctrl: sh-pfc: Updates for v5.4
- Add missing of_node_put() calls on RZ/N1,
   - Small cleanups.
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Merge tag 'sh-pfc-for-v5.4-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: sh-pfc: Updates for v5.4

  - Add missing of_node_put() calls on RZ/N1,
  - Small cleanups.
2019-08-10 10:31:01 +02:00
Nishka Dasgupta
bf4b87b0d0 pinctrl: freescale: imx: Add of_node_put() before return
Each iteration of for_each_child_of_node() puts the previous node;
however, in the case of a return from the middle of the loop, there is no
put, thus causing a memory leak. Hence put of_node_put() statements as
required before two mid-loop return statements.
Issue found with Coccinelle.

Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com>
Link: https://lore.kernel.org/r/20190808074720.15754-1-nishkadg.linux@gmail.com
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-10 10:29:19 +02:00
Nishka Dasgupta
5a6bc29032 pinctrl: sprd: Add of_node_put() before return to prevent memory leak
Each iteration of for_each_child_of_node puts the previous node, but in
the case of a return from the middle of the loop, there is no put, thus
causing a memory leak. Hence add an of_node_put before the return in
two places.
Issue found with Coccinelle.

Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com>
Link: https://lore.kernel.org/r/20190808074329.15579-1-nishkadg.linux@gmail.com
Reviewed-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-10 10:22:50 +02:00
Nishka Dasgupta
474137c911 pinctrl: stm32: stm32: Add of_node_put() before return
Each iteration of for_each_child_of_node and
for_each_available_child_of_node puts the previous node, but in
the case of a return from the middle of the loop, there is no put, thus
causing a memory leak. Hence add an of_node_put before the return in
two places.
Issue found with Coccinelle.

Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com>
Link: https://lore.kernel.org/r/20190808075457.16109-1-nishkadg.linux@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-10 10:21:51 +02:00
Nathan Chancellor
21b2920fb5 pinctrl: aspeed: g6: Remove const specifier from aspeed_g6_sig_expr_set's ctx parameter
clang errors:

drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c:2325:9: error: incompatible
pointer types initializing 'int (*)(struct aspeed_pinmux_data *, const
struct aspeed_sig_expr *, bool)' with an expression of type 'int (const
struct aspeed_pinmux_data *, const struct aspeed_sig_expr *, bool)'
[-Werror,-Wincompatible-pointer-types]
        .set = aspeed_g6_sig_expr_set,
               ^~~~~~~~~~~~~~~~~~~~~~
1 error generated.

Commit 674fa8daa8 ("pinctrl: aspeed-g5: Delay acquisition of regmaps")
changed the set function pointer declaration and the g6 one wasn't
updated (I assume because it wasn't merged yet).

Fixes: 2eda1cdec4 ("pinctrl: aspeed: Add AST2600 pinmux support")
Link: https://github.com/ClangBuiltLinux/linux/issues/632
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Link: https://lore.kernel.org/r/20190807003037.48457-1-natechancellor@gmail.com
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-10 10:13:11 +02:00
Geert Uytterhoeven
625efea83a pinctrl: rza1: Use devm_platform_ioremap_resource() helper
Use the devm_platform_ioremap_resource() helper instead of open-coding
the same operation.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-08-09 09:34:45 +02:00
Andy Shevchenko
bf5ab1bded pinctrl: denverton: Update pin names according to v1.08
Version 1.08 of pin list has some changes in pin names for Intel Denverton.

Update the driver accordingly.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-08-08 12:57:01 +03:00
Geert Uytterhoeven
6da53cfa0f pinctrl: sh-pfc: Use dev_notice_once() instead of open-coding
At the time of commit 9a643c9a11 ("sh-pfc: Convert message
printing from pr_* to dev_*"), the dev_*_once() variants didn't exist
yet, so the once behavior was open-coded.

Since commit e135303bd5 ("device: Add dev_<level>_once variants")
they do, so "revert" to the good practice of using a helper.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2019-08-08 10:18:57 +02:00
Stephen Boyd
57afe3ea27 pinctrl: cherryview: Remove dev_err() usage after platform_get_irq()
We don't need dev_err() messages when platform_get_irq() fails now that
platform_get_irq() prints an error message itself when something goes
wrong. Let's remove these prints with a simple semantic patch.

// <smpl>
@@
expression ret;
struct platform_device *E;
@@

ret =
(
platform_get_irq(E, ...)
|
platform_get_irq_byname(E, ...)
);

if ( \( ret < 0 \| ret <= 0 \) )
{
(
-if (ret != -EPROBE_DEFER)
-{ ...
-dev_err(...);
-... }
|
...
-dev_err(...);
)
...
}
// </smpl>

While we're here, remove braces on if statements that only have one
statement (manually).

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-gpio@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-08-07 17:25:49 +03:00
Stephen Boyd
4e73d02f16 pinctrl: intel: Remove dev_err() usage after platform_get_irq()
We don't need dev_err() messages when platform_get_irq() fails now that
platform_get_irq() prints an error message itself when something goes
wrong. Let's remove these prints with a simple semantic patch.

// <smpl>
@@
expression ret;
struct platform_device *E;
@@

ret =
(
platform_get_irq(E, ...)
|
platform_get_irq_byname(E, ...)
);

if ( \( ret < 0 \| ret <= 0 \) )
{
(
-if (ret != -EPROBE_DEFER)
-{ ...
-dev_err(...);
-... }
|
...
-dev_err(...);
)
...
}
// </smpl>

While we're here, remove braces on if statements that only have one
statement (manually).

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-gpio@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-08-07 17:25:49 +03:00
Andy Shevchenko
6a33a1d6d6 pinctrl: intel: Use NSEC_PER_USEC for debounce calculus
Replace hard coded constants with self-explanatory names, i.e.
use NSEC_PER_USEC for debounce calculus.

While here, add a unit suffix to debounce period constant.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-08-07 17:25:19 +03:00
Andy Shevchenko
34e656703e pinctrl: baytrail: Re-use data structures from pinctrl-intel.h (part 2)
We have some data structures duplicated across the drivers.
Let's deduplicate them by using ones that being provided by
pinctrl-intel.h.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-08-07 17:25:19 +03:00
Andy Shevchenko
179e5a6114 pinctrl: intel: Remove default Interrupt Status offset
Since some of the GPIO controllers use different Interrupt Status offset,
it make sense to provide it explicitly in the drivers.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-08-07 17:25:19 +03:00
Andy Shevchenko
3b1e9188df pinctrl: lewisburg: Provide Interrupt Status register offset
Since some of the GPIO controllers use different Interrupt Status offset,
it make sense to provide it explicitly in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-08-07 16:45:41 +03:00
Andy Shevchenko
2a2ed47521 pinctrl: denverton: Provide Interrupt Status register offset
Since some of the GPIO controllers use different Interrupt Status offset,
it make sense to provide it explicitly in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-08-07 16:45:41 +03:00
Andy Shevchenko
f702e0b93c pinctrl: sunrisepoint: Provide Interrupt Status register offset
Since some of the GPIO controllers use different Interrupt Status offset,
it make sense to provide it explicitly in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-08-07 16:45:41 +03:00
Andy Shevchenko
b8d728687e pinctrl: icelake: Provide Interrupt Status register offset
Since some of the GPIO controllers use different Interrupt Status offset,
it make sense to provide it explicitly in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-08-07 16:45:41 +03:00
Andy Shevchenko
cd5acb2bce pinctrl: geminilake: Provide Interrupt Status register offset
Since some of the GPIO controllers use different Interrupt Status offset,
it make sense to provide it explicitly in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-08-07 16:45:41 +03:00
Andy Shevchenko
82af745d2f pinctrl: cannonlake: Provide Interrupt Status register offset
Since some of the GPIO controllers use different Interrupt Status offset,
it make sense to provide it explicitly in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-08-07 16:45:41 +03:00
Andy Shevchenko
3818d73612 pinctrl: broxton: Provide Interrupt Status register offset
Since some of the GPIO controllers use different Interrupt Status offset,
it make sense to provide it explicitly in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-08-07 16:45:41 +03:00
Andy Shevchenko
7eb7ecddd3 pinctrl: intel: Simplify offset validation in intel_get_padcfg()
There is more generic and simpler validation just against the nregs.
Using it allows to drop customization from the intel_get_padcfg().

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-08-07 16:44:55 +03:00
Jitendra Sharma
f2ae04c45b pinctrl: qcom: Add SC7180 pinctrl driver
Add initial pinctrl driver to support pin configuration with
pinctrl framework for SC7180

Signed-off-by: Jitendra Sharma <shajit@codeaurora.org>
Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
[rnayak: modify to use upstream tile support
	 sort and squash some functions]
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20190806060536.18094-2-rnayak@codeaurora.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-07 14:43:51 +02:00
Nishka Dasgupta
8df92d676c pinctrl: spear: spear: Add of_node_put() before return
Each iteration of for_each_child_of_node puts the previous node, but in
the case of a return from the middle of the loop, there is no put, thus
causing a memory leak. Hence add an of_node_put before the return in
two places.
Issue found with Coccinelle.

Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Link: https://lore.kernel.org/r/20190804154948.4584-1-nishkadg.linux@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-06 16:18:49 +02:00
Nishka Dasgupta
646d90c3c2 pinctrl: freescale: mxs: Add of_node_put() before return
Each iteration of for_each_child_of_node puts the previous node, but in
the case of a return from the middle of the loop, there is no put, thus
causing a memory leak. Hence add an of_node_put before the return in
three places.
Issue found with Coccinelle.

Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com>
Link: https://lore.kernel.org/r/20190804160420.5309-1-nishkadg.linux@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-06 14:52:24 +02:00
Nishka Dasgupta
f452444709 pinctrl: nomadik: abx500: Add of_node_put() before return
Each iteration of for_each_child_of_node puts the previous node, but in
the case of a return from the middle of the loop, there is no put, thus
causing a memory leak. Hence add an of_node_put before the return.
Issue found with Coccinelle.

Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com>
Link: https://lore.kernel.org/r/20190804155154.4916-1-nishkadg.linux@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-06 14:51:59 +02:00
Nishka Dasgupta
ea8cf5c518 pinctrl: nomadik: nomadik: Add of_node_put() before return
Each iteration of for_each_child_of_node puts the previous node, but in
the case of a return from the middle of the loop, there is no put, thus
causing a memory leak. Hence add an of_node_put before the return.
Issue found with Coccinelle.

Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com>
Link: https://lore.kernel.org/r/20190804155117.4753-1-nishkadg.linux@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-06 14:51:13 +02:00
Nishka Dasgupta
f17d2f54d3 pinctrl: falcon: Add of_node_put() before return
Each iteration of for_each_compatible_node puts the previous node, but in
the case of a return from the middle of the loop, there is no put, thus
causing a memory leak. Hence add an of_node_put before the return in two
places.
Issue found with Coccinelle.

Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com>
Link: https://lore.kernel.org/r/20190804152745.2231-1-nishkadg.linux@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-06 14:50:04 +02:00
Geert Uytterhoeven
d55b7fdd58 pinctrl: xway: Use devm_kasprintf() instead of fixed buffer formatting
Improve readability and maintainability by replacing a hardcoded string
allocation and formatting by the use of the devm_kasprintf() helper.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20190731132917.17607-4-geert+renesas@glider.be
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 13:31:17 +02:00
Geert Uytterhoeven
811604d01e pinctrl: lantiq: Use kasprintf() instead of fixed buffer formatting
Improve readability and maintainability by replacing a hardcoded string
allocation and formatting by the use of the kasprintf() helper.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20190731132917.17607-3-geert+renesas@glider.be
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 13:30:15 +02:00
Geert Uytterhoeven
f0b0e923e0 pinctrl: devicetree: Use strlen() instead of hardcoded number
Improve readability by replacing a hardcoded number requiring a comment
by strlen().

Gcc is smart enough to evaluate the length of a constant string at
compile-time.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20190731132917.17607-2-geert+renesas@glider.be
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 13:29:29 +02:00
Stephen Boyd
64c4dcbfcc pinctrl: Remove dev_err() usage after platform_get_irq()
We don't need dev_err() messages when platform_get_irq() fails now that
platform_get_irq() prints an error message itself when something goes
wrong. Let's remove these prints with a simple semantic patch.

// <smpl>
@@
expression ret;
struct platform_device *E;
@@

ret =
(
platform_get_irq(E, ...)
|
platform_get_irq_byname(E, ...)
);

if ( \( ret < 0 \| ret <= 0 \) )
{
(
-if (ret != -EPROBE_DEFER)
-{ ...
-dev_err(...);
-... }
|
...
-dev_err(...);
)
...
}
// </smpl>

While we're here, remove braces on if statements that only have one
statement (manually).

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-gpio@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20190730181557.90391-34-swboyd@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 13:24:06 +02:00
Kunihiko Hayashi
31b4c4b124 pinctrl: uniphier: Fix Pro5 SD pin-mux setting
SD uses the following pins starting from 247:
    SDCD, SDWP, SDVOLC, SDCLK, SDCMD, SDDAT{0,1,2,3}

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Link: https://lore.kernel.org/r/1564465410-9165-6-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 13:21:31 +02:00
Kunihiko Hayashi
490bbdcfc4 pinctrl: uniphier: Add Pro5 PCIe pin-mux settings
Pro5 PCIe interface uses the following pins:
    XPERST, XPEWAKE, XPECLKRQ

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/1564465410-9165-5-git-send-email-hayashi.kunihiko@socionext.com
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 13:20:26 +02:00
Kunihiko Hayashi
fc1d910ae9 pinctrl: uniphier: Add 5th LD20 MPEG2-TS input pin-mux setting
The 5th serial TS interface uses the following pins:
  hscin4_s: PCA[11-14]

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Link: https://lore.kernel.org/r/1564465410-9165-4-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 13:19:35 +02:00
Kunihiko Hayashi
f686867266 pinctrl: uniphier: Add another audio I/O pin-mux settings for LD20
This adds support for pinmux settings of aout1b group. This group includes
audio I/O signals derived from xirq pins, and it is equivalent to "aout1"
in functionality.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/1564465410-9165-3-git-send-email-hayashi.kunihiko@socionext.com
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 13:18:34 +02:00
Kunihiko Hayashi
111a8fcb2c pinctrl: uniphier: Separate modem group from UART ctsrts group
It depends on the board implementation whether to have each pins of
CTS/RTS, and others for modem. So it is necessary to divide current
uart_ctsrts group into uart_ctsrts and uart_modem groups.

Since the number of implemented pins for modem differs depending
on SoC, each uart_modem group also has a different number of pins.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/1564465410-9165-2-git-send-email-hayashi.kunihiko@socionext.com
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 13:17:20 +02:00
Neil Armstrong
726e8d8137 pinctrl: meson-g12a: add pwm_a on GPIOE_2 pinmux
Add the missing pinmux for the pwm_a function on the GPIOE_2 pin.

Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20190729125838.6498-1-narmstrong@baylibre.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 13:00:54 +02:00
Andrew Jeffery
73c732c571 pinctrl: aspeed: Document existence of deprecated compatibles
Otherwise they look odd in the face of not being listed in the bindings
documents.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20190724081313.12934-3-andrew@aj.id.au
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 12:47:09 +02:00
Andrew Jeffery
2eda1cdec4 pinctrl: aspeed: Add AST2600 pinmux support
The AST2600 pinmux is fairly similar to the previous generations of
ASPEED BMC SoCs in terms of architecture, though differ in some of the
design details. The complexity of the pin expressions is largely reduced
(e.g. there are no-longer signals with multiple expressions muxing them
to the associated pin), and there are now signals and buses with
multiple pin groups.

The driver implements pinmux support for all 244 GPIO-capable pins plus
a further four pins that are not GPIO capable but which expose multiple
signals. pinconf will be implemented in a follow-up patch.

The implementation has been smoke-tested under qemu, and run on hardware
by ASPEED.

Debugged-by: Johnny Huang <johnny_huang@aspeedtech.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20190711041942.23202-7-andrew@aj.id.au
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 12:41:18 +02:00
Andrew Jeffery
86392fac9a pinctrl: aspeed: Add SIG_DESC_CLEAR() helper
The complement of SIG_DESC_SET().

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20190729055604.13239-6-andrew@aj.id.au
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 12:40:48 +02:00
Andrew Jeffery
e7a96b0b7d pinctrl: aspeed: Add multiple pin group support for functions
The AST2400 and AST2500 SoCs only exposed one pin group per function.
Lone pin groups drove some implementation simplifications in the ASPEED
pinmux infrastructure that is now invalid for the AST2600, which
supports multiple groups per function for some functions on the chip
(SMBus Alert pins and UARTs among others).

This patch reworks the macro jungle to enable support for multiple pin
groups. In the process we inflict some collateral damage on the existing
AST2400 and AST2500 drivers, but the rework is mostly a relatively
straight-forward, automated transform of adding the pin name as an
argument to some macro calls and implementing wrappers to paper over
groups in the cases where there aren't multiple.

As previously documented, the macro infrastructure exposes mux
configuration as symbols in the source file which are used to detect
accidental duplication. Previously these symbols were named in terms of
the signal for a given expression. As the AST2600 supports multiple pin
groups for a function, the signal name on its own is no-longer unique,
and we must switch to the (signal, group) tuple. However, this means
that we can no-longer derive the signal expression symbol name from the
signal name alone, which among other cases, impacts the operation of the
PIN_DECL_x() macros.

To fix that and avoid requiring we awkwardly provide the associated
group name for every signal for every PIN_DECL_x() invocation, instead
opportunistically alias the name of the signal expression symbol from
the unique (signal, group) tuple to the also unique (pin, signal) tuple,
then reference the alias symbol in the tables generated by PIN_DECL_x().
This way we do not require extra group parameters for PIN_DECL_x() as
the pin name was already provided as an argument, and instead simply
require that the pin name be provided to the expression declaration
macros in order to generate the alias symbol.

The patch implements the alias strategy and fixes up all the expression
definition macro calls in the AST2400 and AST2500 drivers to account for
pin groups. Given the implementation strategy has the property that
compilation either fails or loudly warns for bad pin descriptions, this
patch is theoretically tested by successfully compiling both affected
drivers. For a more practical test I've inspected the diff of the
content of the pinctrl debugfs entries before and after the patch under
qemu; all pins, functions and groups match.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20190729055604.13239-5-andrew@aj.id.au
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 12:40:21 +02:00
Andrew Jeffery
27d1f73670 pinctrl: aspeed: Add PIN_DECL_3() helper
This case is common in the AST2600, so add to the collection.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20190729055604.13239-4-andrew@aj.id.au
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 12:39:48 +02:00
Andrew Jeffery
7b38897081 pinctrl: aspeed: Rename pin declaration macros
Rename macros as follows:

* s/SS_PIN_DECL()/PIN_DECL_1()/
* s/MS_PIN_DECL()/PIN_DECL_2()/
* s/MS_PIN_DECL_()/PIN_DECL_()/

This is in preparation for adding PIN_DECL_3(). We could clean this up
with e.g. CPPMAGIC_MAP() from ccan, but that might be a bridge too far
given how much of a macro jungle we already have.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20190729055604.13239-3-andrew@aj.id.au
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 12:39:27 +02:00
Icenowy Zheng
fb18f1887f pinctrl: sunxi: v3s: introduce support for V3
Introduce the GPIO pins that is only available on V3 (not on V3s) to the
V3s pinctrl driver.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>

Link: https://lore.kernel.org/r/20190728031227.49140-2-icenowy@aosc.io
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 12:35:29 +02:00
Anders Roxell
6161dc0358 pinctrl: qcom: spmi-gpio: Mark expected switch fall-through
When fall-through warnings was enabled by default the following warnings
was starting to show up:

../drivers/pinctrl/qcom/pinctrl-spmi-gpio.c: In function ‘pmic_gpio_populate’:
../drivers/pinctrl/qcom/pinctrl-spmi-gpio.c:815:20: warning: this statement may fall
 through [-Wimplicit-fallthrough=]
   pad->have_buffer = true;
   ~~~~~~~~~~~~~~~~~^~~~~~
../drivers/pinctrl/qcom/pinctrl-spmi-gpio.c:816:2: note: here
  case PMIC_GPIO_SUBTYPE_GPIOC_4CH:
  ^~~~
../drivers/pinctrl/qcom/pinctrl-spmi-gpio.c:820:20: warning: this statement may fall
 through [-Wimplicit-fallthrough=]
   pad->have_buffer = true;
   ~~~~~~~~~~~~~~~~~^~~~~~
../drivers/pinctrl/qcom/pinctrl-spmi-gpio.c:821:2: note: here
  case PMIC_GPIO_SUBTYPE_GPIOC_8CH:
  ^~~~

Rework so that the compiler doesn't warn about fall-through.

Fixes: d93512ef0f0e ("Makefile: Globally enable fall-through warning")
Signed-off-by: Anders Roxell <anders.roxell@linaro.org>
Link: https://lore.kernel.org/r/20190726112816.19723-1-anders.roxell@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 12:33:28 +02:00
Anders Roxell
cd927f140d pinctrl: rockchip: Mark expected switch fall-through
When fall-through warnings was enabled by default the following warning
was starting to show up:

../drivers/pinctrl/pinctrl-rockchip.c: In function ‘rockchip_gpio_set_config’:
../drivers/pinctrl/pinctrl-rockchip.c:2783:3: warning: this statement may fall
 through [-Wimplicit-fallthrough=]
   rockchip_gpio_set_debounce(gc, offset, true);
   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/pinctrl/pinctrl-rockchip.c:2795:2: note: here
  default:
  ^~~~~~~

Rework so that the compiler doesn't warn about fall-through. Add
'return -ENOTSUPP;' to match the comment.

Fixes: d93512ef0f0e ("Makefile: Globally enable fall-through warning")
Signed-off-by: Anders Roxell <anders.roxell@linaro.org>
Link: https://lore.kernel.org/r/20190726112812.19665-1-anders.roxell@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 12:32:27 +02:00
YueHaibing
be65c8bb0c pinctrl: oxnas: remove set but not used variable 'arg'
Fixes gcc '-Wunused-but-set-variable' warning:

drivers/pinctrl/pinctrl-oxnas.c: In function oxnas_ox810se_pinconf_set:
drivers/pinctrl/pinctrl-oxnas.c:905:6: warning: variable arg set but not used [-Wunused-but-set-variable]
drivers/pinctrl/pinctrl-oxnas.c: In function oxnas_ox820_pinconf_set:
drivers/pinctrl/pinctrl-oxnas.c:944:6: warning: variable arg set but not used [-Wunused-but-set-variable]

It is never used since commit 4b0c0c25fa ("pinctrl:
oxnas: Add support for OX820"), so can be removed.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Link: https://lore.kernel.org/r/20190725142419.29892-1-yuehaibing@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 12:15:56 +02:00
Alexandre Torgue
a502b343eb pinctrl: stmfx: update pinconf settings
According to the following tab (coming from STMFX datasheet), updates
have to done in stmfx_pinconf_set function:

-"type" has to be set when "bias" is configured as "pull-up or pull-down"
-PIN_CONFIG_DRIVE_PUSH_PULL should only be used when gpio is configured as
 output. There is so no need to check direction.

DIR | TYPE | PUPD | MFX GPIO configuration
----|------|------|---------------------------------------------------
1   | 1    | 1    | OUTPUT open drain with internal pull-up resistor
----|------|------|---------------------------------------------------
1   | 1    | 0    | OUTPUT open drain with internal pull-down resistor
----|------|------|---------------------------------------------------
1   | 0    | 0/1  | OUTPUT push pull no pull
----|------|------|---------------------------------------------------
0   | 1    | 1    | INPUT with internal pull-up resistor
----|------|------|---------------------------------------------------
0   | 1    | 0    | INPUT with internal pull-down resistor
----|------|------|---------------------------------------------------
0   | 0    | 1    | INPUT floating
----|------|------|---------------------------------------------------
0   | 0    | 0    | analog (GPIO not used, default setting)

Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Link: https://lore.kernel.org/r/1564053416-32192-1-git-send-email-amelie.delaunay@st.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 12:14:30 +02:00
Baolin Wang
2f22e2028c pinctrl: sprd: Combine the condition of MISC_PIN and COMMON_PIN
Since the follow-up pin design on Spreadtrum platform has some changes,
some configuration of MISC_PIN moved to COMMON_PIN. To support current
pin design and keep backward compatibility, we should combine the
condition of MISC_PIN and COMMON_PIN to configure an individual pin.

Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Link: https://lore.kernel.org/r/17af5e761e0515d288a7ea4078ac9aa4a82a7a4e.1564048446.git.baolin.wang@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 12:13:18 +02:00
Baolin Wang
e89febc75d pinctrl: sprd: Change to use devm_platform_ioremap_resource()
The devm_platform_ioremap_resource() function wraps platform_get_resource()
and devm_ioremap_resource() in a single helper, thus use it to simplify
the code.

Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Link: https://lore.kernel.org/r/ff410d312ed0047b5a36e5113daf7df78bcf1aa8.1564048446.git.baolin.wang@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 12:12:32 +02:00
Andy Shevchenko
db5b44f82a pinctrl: qdf2xxx: Switch to use device_property_count_uXX()
Use use device_property_count_uXX() directly, that makes code neater.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190723192738.68486-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 12:01:45 +02:00
Andy Shevchenko
720b8ec676 pinctrl: msm: Switch to use device_property_count_uXX()
Use use device_property_count_uXX() directly, that makes code neater.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190723192738.68486-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 11:55:41 +02:00
Charles Keepax
a1db8da7c2 pinctrl: madera: Add configuration for Cirrus Logic CS47L92
This adds the pinctrl configuration for the CS47L92 codec to
the madera pinctrl driver.

Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20190722091015.20884-3-ckeepax@opensource.cirrus.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 11:48:03 +02:00
Richard Fitzgerald
b0bca3e4ee pinctrl: madera: Add configuration for Cirrus Logic CS47L15
This adds the pinctrl configuration for the CS47L15 codec to
the madera pinctrl driver.

Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20190722091015.20884-2-ckeepax@opensource.cirrus.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 11:47:14 +02:00
Charles Keepax
f134b85177 pinctrl: madera: Use local copy of pdata
A local copy of the pdata exists and it should be used rather than
pulling a fresh copy.

Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20190722091015.20884-1-ckeepax@opensource.cirrus.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 11:46:25 +02:00
Stefan Wahren
e38a9a437f pinctrl: bcm2835: Add support for BCM2711 pull-up functionality
The BCM2711 has a new way of selecting the pull-up/pull-down setting
for a GPIO pin. The registers used for the BCM2835, GP_PUD and
GP_PUDCLKn0, are no longer connected. A new set of registers,
GP_GPIO_PUP_PDN_CNTRL_REGx must be used. This commit will add
a new compatible string "brcm,bcm2711-gpio" and the kernel
driver will use it to select which method is used to select
pull-up/pull-down.

This patch based on a patch by Al Cooper which was intended for the
BCM7211. This is a bugfixed and improved version.

Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Link: https://lore.kernel.org/r/1563776607-8368-3-git-send-email-wahrenst@gmx.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 11:35:41 +02:00
Sowjanya Komatineni
6c172af579 pinctrl: tegra210: Add Tegra210 pinctrl pm ops
This patch adds suspend and resume functionality to Tegra210 pinctrl.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Link: https://lore.kernel.org/r/1564607463-28802-3-git-send-email-skomatineni@nvidia.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 11:21:28 +02:00
Sowjanya Komatineni
9870acd374 pinctrl: tegra: Add suspend and resume support
This patch adds support for Tegra pinctrl driver suspend and resume.

During suspend, context of all pinctrl registers are stored and
on resume they are all restored to have all the pinmux and pad
configuration for normal operation.

Acked-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Link: https://lore.kernel.org/r/1564607463-28802-2-git-send-email-skomatineni@nvidia.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05 11:19:35 +02:00
Nishka Dasgupta
2f64dc70ba pinctrl: rzn1: Add of_node_put() before return
Each iteration of for_each_child_of_node puts the previous node, but in
the case of a return from the middle of the loop, there is no put, thus
causing a memory leak. Hence add an of_node_put before the return in
three places.
Issue found with Coccinelle.

Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-08-05 09:23:57 +02:00
YueHaibing
1d1def89bd pinctrl: sprd: Fix platform_no_drv_owner.cocci warnings
Remove .owner field if calls are used which set it automatically
Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci

Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Link: https://lore.kernel.org/r/20190719032414.85369-1-yuehaibing@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-03 00:32:34 +02:00
Zhou Yanjie
5d21595b17 pinctrl: Ingenic: Add pinctrl driver for X1500.
Add support for probing the pinctrl-ingenic driver on the
X1500 Soc from Ingenic.

Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
Link: https://lore.kernel.org/r/1563076436-5338-7-git-send-email-zhouyanjie@zoho.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-07-29 23:42:08 +02:00
Zhou Yanjie
fe1ad5eedc pinctrl: Ingenic: Add pinctrl driver for X1000 and X1000E.
Add support for probing the pinctrl-ingenic driver on the
X1000 Soc and the X1000E Soc from Ingenic.

Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
Link: https://lore.kernel.org/r/1563076436-5338-5-git-send-email-zhouyanjie@zoho.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-07-29 23:41:27 +02:00
Zhou Yanjie
0257595a5c pinctrl: Ingenic: Add pinctrl driver for JZ4760 and JZ4760B.
Add support for probing the pinctrl-ingenic driver on the
JZ4760 Soc and the JZ4760B Soc from Ingenic.

Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
Link: https://lore.kernel.org/r/1563076436-5338-3-git-send-email-zhouyanjie@zoho.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-07-29 23:40:23 +02:00
YueHaibing
8c4407de3b pinctrl: aspeed: Make aspeed_pinmux_ips static
Fix sparse warning:

drivers/pinctrl/aspeed/pinmux-aspeed.c:8:12: warning:
 symbol 'aspeed_pinmux_ips' was not declared. Should it be static?

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Link: https://lore.kernel.org/r/20190711142457.37028-1-yuehaibing@huawei.com
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-07-29 23:35:31 +02:00
Marc Gonzalez
fa21cbea92 pinctrl: msm8998: Squash TSIF pins together
TSIF is the Transport Stream Interface.
First, rename tsif1 to tsif0, and tsif2 to tsif1.
Then squash all 5 tsif0 pins into a single function.
Same for tsif1.

Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr>
Link: https://lore.kernel.org/r/503b2ae8-ead6-70cd-7b21-ce5f5166a23a@free.fr
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-07-29 23:28:57 +02:00
Andrew Jeffery
674fa8daa8 pinctrl: aspeed-g5: Delay acquisition of regmaps
While sorting out some devicetree issues I found that the pinctrl driver
was failing to acquire its GFX regmap even though the phandle was
present in the devicetree:

    [    0.124190] aspeed-g5-pinctrl 1e6e2000.syscon:pinctrl: No GFX phandle found, some mux configurations may fail

Without access to the GFX regmap we fail to configure the mux for the
VPO function:

    [    1.548866] pinctrl core: add 1 pinctrl maps
    [    1.549826] aspeed-g5-pinctrl 1e6e2000.syscon:pinctrl: found group selector 164 for VPO
    [    1.550638] aspeed-g5-pinctrl 1e6e2000.syscon:pinctrl: request pin 144 (V20) for 1e6e6000.display
    [    1.551346] aspeed-g5-pinctrl 1e6e2000.syscon:pinctrl: request pin 145 (U19) for 1e6e6000.display
    ...
    [    1.562057] aspeed-g5-pinctrl 1e6e2000.syscon:pinctrl: request pin 218 (T22) for 1e6e6000.display
    [    1.562541] aspeed-g5-pinctrl 1e6e2000.syscon:pinctrl: request pin 219 (R20) for 1e6e6000.display
    [    1.563113] Muxing pin 144 for VPO
    [    1.563456] Want SCU8C[0x00000001]=0x1, got 0x0 from 0x00000000
    [    1.564624] aspeed_gfx 1e6e6000.display: Error applying setting, reverse things back

This turned out to be a simple problem of timing: The ASPEED pinctrl
driver is probed during arch_initcall(), while GFX is processed much
later. As such the GFX syscon is not yet registered during the pinctrl
probe() and we get an -EPROBE_DEFER when we try to look it up, however
we must not defer probing the pinctrl driver for the inability to mux
some GFX-related functions.

Switch to lazily grabbing the regmaps when they're first required by the
mux configuration. This generates a bit of noise in the patch as we have
to drop the `const` qualifier on arguments for several function
prototypes, but has the benefit of working.

I've smoke tested this for the ast2500-evb under qemu with a dummy
graphics device. We now succeed in our attempts to configure the SoC's
VPO pinmux function.

Fixes: 7d29ed88ac ("pinctrl: aspeed: Read and write bits in LPC and GFX controllers")
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20190724080155.12209-1-andrew@aj.id.au
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-07-29 00:52:51 +02:00
Linus Walleij
0ce242ad2e pinctrl: qcom: Pass irqchip when adding gpiochip
We need to convert all old gpio irqchips to pass the irqchip
setup along when adding the gpio_chip.

For chained irqchips this is a pretty straight-forward
conversion.

Cc: Thierry Reding <treding@nvidia.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Co-developed-by: Lina Iyer <ilina@codeaurora.org>
Link: https://lore.kernel.org/r/20190724083828.7496-1-linus.walleij@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-07-29 00:43:25 +02:00
Andy Shevchenko
cfc1c34585 pinctrl: intel: Drop double check for data in intel_pinctrl_probe_by_uid()
There is no need to duplicate the check which is done in the common
intel_pinctrl_probe().

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-07-23 18:50:48 +03:00
Andy Shevchenko
fa01aff976 pinctrl: merrifield: Use devm_platform_ioremap_resource()
Use the new helper that wraps the calls to platform_get_resource()
and devm_ioremap_resource() together.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-07-23 16:13:14 +03:00
Andy Shevchenko
9d5b6a9520 pinctrl: intel: Use devm_platform_ioremap_resource()
Use the new helper that wraps the calls to platform_get_resource()
and devm_ioremap_resource() together.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-07-23 16:13:14 +03:00
Andy Shevchenko
a86f12b277 pinctrl: cherryview: Use devm_platform_ioremap_resource()
Use the new helper that wraps the calls to platform_get_resource()
and devm_ioremap_resource() together.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-07-23 16:13:14 +03:00
Andy Shevchenko
24025010d1 pinctrl: baytrail: Use devm_platform_ioremap_resource()
Use the new helper that wraps the calls to platform_get_resource()
and devm_ioremap_resource() together.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-07-23 16:13:13 +03:00
Linus Torvalds
43c95d3694 This is the bulk of pin control changes for the v5.3 kernel
cycle:
 
 Core changes:
 
 - Device links can optionally be added between a pin control
   producer and its consumers. This will affect how the system
   power management is handled: a pin controller will not suspend
   before all of its consumers have been suspended. This was
   necessary for the ST Microelectronics STMFX expander and
   need to be tested on other systems as well: it makes sense
   to make this default in the long run. Right now it is
   opt-in per driver.
 
 - Drive strength can be specified in microamps. With decreases
   in silicon technology, milliamps isn't granular enough, let's
   make it possible to select drive strengths in microamps. Right
   now the Meson (AMlogic) driver needs this.
 
 New drivers:
 
 - New subdriver for the Tegra 194 SoC.
 
 - New subdriver for the Qualcomm SDM845.
 
 - New subdriver for the Qualcomm SM8150.
 
 - New subdriver for the Freescale i.MX8MN (Freescale is now a
   product line of NXP).
 
 - New subdriver for Marvell MV98DX1135.
 
 Driver improvements:
 
 - The Bitmain BM1880 driver now supports pin config in
   addition to muxing.
 
 - The Qualcomm drivers can now reserve some GPIOs as taken
   aside and not usable for users. This is used in ACPI systems
   to take out some GPIO lines used by the BIOS so that
   noone else (neither kernel nor userspace) will play with them
   by mistake and crash the machine.
 
 - A slew of refurbishing around the Aspeed drivers (board
   management controllers for servers) in preparation for the
   new Aspeed AST2600 SoC.
 
 - A slew of improvements over the SH PFC drivers as usual.
 
 - Misc cleanups and fixes.
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Merge tag 'pinctrl-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v5.3 kernel cycle:

  Core changes:

   - Device links can optionally be added between a pin control producer
     and its consumers. This will affect how the system power management
     is handled: a pin controller will not suspend before all of its
     consumers have been suspended.

     This was necessary for the ST Microelectronics STMFX expander and
     need to be tested on other systems as well: it makes sense to make
     this default in the long run.

     Right now it is opt-in per driver.

   - Drive strength can be specified in microamps. With decreases in
     silicon technology, milliamps isn't granular enough, let's make it
     possible to select drive strengths in microamps.

     Right now the Meson (AMlogic) driver needs this.

  New drivers:

   - New subdriver for the Tegra 194 SoC.

   - New subdriver for the Qualcomm SDM845.

   - New subdriver for the Qualcomm SM8150.

   - New subdriver for the Freescale i.MX8MN (Freescale is now a product
     line of NXP).

   - New subdriver for Marvell MV98DX1135.

  Driver improvements:

   - The Bitmain BM1880 driver now supports pin config in addition to
     muxing.

   - The Qualcomm drivers can now reserve some GPIOs as taken aside and
     not usable for users. This is used in ACPI systems to take out some
     GPIO lines used by the BIOS so that noone else (neither kernel nor
     userspace) will play with them by mistake and crash the machine.

   - A slew of refurbishing around the Aspeed drivers (board management
     controllers for servers) in preparation for the new Aspeed AST2600
     SoC.

   - A slew of improvements over the SH PFC drivers as usual.

   - Misc cleanups and fixes"

* tag 'pinctrl-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (106 commits)
  pinctrl: aspeed: Strip moved macros and structs from private header
  pinctrl: aspeed: Fix missed include
  pinctrl: baytrail: Use GENMASK() consistently
  pinctrl: baytrail: Re-use data structures from pinctrl-intel.h
  pinctrl: baytrail: Use defined macro instead of magic in byt_get_gpio_mux()
  pinctrl: qcom: Add SM8150 pinctrl driver
  dt-bindings: pinctrl: qcom: Add SM8150 pinctrl binding
  dt-bindings: pinctrl: qcom: Document missing gpio nodes
  pinctrl: aspeed: Add implementation-related documentation
  pinctrl: aspeed: Split out pinmux from general pinctrl
  pinctrl: aspeed: Clarify comment about strapping W1C
  pinctrl: aspeed: Correct comment that is no longer true
  MAINTAINERS: Add entry for ASPEED pinctrl drivers
  dt-bindings: pinctrl: aspeed: Convert AST2500 bindings to json-schema
  dt-bindings: pinctrl: aspeed: Convert AST2400 bindings to json-schema
  dt-bindings: pinctrl: aspeed: Split bindings document in two
  pinctrl: qcom: Add irq_enable callback for msm gpio
  pinctrl: madera: Fixup SPDX headers
  pinctrl: qcom: sdm845: Fix CONFIG preprocessor guard
  pinctrl: tegra: Add bitmask support for parked bits
  ...
2019-07-13 15:02:27 -07:00
Linus Torvalds
f632a8170a Driver Core and debugfs changes for 5.3-rc1
Here is the "big" driver core and debugfs changes for 5.3-rc1
 
 It's a lot of different patches, all across the tree due to some api
 changes and lots of debugfs cleanups.  Because of this, there is going
 to be some merge issues with your tree at the moment, I'll follow up
 with the expected resolutions to make it easier for you.
 
 Other than the debugfs cleanups, in this set of changes we have:
 	- bus iteration function cleanups (will cause build warnings
 	  with s390 and coresight drivers in your tree)
 	- scripts/get_abi.pl tool to display and parse Documentation/ABI
 	  entries in a simple way
 	- cleanups to Documenatation/ABI/ entries to make them parse
 	  easier due to typos and other minor things
 	- default_attrs use for some ktype users
 	- driver model documentation file conversions to .rst
 	- compressed firmware file loading
 	- deferred probe fixes
 
 All of these have been in linux-next for a while, with a bunch of merge
 issues that Stephen has been patient with me for.  Other than the merge
 issues, functionality is working properly in linux-next :)
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'driver-core-5.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core

Pull driver core and debugfs updates from Greg KH:
 "Here is the "big" driver core and debugfs changes for 5.3-rc1

  It's a lot of different patches, all across the tree due to some api
  changes and lots of debugfs cleanups.

  Other than the debugfs cleanups, in this set of changes we have:

   - bus iteration function cleanups

   - scripts/get_abi.pl tool to display and parse Documentation/ABI
     entries in a simple way

   - cleanups to Documenatation/ABI/ entries to make them parse easier
     due to typos and other minor things

   - default_attrs use for some ktype users

   - driver model documentation file conversions to .rst

   - compressed firmware file loading

   - deferred probe fixes

  All of these have been in linux-next for a while, with a bunch of
  merge issues that Stephen has been patient with me for"

* tag 'driver-core-5.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (102 commits)
  debugfs: make error message a bit more verbose
  orangefs: fix build warning from debugfs cleanup patch
  ubifs: fix build warning after debugfs cleanup patch
  driver: core: Allow subsystems to continue deferring probe
  drivers: base: cacheinfo: Ensure cpu hotplug work is done before Intel RDT
  arch_topology: Remove error messages on out-of-memory conditions
  lib: notifier-error-inject: no need to check return value of debugfs_create functions
  swiotlb: no need to check return value of debugfs_create functions
  ceph: no need to check return value of debugfs_create functions
  sunrpc: no need to check return value of debugfs_create functions
  ubifs: no need to check return value of debugfs_create functions
  orangefs: no need to check return value of debugfs_create functions
  nfsd: no need to check return value of debugfs_create functions
  lib: 842: no need to check return value of debugfs_create functions
  debugfs: provide pr_fmt() macro
  debugfs: log errors when something goes wrong
  drivers: s390/cio: Fix compilation warning about const qualifiers
  drivers: Add generic helper to match by of_node
  driver_find_device: Unify the match function with class_find_device()
  bus_find_device: Unify the match callback with class_find_device
  ...
2019-07-12 12:24:03 -07:00
Andrew Jeffery
4c105769bf pinctrl: aspeed: Strip moved macros and structs from private header
Further cleanup from the SPDX fixup fallout for the recent ASPEED
series. aspeed_g4_defconfig, aspeed_g5_defconfig and multi_v5_defconfig
now compile. Smoke tested the g4 and g5 kernels under QEMU's
palmetto-bmc and romulus-bmc machines respectively.

Fixes: 35d8510ea3ad ("pinctrl: aspeed: Fix missed include")
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20190710032216.4088-1-andrew@aj.id.au
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-07-10 11:19:20 +02:00
Linus Walleij
a1cd6c8b8f pinctrl: aspeed: Fix missed include
Some SPDX churn made my fixes drop an important include
from the Aspeed pinctrl header. Fix it up.

Cc: Andrew Jeffery <andrew@aj.id.au>
Reported-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-07-10 11:19:00 +02:00
Andy Shevchenko
eb0a2daa45 pinctrl: baytrail: Use GENMASK() consistently
Use GENMASK() macro for all definitions where it's appropriate.
No functional change intended.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190703151554.30454-1-andriy.shevchenko@linux.intel.com
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-07-04 09:58:13 +02:00
Andy Shevchenko
4f010b936b pinctrl: baytrail: Re-use data structures from pinctrl-intel.h
We have some data structures duplicated across the drivers.
Let's deduplicate them by using ones that being provided by
pinctrl-intel.h.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190703003018.75186-2-andriy.shevchenko@linux.intel.com
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-07-04 09:51:24 +02:00
Andy Shevchenko
a705f9c179 pinctrl: baytrail: Use defined macro instead of magic in byt_get_gpio_mux()
By the fact byt_get_gpio_mux() returns a value of mux settings as
it is represented in hardware. Use defined macro instead of magic numbers
to clarify this.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190703003018.75186-1-andriy.shevchenko@linux.intel.com
Reviewed-By: Enrico Weigelt <info@metux.net>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-07-04 09:48:49 +02:00
Prasad Sodagudi
57218371d5 pinctrl: qcom: Add SM8150 pinctrl driver
Add initial pinctrl driver to support pin configuration with
pinctrl framework for SM8150

Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
[vkoul: modify to use upstream tile support
	use upstream code style
	order the functions and squash functions]
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20190702105045.27646-4-vkoul@kernel.org
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-07-04 09:47:13 +02:00
Thierry Reding
62a6bc3a1e driver: core: Allow subsystems to continue deferring probe
Some subsystems, such as pinctrl, allow continuing to defer probe
indefinitely. This is useful for devices that depend on resources
provided by devices that are only probed after the init stage.

One example of this can be seen on Tegra, where the DPAUX hardware
contains pinmuxing controls for pins that it shares with an I2C
controller. The I2C controller is typically used for communication
with a monitor over HDMI (DDC). However, other instances of the I2C
controller are used to access system critical components, such as a
PMIC. The I2C controller driver will therefore usually be a builtin
driver, whereas the DPAUX driver is part of the display driver that
is loaded from a module to avoid bloating the kernel image with all
of the DRM/KMS subsystem.

In this particular case the pins used by this I2C/DDC controller
become accessible very late in the boot process. However, since the
controller is only used in conjunction with display, that's not an
issue.

Unfortunately the driver core currently outputs a warning message
when a device fails to get the pinctrl before the end of the init
stage. That can be confusing for the user because it may sound like
an unwanted error occurred, whereas it's really an expected and
harmless situation.

In order to eliminate this warning, this patch allows callers of the
driver_deferred_probe_check_state() helper to specify that they want
to continue deferring probe, regardless of whether we're past the
init stage or not. All of the callers of that function are updated
for the new signature, but only the pinctrl subsystem passes a true
value in the new persist parameter if appropriate.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20190621151725.20414-1-thierry.reding@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-07-03 21:28:20 +02:00
Andrew Jeffery
1bbe61d892 pinctrl: aspeed: Add implementation-related documentation
The ASPEED pinctrl driver implementations make heavy use of macros to
minimise tedium of implementation and maximise the chance that the
compiler will catch errors in defining signal and pin configurations.
While the goal of minimising errors is achieved, it is at the cost of
the complexity of the macros.

Document examples of the expanded form of pin declarations to
demonstrate the operation of the macros.

Cc: Johnny Huang <johnny_huang@aspeedtech.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20190628023838.15426-9-andrew@aj.id.au
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-07-03 10:38:58 +02:00
Andrew Jeffery
efa5623981 pinctrl: aspeed: Split out pinmux from general pinctrl
ASPEED have completely rearranged the System Control Unit register
layout with the AST2600. The existing code took advantage of the fact
that the AST2400 and AST2500 had layouts that were similar enough to
have little impact on the pinmux infrastructure (though there is a wart
with read-modify-write vs write-1-clear semantics of the hardware
strapping registers between the two).

Given that any similarity has been thrown out with the AST2600, separate
out the function applying an expression state to be driver-specific.
With it, extract out the pinmux macro jungle to its own header and
implementation so the pieces can be composed without dependency cycles.

Cc: Johnny Huang <johnny_huang@aspeedtech.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20190628023838.15426-8-andrew@aj.id.au
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-07-03 10:38:03 +02:00
Andrew Jeffery
d0d88b5c9e pinctrl: aspeed: Clarify comment about strapping W1C
Writes of 1 to SCU7C clear set bits in SCU70, the hardware strapping
register. The information was correct if you squinted while reading, but
hopefully switching the order of the registers as listed conveys it
better.

Cc: Johnny Huang <johnny_huang@aspeedtech.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20190628023838.15426-7-andrew@aj.id.au
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-07-03 10:35:21 +02:00
Andrew Jeffery
0290eba96b pinctrl: aspeed: Correct comment that is no longer true
We have handled the GFX register case for quite some time now.

Cc: Johnny Huang <johnny_huang@aspeedtech.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20190628023838.15426-6-andrew@aj.id.au
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-07-03 10:35:00 +02:00
Srinivas Ramana
4b7618fdc7 pinctrl: qcom: Add irq_enable callback for msm gpio
Introduce the irq_enable callback which will be same as irq_unmask
except that it will also clear the status bit before unmask.

This will help in clearing any erroneous interrupts that would
have got latched when the interrupt is not in use.

There may be devices like UART which can use the same gpio line
for data rx as well as a wakeup gpio when in suspend. The data that
was flowing on the line may latch the interrupt and when we enable
the interrupt before going to suspend, this would trigger the
unexpected interrupt. This change helps clearing the interrupt
so that these unexpected interrupts gets cleared.

Signed-off-by: Srinivas Ramana <sramana@codeaurora.org>
Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
Link: https://lore.kernel.org/r/1561472086-23360-1-git-send-email-neeraju@codeaurora.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-07-03 10:25:53 +02:00
Linus Torvalds
061913712d Pin control fixes for the v5.2 cycle:
- Fix IRQ setup in the MCP23s08.
 - Fix pin setup on pins > 31 in the Ocelot driver.
 - Fix IRQs in the Mediatek driver.
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Merge tag 'pinctrl-v5.2-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control fixes from Linus Walleij:
 "Sorry to bomb in fixes this late. Maybe I can comfort you by saying it
  is only driver fixes, and mostly IRQ handling which is something GPIO
  and pin control drivers never get right. You think it works and then
  it doesn't.

  Summary:

   - Fix IRQ setup in the MCP23s08.

   - Fix pin setup on pins > 31 in the Ocelot driver.

   - Fix IRQs in the Mediatek driver"

* tag 'pinctrl-v5.2-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  pinctrl: mediatek: Update cur_mask in mask/mask ops
  pinctrl: mediatek: Ignore interrupts that are wake only during resume
  pinctrl: ocelot: fix pinmuxing for pins after 31
  pinctrl: ocelot: fix gpio direction for pins after 31
  pinctrl: mcp23s08: Fix add_data and irqchip_add_nested call order
2019-06-29 16:51:10 +08:00
Nicolas Boichat
9d957a959b pinctrl: mediatek: Update cur_mask in mask/mask ops
During suspend/resume, mtk_eint_mask may be called while
wake_mask is active. For example, this happens if a wake-source
with an active interrupt handler wakes the system:
irq/pm.c:irq_pm_check_wakeup would disable the interrupt, so
that it can be handled later on in the resume flow.

However, this may happen before mtk_eint_do_resume is called:
in this case, wake_mask is loaded, and cur_mask is restored
from an older copy, re-enabling the interrupt, and causing
an interrupt storm (especially for level interrupts).

Step by step, for a line that has both wake and interrupt enabled:
 1. cur_mask[irq] = 1; wake_mask[irq] = 1; EINT_EN[irq] = 1 (interrupt
    enabled at hardware level)
 2. System suspends, resumes due to that line (at this stage EINT_EN
    == wake_mask)
 3. irq_pm_check_wakeup is called, and disables the interrupt =>
    EINT_EN[irq] = 0, but we still have cur_mask[irq] = 1
 4. mtk_eint_do_resume is called, and restores EINT_EN = cur_mask, so
    it reenables EINT_EN[irq] = 1 => interrupt storm as the driver
    is not yet ready to handle the interrupt.

This patch fixes the issue in step 3, by recording all mask/unmask
changes in cur_mask. This also avoids the need to read the current
mask in eint_do_suspend, and we can remove mtk_eint_chip_read_mask
function.

The interrupt will be re-enabled properly later on, sometimes after
mtk_eint_do_resume, when the driver is ready to handle it.

Fixes: 58a5e1b64b ("pinctrl: mediatek: Implement wake handler and suspend resume")
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Acked-by: Sean Wang <sean.wang@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-06-27 12:22:11 +01:00
Nicolas Boichat
35594bc7ce pinctrl: mediatek: Ignore interrupts that are wake only during resume
Before suspending, mtk-eint would set the interrupt mask to the
one in wake_mask. However, some of these interrupts may not have a
corresponding interrupt handler, or the interrupt may be disabled.

On resume, the eint irq handler would trigger nevertheless,
and irq/pm.c:irq_pm_check_wakeup would be called, which would
try to call irq_disable. However, if the interrupt is not enabled
(irqd_irq_disabled(&desc->irq_data) is true), the call does nothing,
and the interrupt is left enabled in the eint driver.

Especially for level-sensitive interrupts, this will lead to an
interrupt storm on resume.

If we detect that an interrupt is only in wake_mask, but not in
cur_mask, we can just mask it out immediately (as mtk_eint_resume
would do anyway at a later stage in the resume sequence, when
restoring cur_mask).

Fixes: bf22ff45be ("genirq: Avoid unnecessary low level irq function calls")
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Acked-by: Sean Wang <sean.wang@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-06-26 16:09:50 +02:00