Commit Graph

53 Commits

Author SHA1 Message Date
Sergei Shtylyov
e66796b9bb ARM: dts: r8a7792: add [H]SCIF support
Describe [H]SCIFs in the R8A7792 device tree.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-06-16 09:25:20 +09:00
Sergei Shtylyov
fdf8ec0a17 ARM: dts: r8a7792: add SYS-DMAC support
Describe SYS-DMAC0/1 in the R8A7792 device tree.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-06-16 09:25:20 +09:00
Sergei Shtylyov
7c4163aae3 ARM: dts: r8a7792: initial SoC device tree
The initial R8A7792 SoC device tree including CPU cores, GIC, timer, SYSC,
and the required  clock descriptions.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-06-16 09:25:20 +09:00