Commit Graph

2 Commits

Author SHA1 Message Date
Patrice Chotard
704cfd7f5f ARM: sti: remove pen_release and boot_lock
The pen_release implementation was created for Versatile platforms to
work around boot loaders that did not differentiate between the
various different secondary CPUs on this ARM development platform.
This should not be true of modern platforms where we send IPIs to
specific CPUs to wake them up.  Remove the pen_release stuff from
SoCs that make use of the per-CPU IPI mechanism.

The boot_lock is something that was required for ARM development
platforms to ensure that the delay calibration worked properly.  This
is not necessary for modern platforms that have better bus bandwidth
and do not need to calibrate the delay loop for secondary cores.
Remove the boot_lock entirely.

Due to pen_release and boot_lock removal, .smp_prepare_cpus and
.smp_boot_secondary STi callbacks must be reworked properly to
allow secondary CPU bring up.

Secondary CPU is initialized and started by a U-BOOTROM firmware.
Secondary CPU is spinning and waiting for a write at cpu_strt_ptr.
Writing secondary_startup address at cpu_strt_ptr makes it to
jump directly to secondary_startup().

This write must be done in .smp_boot_secondary callback and not
in .smp_prepare_cpus as previously, this insures that secondary_data
struct is populated in __cpu_up() (stack, pgdir and swapper_pg_dir fields).

The IPI in sti_boot_secondary() is useless, so remove it.

This patch is the merged of Russell's patch [1] and the rework of
.smp_prepare_cpus and .smp_boot_secondary STi callbacks [2].

[1] https://patchwork.kernel.org/patch/10729435/
[2] https://patchwork.kernel.org/patch/10735795/

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-20 14:32:15 +01:00
Srinivas Kandagatla
65ebcc1158 ARM: sti: Add STiH415 SOC support
The STiH415 is the next generation of HD, AVC set-top box processors for
satellite, cable, terrestrial and IP-STB markets. It is an ARM Cortex-A9
1.0 GHz, dual-core CPU.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
CC: Stephen Gallimore <stephen.gallimore@st.com>
CC: Stuart Menefy <stuart.menefy@st.com>
CC: Arnd Bergmann <arnd@arndb.de>
CC: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-25 13:26:47 -07:00