function that isn't used anymore. Otherwise the main new thing for the common
clk framework is that it is selectable in the Kconfig language now. Hopefully
this will let clk drivers and clk consumers be testable on more than the
architectures that support the clk framework. The goal is to introduce some
Kunit tests for the framework.
Outside of the core framework we have the usual set of various driver updates
and non-critical fixes. The dirstat shows that the new Baikal-T1 driver is the
largest addition this time around in terms of lines of code. After that the x86
(Intel), Qualcomm, and Mediatek drivers introduce many lines to support new or
upcoming SoCs. After that the dirstat shows the usual suspects working on their
SoC support by fixing minor bugs, correcting data and converting some of their
DT bindings to YAML.
Core:
- Allow the COMMON_CLK config to be selectable
New Drivers:
- Clk driver for Baikal-T1 SoCs
- Mediatek MT6765 clock support
- Support for Intel Agilex clks
- Add support for X1830 and X1000 Ingenic SoC clk controllers
- Add support for the new Renesas RZ/G1H (R8A7742) SoC
- Add support for Qualcomm's MSM8939 Generic Clock Controller
Updates:
- Support IDT VersaClock 5P49V5925
- Bunch of updates for HSDK clock generation unit (CGU) driver
- Start making audio and GPU clks work on Marvell MMP2/MMP3 SoCs
- Add some GPU, NPU, and UFS clks to Qualcomm SM8150 driver
- Enable supply regulators for GPU gdscs on Qualcomm SoCs
- Add support for Si5342, Si5344 and Si5345 chips
- Support custom flags in Xilinx zynq firmware
- Various small fixes to the Xilinx clk driver
- A single minor rounding fix for the legacy Allwinner clock support
- A few patches from Abel Vesa as preparation of adding audiomix clock support
on i.MX
- A couple of cleanups from Anson Huang for i.MX clk-sscg-pll and clk-pllv3
drivers
- Drop dependency on ARM64 for i.MX8M clock driver, to support aarch32 mode on
aarch64 hardware
- A series from Peng Fan to improve i.MX8M clock drivers, using composite
clock for core and bus clk slice
- Set a better parent clock for flexcan on i.MX6UL to support CiA102 defined
bit rates
- A couple changes for EMC frequency scaling on Tegra210
- Support for CPU frequency scaling on Tegra20/Tegra30
- New clk gate for CSI test pattern generator on Tegra210
- Regression fixes for Samsung exynos542x and exynos5433 SoCs
- Use of fallthrough; attribute for Samsung s3c24xx
- Updates and fixup HDMI and video clocks on Meson8b
- Fixup reset polarity on Meson8b
- Fix GPU glitch free mux switch on Meson gx and g12
- A minor fix for the currently unused suspend/resume handling on Renesas RZ/A1 and RZ/A2
- Two more conversions of Renesas DT bindings to json-schema
- Add support for the USB 2.0 clock selector on Renesas R-Car M3-W+
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAl7gEUgRHHNib3lkQGtl
cm5lbC5vcmcACgkQrQKIl8bklSUemxAAlQKzx0yMS3yx5twJ4RSFUvf3hf4OqyPp
O46soqADk+l69Z4SUUBsMjt8el5Sqmm4d1j1Gpfmgp3ZlumHCQK+qGYp48IXbwRP
Jlo5sKNlNL6yhCd+ixPn4j7W/HbpGs4cciWOXkGQtYEGjhHm3Wllhd9MqpL2YjLx
gZW60NqWtOe1XeB4ILyYQGisNwAGDi5XuBeNvxG12H/LaGC1mwtBX9yoNAehr9bF
peJ2XnO02zFo73OCyzIOkw1uY4u7ZtwPdHGhymoGeVlcBWO6KwKesNkHnji/Grlv
wMbsGLoRV/i3PL3q5kZIDigo8sqZ9RUG+9piRAoiLM5AgkSypw3/q9T+ujTfZp8t
kgvFha6bLZz31UFmr4lBJPTT5Q/hAoe1W6RB6HZkx7XNqUpsAS04SwkQztAqkJqZ
9zlYJrXgLlP5qcNllJ6zvUWkMqtmIKW4ZkjYe4u84yk5Co7bX8DCYa+QOKCz+pV4
IbjRT62OrX2ZlXJYwkLb4m1nhZ7tBzhzIRP1umL0ukhxdomK6ofSNPzbBF9+t1eR
/ai2/Ch6L6WIwDINEp+chO67/dJaj5W3WNqGMCmVt37myW1kBjH3eg0YG4cp7NYZ
/jSjdWczQy/8BgY5V1009MRXI4uyazQxBw+apDcIGezamOKBmuwjBcvkf1D0mL2x
Y6OclK5ljsw=
=nuG5
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"This time around we have four lines of diff in the core framework,
removing a function that isn't used anymore. Otherwise the main new
thing for the common clk framework is that it is selectable in the
Kconfig language now. Hopefully this will let clk drivers and clk
consumers be testable on more than the architectures that support the
clk framework. The goal is to introduce some Kunit tests for the
framework.
Outside of the core framework we have the usual set of various driver
updates and non-critical fixes. The dirstat shows that the new
Baikal-T1 driver is the largest addition this time around in terms of
lines of code. After that the x86 (Intel), Qualcomm, and Mediatek
drivers introduce many lines to support new or upcoming SoCs. After
that the dirstat shows the usual suspects working on their SoC support
by fixing minor bugs, correcting data and converting some of their DT
bindings to YAML.
Core:
- Allow the COMMON_CLK config to be selectable
New Drivers:
- Clk driver for Baikal-T1 SoCs
- Mediatek MT6765 clock support
- Support for Intel Agilex clks
- Add support for X1830 and X1000 Ingenic SoC clk controllers
- Add support for the new Renesas RZ/G1H (R8A7742) SoC
- Add support for Qualcomm's MSM8939 Generic Clock Controller
Updates:
- Support IDT VersaClock 5P49V5925
- Bunch of updates for HSDK clock generation unit (CGU) driver
- Start making audio and GPU clks work on Marvell MMP2/MMP3 SoCs
- Add some GPU, NPU, and UFS clks to Qualcomm SM8150 driver
- Enable supply regulators for GPU gdscs on Qualcomm SoCs
- Add support for Si5342, Si5344 and Si5345 chips
- Support custom flags in Xilinx zynq firmware
- Various small fixes to the Xilinx clk driver
- A single minor rounding fix for the legacy Allwinner clock support
- A few patches from Abel Vesa as preparation of adding audiomix
clock support on i.MX
- A couple of cleanups from Anson Huang for i.MX clk-sscg-pll and
clk-pllv3 drivers
- Drop dependency on ARM64 for i.MX8M clock driver, to support
aarch32 mode on aarch64 hardware
- A series from Peng Fan to improve i.MX8M clock drivers, using
composite clock for core and bus clk slice
- Set a better parent clock for flexcan on i.MX6UL to support CiA102
defined bit rates
- A couple changes for EMC frequency scaling on Tegra210
- Support for CPU frequency scaling on Tegra20/Tegra30
- New clk gate for CSI test pattern generator on Tegra210
- Regression fixes for Samsung exynos542x and exynos5433 SoCs
- Use of fallthrough; attribute for Samsung s3c24xx
- Updates and fixup HDMI and video clocks on Meson8b
- Fixup reset polarity on Meson8b
- Fix GPU glitch free mux switch on Meson gx and g12
- A minor fix for the currently unused suspend/resume handling on
Renesas RZ/A1 and RZ/A2
- Two more conversions of Renesas DT bindings to json-schema
- Add support for the USB 2.0 clock selector on Renesas R-Car M3-W+"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (155 commits)
clk: mediatek: Remove ifr{0,1}_cfg_regs structures
clk: baikal-t1: remove redundant assignment to variable 'divider'
clk: baikal-t1: fix spelling mistake "Uncompatible" -> "Incompatible"
dt-bindings: clock: Add a missing include to MMP Audio Clock binding
dt: Add bindings for IDT VersaClock 5P49V5925
clk: vc5: Add support for IDT VersaClock 5P49V6965
clk: Add Baikal-T1 CCU Dividers driver
clk: Add Baikal-T1 CCU PLLs driver
dt-bindings: clk: Add Baikal-T1 CCU Dividers binding
dt-bindings: clk: Add Baikal-T1 CCU PLLs binding
clk: mediatek: assign the initial value to clk_init_data of mtk_mux
clk: mediatek: Add MT6765 clock support
clk: mediatek: add mt6765 clock IDs
dt-bindings: clock: mediatek: document clk bindings vcodecsys for Mediatek MT6765 SoC
dt-bindings: clock: mediatek: document clk bindings mipi0a for Mediatek MT6765 SoC
dt-bindings: clock: mediatek: document clk bindings for Mediatek MT6765 SoC
CLK: HSDK: CGU: add support for 148.5MHz clock
CLK: HSDK: CGU: support PLL bypassing
CLK: HSDK: CGU: check if PLL is bypassed first
clk: clk-si5341: Add support for the Si5345 series
...
Core changes:
- A new GPIO aggregator driver has been merged: this can
join a few select GPIO lines into a new aggregated GPIO
chip. This can be used for security: a process can be
granted access to only these lines, for example for
industrial control. Another way to use this is to
reexpose certain select lines to a virtual machine or
container.
- Warn if the gpio-line-names is too long in he DT parser
core.
- GPIO lines can now be looked up by line name in addition
to being looked up by offset.
New drivers:
- A new generic regmap GPIO driver has been merged. Too
many regmap drivers are starting to look like each other
so we need to create some common ground and try to move
drivers over to using that.
- The F7188X driver now supports F81865.
Driver improvements:
- Large improvements to the PCA953x expander, get multiple lines
and several cleanups.
- Large improvements to the DesignWare DWAPB driver, and Sergey
Semin has volunteered to maintain it.
- PL061 can now be built as a module, this is part of a bigger
effort to make the ARM platforms more modular.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAl7ZarsACgkQQRCzN7AZ
XXNRERAAvb/8YZX8yzfWqqKZ+aXxBOzn5LsbS15QjJz9W22wAZNhjNEHAtzd+xNJ
BiyDt+BQLGqIr2aCKglVFOOYfa8PhTjrVA40ujRFUs3d8q8gr/RFpfGN3/w36h0W
e3+QCHqe27Sk07wCB3RH7hzGcKhEUUt+A5sI0uX/nt9obx8IxdVPkafBYqCfdfWw
qv9T/MU75ZYeLURg24AkgZR069gQeiDAEKVa8lYh9qKBhircFzBxM6Bg9Efn8tst
E+6XIXNREslXBq5wtAosXI/t25ZpYtzDvkM5+/lm1jQyjMEh9wJyjmgu7tcRRZRK
xxxOcUHybDJaCFogkA5iOLzyfcUbGZM/i5wQkUE3SPACypGfncjkYZPdY6Smljd1
SfBfl48xch2WW12f1/P04VwSVDNxNe9/RUqapZ5ZQfd2DJwyiZM6p+S85rrFKJse
BvixFpGMY3J5h/lZUoaF93JaaQiWh2RK6WnsBvMVn2P9+WyPnwdUL2EX2RrYvdMR
iH3jmRzlSeVQnest5c1k+i05O3D0fq3gJ+qvzT5gqxbFdRm6HZEhJNiVT56Y1V4n
30FJMbXg8mddxLvl7b1Hfi5E7PLFOP9Ygz7bHxAfogROGpWMMGgAlynxcSjqUesg
YWoRPl0XmtMcsvVNJvLM/B3+Gxh78CsMzo4Nwh9FtgUMOG6B0Xw=
=B5OK
-----END PGP SIGNATURE-----
Merge tag 'gpio-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO updates from Linus Walleij:
"This is the bulk of GPIO changes for the v5.8 kernel cycle.
Core changes:
- A new GPIO aggregator driver has been merged: this can join a few
select GPIO lines into a new aggregated GPIO chip. This can be used
for security: a process can be granted access to only these lines,
for example for industrial control. Another way to use this is to
reexpose certain select lines to a virtual machine or container.
- Warn if the gpio-line-names is too long in he DT parser core.
- GPIO lines can now be looked up by line name in addition to being
looked up by offset.
New drivers:
- A new generic regmap GPIO driver has been merged. Too many regmap
drivers are starting to look like each other so we need to create
some common ground and try to move drivers over to using that.
- The F7188X driver now supports F81865.
Driver improvements:
- Large improvements to the PCA953x expander, get multiple lines and
several cleanups.
- Large improvements to the DesignWare DWAPB driver, and Sergey Semin
has volunteered to maintain it.
- PL061 can now be built as a module, this is part of a bigger effort
to make the ARM platforms more modular"
* tag 'gpio-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (77 commits)
gpio: pca953x: Drop unneeded ACPI_PTR()
MAINTAINERS: Add gpio regmap section
gpio: add a reusable generic gpio_chip using regmap
gpiolib: Introduce gpiochip_irqchip_add_domain()
gpio: gpiolib: Allow GPIO IRQs to lazy disable
gpiolib: Separate GPIO_GET_LINEINFO_WATCH_IOCTL conditional
gpio: rcar: Fix runtime PM imbalance on error
gpio: pca935x: Allow IRQ support for driver built as a module
gpio: pxa: Add COMPILE_TEST support
dt-bindings: gpio: Add renesas,em-gio bindings
MAINTAINERS: Fix file name for DesignWare GPIO DT schema
gpio: dwapb: Remove unneeded has_irq member in struct dwapb_port_property
gpio: dwapb: Don't use IRQ 0 as valid Linux interrupt
gpio: dwapb: avoid error message for optional IRQ
gpio: dwapb: Call acpi_gpiochip_free_interrupts() on GPIO chip de-registration
gpio: max730x: bring gpiochip_add_data after port config
MAINTAINERS: Add GPIO Aggregator section
docs: gpio: Add GPIO Aggregator documentation
gpio: Add GPIO Aggregator
gpiolib: Add support for GPIO lookup by line name
...
i801_add_mux() fills in the GPIO lookup table by manually populating an
array of gpiod_lookup structures. Use the existing GPIO_LOOKUP() helper
macro instead, to relax a dependency on the gpiod_lookup structure's
member names.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Jean Delvare <jdelvare@suse.de>
Link: https://lore.kernel.org/r/20200511145257.22970-2-geert+renesas@glider.be
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Use a mutex to protect access to idev->msg_len, idev->buf, etc. which
are modified by both altr_i2c_xfer_msg() and altr_i2c_isr().
This is the minimal fix for easy backporting. A cleanup to remove the
spinlock will be added later.
Signed-off-by: Atsushi Nemoto <atsushi.nemoto@sord.co.jp>
Acked-by: Thor Thayer <thor.thayer@linux.intel.com>
[wsa: updated commit message]
Signed-off-by: Wolfram Sang <wsa@kernel.org>
devm_gpiod_get() usually calls gpio_request_enable() for non-strict pinmux
drivers. These puts the pins in GPIO mode, whithout notifying the pinctrl
driver. At this point, the I2C bus no longer owns the pins. To mux the
pins back to the I2C bus, we use the pinctrl driver to change the state
of the pins to GPIO, before using devm_gpiod_get(). After the pins are
received as GPIOs, we switch theer pinctrl state back to the default
one,
Fixes: d3d3fdcc4c ("i2c: at91: implement i2c bus recovery")
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
In AST2600 there have a slow peripheral bus between CPU and i2c
controller. Therefore GIC i2c interrupt status clear have delay timing,
when CPU issue write clear i2c controller interrupt status. To avoid
this issue, the driver need have read after write clear at i2c ISR.
Fixes: f327c686d3 ("i2c: aspeed: added driver for Aspeed I2C")
Signed-off-by: ryan_chen <ryan_chen@aspeedtech.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[wsa: added Fixes tag]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
The problem is that we dereference "privdata->pci_dev" when we print
the error messages in amd_mp2_pci_init():
dev_err(ndev_dev(privdata), "Failed to enable MP2 PCI device\n");
^^^^^^^^^^^^^^^^^
Fixes: 529766e0a0 ("i2c: Add drivers for the AMD PCIe MP2 I2C controller")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org
When slave status is I2C_SLAVE_RX_END, generate I2C_SLAVE_STOP
event to i2c_client.
Fixes: c245d94ed1 ("i2c: iproc: Add multi byte read-write support for slave mode")
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Rename DPM_FLAG_LEAVE_SUSPENDED to DPM_FLAG_MAY_SKIP_RESUME which
matches its purpose more closely.
No functional impact.
Suggested-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Wolfram Sang <wsa@the-dreams.de> # for I2C
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
DMA transfer could be completed, but CPU (which handles DMA interrupt)
may get too busy and can't handle the interrupt in a timely manner,
despite of DMA IRQ being raised. In this case the DMA state needs to
synchronized before terminating DMA transfer in order not to miss the
DMA transfer completion.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Boot CPU0 always handle I2C interrupt and under some rare circumstances
(like running KASAN + NFS root) it may stuck in uninterruptible state for
a significant time. In this case we will get timeout if I2C transfer is
running on a sibling CPU, despite of IRQ being raised. In order to handle
this rare condition, the IRQ status needs to be checked after completion
timeout.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
device_property_read_u32() returns errno or 0, so we should use the
integer variable 'ret' and not the u32 'val' to hold the retval.
Fixes: 0560ad5762 ("i2c: altera: Add Altera I2C Controller driver")
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
We already set DPM_FLAG_SMART_PREPARE, so we completely skip all
callbacks (other then prepare) where possible, quoting from
dw_i2c_plat_prepare():
/*
* If the ACPI companion device object is present for this device, it
* may be accessed during suspend and resume of other devices via I2C
* operation regions, so tell the PM core and middle layers to avoid
* skipping system suspend/resume callbacks for it in that case.
*/
return !has_acpi_companion(dev);
Also setting the DPM_FLAG_SMART_SUSPEND will cause acpi_subsys_suspend()
to leave the controller runtime-suspended even if dw_i2c_plat_prepare()
returned 0.
Leaving the controller runtime-suspended normally, when the I2C controller
is suspended during the suspend_late phase, is not an issue because
the pm_runtime_get_sync() done by i2c_dw_xfer() will (runtime-)resume it.
But for dw I2C controllers on Bay- and Cherry-Trail devices acpi_lpss.c
leaves the controller alive until the suspend_noirq phase, because it may
be used by the _PS3 ACPI methods of PCI devices and PCI devices are left
powered on until the suspend_noirq phase.
Between the suspend_late and resume_early phases runtime-pm is disabled.
So for any ACPI I2C OPRegion accesses done after the suspend_late phase,
the pm_runtime_get_sync() done by i2c_dw_xfer() is a no-op and the
controller is left runtime-suspended.
i2c_dw_xfer() has a check to catch this condition (rather then waiting
for the I2C transfer to timeout because the controller is suspended).
acpi_subsys_suspend() leaving the controller runtime-suspended in
combination with an ACPI I2C OPRegion access done after the suspend_late
phase triggers this check, leading to the following error being logged
on a Bay Trail based Lenovo Thinkpad 8 tablet:
[ 93.275882] i2c_designware 80860F41:00: Transfer while suspended
[ 93.275993] WARNING: CPU: 0 PID: 412 at drivers/i2c/busses/i2c-designware-master.c:429 i2c_dw_xfer+0x239/0x280
...
[ 93.276252] Workqueue: kacpi_notify acpi_os_execute_deferred
[ 93.276267] RIP: 0010:i2c_dw_xfer+0x239/0x280
...
[ 93.276340] Call Trace:
[ 93.276366] __i2c_transfer+0x121/0x520
[ 93.276379] i2c_transfer+0x4c/0x100
[ 93.276392] i2c_acpi_space_handler+0x219/0x510
[ 93.276408] ? up+0x40/0x60
[ 93.276419] ? i2c_acpi_notify+0x130/0x130
[ 93.276433] acpi_ev_address_space_dispatch+0x1e1/0x252
...
So since on BYT and CHT platforms we want ACPI I2c OPRegion accesses
to work until the suspend_noirq phase, we need the controller to be
runtime-resumed during the suspend phase if it is runtime-suspended
suspended at that time. This means that we must not set the
DPM_FLAG_SMART_SUSPEND on these platforms.
On BYT and CHT we already have a special ACCESS_NO_IRQ_SUSPEND flag
to make sure the controller stays functional until the suspend_noirq
phase. This commit makes the driver not set the DPM_FLAG_SMART_SUSPEND
flag when that flag is set.
Cc: stable@vger.kernel.org
Fixes: b30f2f6556 ("i2c: designware: Set IRQF_NO_SUSPEND flag for all BYT and CHT controllers")
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Pull i2c updates from Wolfram Sang:
"I2C has:
- using defines for bus speeds to avoid mistakes in hardcoded values;
lots of small driver updates because of that. Thanks, Andy!
- API change: i2c_setup_smbus_alert() was renamed to
i2c_new_smbus_alert_device() and returns ERRPTR now. All in-tree
users have been converted
- in the core, a rare race condition when deleting the cdev has been
fixed. Thanks, Kevin!
- lots of driver updates. Thanks, everyone!
I also want to mention: The amount of review and testing tags given
was quite high this time. Thank you to these people, too. I hope we
can keep it like this!"
* 'i2c/for-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (34 commits)
i2c: rcar: clean up after refactoring i2c_timings
macintosh: convert to i2c_new_scanned_device
i2c: drivers: Use generic definitions for bus frequencies
i2c: algo: Use generic definitions for bus frequencies
i2c: stm32f7: switch to I²C generic property parsing
i2c: rcar: Consolidate timings calls in rcar_i2c_clock_calculate()
i2c: core: Allow override timing properties with 0
i2c: core: Provide generic definitions for bus frequencies
i2c: mxs: Use dma_request_chan() instead dma_request_slave_channel()
i2c: imx: remove duplicate print after platform_get_irq()
i2c: designware: Fix spelling typos in the comments
i2c: designware: Discard i2c_dw_read_comp_param() function
i2c: designware: Detect the FIFO size in the common code
i2c: dev: Fix the race between the release of i2c_dev and cdev
i2c: qcom-geni: Drop of_platform.h include
i2c: qcom-geni: Grow a dev pointer to simplify code
i2c: qcom-geni: Let firmware specify irq trigger flags
i2c: stm32f7: do not backup read-only PECR register
i2c: smbus: remove outdated references to irq level triggers
i2c: convert SMBus alert setup function to return an ERRPTR
...
The pointer is not really needed anymore since we have the timings
struct available in the function itself now. Remove the pointer and
access the struct directly.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
The interrupt is not required so use platform_irq_get_optional() to
avoid error messages like
i2c-pca-platform 22080000.i2c: IRQ index 0 not found
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Nvidia card may come with a "phantom" UCSI device, and its driver gets
stuck in probe routine, prevents any system PM operations like suspend.
There's an unaccounted case that the target time can equal to jiffies in
gpu_i2c_check_status(), let's solve that by using readl_poll_timeout()
instead of jiffies comparison functions.
Fixes: c71bcdcb42 ("i2c: add i2c bus driver for NVIDIA GPU")
Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Ajay Gupta <ajayg@nvidia.com>
Tested-by: Ajay Gupta <ajayg@nvidia.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Switch to the new generic functions: i2c_parse_fw_timings().
While here, replace hard coded values with standard bus frequency definitions.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Move i2c_parse_fw_timings() to rcar_i2c_clock_calculate() to consolidate
timings calls in one place.
While here, replace hard coded values with standard bus frequency definitions.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Some drivers may allow to override properties with 0 value when defaults
are not in use, thus, replace memset() with corresponding per property
update.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
dma_request_slave_channel() is a wrapper on top of dma_request_chan()
eating up the error code.
By using dma_request_chan() directly the driver can support deferred
probing against DMA.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
The driver forgets to disable and unprepare clk when remove.
Add a call to clk_disable_unprepare to fix it.
Signed-off-by: Chuhong Yuan <hslester96@gmail.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org
We don't need dev_err() message because when something goes wrong,
platform_get_irq() has print an error message itself, so we should
remove duplicate dev_err().
Signed-off-by: Tang Bin <tangbin@cmss.chinamobile.com>
Acked-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Fix spelling typos in the comments with help of `codespell`.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
There is no code left in the kernel which would be using the function.
So just remove it.
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Signed-off-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
The problem with detecting the FIFO depth in the platform driver
is that in order to implement this we have to access the controller
IC_COMP_PARAM_1 register. Currently it's done before the
i2c_dw_set_reg_access() method execution, which is errors prone since
the method determines the registers endianness and access mode and we
can't use dw_readl/dw_writel accessors before this information is
retrieved. We also can't move the i2c_dw_set_reg_access() function
invocation to after the master/slave probe functions call (when endianness
and access mode are determined), since the FIFO depth information is used
by them for initializations. So in order to fix the problem we have no
choice but to move the FIFO size detection methods to the common code and
call it at the probe stage.
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Signed-off-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
This driver doesn't call any DT platform functions like of_platform_*().
Remove the include as it isn't used.
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Brendan Higgins <brendanhiggins@google.com>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Some lines are long here. Use a struct dev pointer to shorten lines and
simplify code. The clk_get() call can fail because of EPROBE_DEFER
problems too, so just remove the error print message because it isn't
useful. Finally, platform_get_irq() already prints an error so just
remove that error message.
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Brendan Higgins <brendanhiggins@google.com>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
We don't need to force IRQF_TRIGGER_HIGH here as the DT or ACPI tables
should take care of this for us. Just use 0 instead so that we use the
flags from the firmware. Also, remove specify dev_name() for the irq
name so that we can get better information in /proc/interrupts about
which device is generating interrupts.
Cc: Alok Chauhan <alokc@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Brendan Higgins <brendanhiggins@google.com>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
The PECR register provides received packet computed PEC value.
It makes no sense restoring its value after a reset, and anyway,
as read-only register it cannot be restored.
Fixes: ea6dd25dee ("i2c: stm32f7: add PM_SLEEP suspend/resume support")
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Reviewed-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
If a GPIO we are trying to use is not available and we are deferring
the probe, don't output an error message.
This seems to have been the intent of commit 05c7477885
("i2c: gpio: Add support for named gpios in DT") but the error was
still output due to not checking the updated 'retdesc'.
Fixes: 05c7477885 ("i2c: gpio: Add support for named gpios in DT")
Signed-off-by: Hamish Martin <hamish.martin@alliedtelesis.co.nz>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Only few drivers use this call, so drivers and I2C core are converted at
once with this patch. By simply using i2c_new_client_device() instead of
i2c_new_device(), we easily can return an ERRPTR for this function as
well. To make out of tree users aware that something changed, the
function is renamed to i2c_new_smbus_alert_device().
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Add a new stm32mp15 specific compatible to handle FastMode+
registers handling which is different on the stm32mp15 compared
to the stm32f7 or stm32h7.
Indeed, on the stm32mp15, the FastMode+ set and clear registers
are separated while on the other platforms (F7 or H7) the control
is done in a unique register.
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Reviewed-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Defer the initial enabling of the Fast Mode Plus bits after the
stm32f7_i2c_setup_timing call in probe function in order to avoid
enabling them if speed is downgraded.
Clear & restore the Fast Mode Plus bits in the suspend/resume
handlers of the driver.
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Reviewed-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
The HDMI blocks in the BCM2771 have an i2c controller to retrieve the
EDID. This block is split into two parts, the BSC and the AUTO_I2C,
lying in two separate register areas.
The AUTO_I2C block has a mailbox-like interface and will take away the
BSC control from the CPU if enabled. However, the BSC is the actually
the same controller than the one supported by the brcmstb driver, and
the AUTO_I2C doesn't really bring any immediate benefit.
Let's use the BSC then, but let's also tie the AUTO_I2C registers with a
separate compatible so that we can enable AUTO_I2C if needed in the
future.
The AUTO_I2C is enabled by default at boot though, so we first need to
release the BSC from the AUTO_I2C control.
Cc: Kamal Dasu <kdasu.kdev@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Wolfram Sang <wsa@the-dreams.de>
Cc: bcm-kernel-feedback-list@broadcom.com
Cc: linux-i2c@vger.kernel.org
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Use a new API devm_platform_ioremap_resource() to simplify code.
Signed-off-by: chenqiwu <chenqiwu@xiaomi.com>
Tested-by: Luca Ceresoli <luca@lucaceresoli.net>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Function i2c_dw_pci_remove() -> pci_free_irq_vectors() ->
pci_disable_msi() -> free_msi_irqs() will throw a BUG_ON() for MSI
enabled device since the driver has not released the requested IRQ before
calling the pci_free_irq_vectors().
Here driver requests an IRQ using devm_request_irq() but automatic
release happens only after remove callback. Fix this by explicitly
freeing the IRQ before calling pci_free_irq_vectors().
Fixes: 21aa3983d6 ("i2c: designware-pci: Switch over to MSI interrupts")
Cc: stable@vger.kernel.org # v5.4+
Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Martin noticed that nct6775 driver does not load properly on his system
in v5.4+ kernels. The issue was bisected to commit b84398d6d7 ("i2c:
i801: Use iTCO version 6 in Cannon Lake PCH and beyond") but it is
likely not the culprit because the faulty code has been in the driver
already since commit 9424693035 ("i2c: i801: Create iTCO device on
newer Intel PCHs"). So more likely some commit that added PCI IDs of
recent chipsets made the driver to create the iTCO_wdt device on Martins
system.
The issue was debugged to be PCI configuration access to the PMC device
that is not present. This returns all 1's when read and this caused the
iTCO_wdt driver to accidentally request resourses used by nct6775.
It turns out that the SMI resource is only required for some ancient
systems, not the ones supported by this driver. For this reason do not
populate the SMI resource at all and drop all the related code. The
driver now always populates the main I/O resource and only in case of SPT
(Intel Sunrisepoint) compatible devices it adds another resource for the
NO_REBOOT bit. These two resources are of different types so
platform_get_resource() used by the iTCO_wdt driver continues to find
the both resources at index 0.
Link: https://lore.kernel.org/linux-hwmon/CAM1AHpQ4196tyD=HhBu-2donSsuogabkfP03v1YF26Q7_BgvgA@mail.gmail.com/
Fixes: 9424693035 ("i2c: i801: Create iTCO device on newer Intel PCHs")
[wsa: complete fix needs all of http://patchwork.ozlabs.org/project/linux-i2c/list/?series=160959&state=*]
Reported-by: Martin Volf <martin.volf.42@gmail.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
The comment had some flaws which are now fixed:
- the prefix is 'MAC' not 'AAPL'
- no kernel coding style and too short length
- 'we do' instead of 'we to'
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Allow the i2c-stm32f7 controller to become a wakeup-source
of the system. In such case, when a slave is registered to the
I2C controller, receiving a I2C message targeting that registered
slave address wakes up the suspended system.
In order to be able to wake-up, the I2C controller DT node
must have the property wakeup-source defined and a slave
must be registered.
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Reviewed-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Rework the read and write code paths in the driver to support operation
in atomic contexts. To achieve this, the driver must not rely on IRQs
and not call schedule(), e.g. via a sleep routine, in these cases.
With this patch the driver supports normal operation, DMA transfers and
now the polling mode or also called sleep-free or IRQ-less operation. It
makes the code not simpler or easier to read, but atomic I2C transfers
are needed on some hardware configurations, e.g. to trigger reboots on
an external PMIC chip.
Signed-off-by: Stefan Lengfeld <contact@stefanchrist.eu>
[m.felsch@pengutronix.de: integrate https://patchwork.ozlabs.org/patch/1085943/ review feedback]
[m.felsch@pengutronix.de: adapt commit message]
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Acked-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Tested-by: Stefan Lengfeld <contact@stefanchrist.eu>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Implement i2c bus recovery when slaves devices might hold SDA low.
In this case re-assign SCL/SDA to gpios and issue 9 dummy clock pulses
until the slave release SDA.
Signed-off-by: Kamel Bouhara <kamel.bouhara@bootlin.com>
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
