Commit Graph

194 Commits

Author SHA1 Message Date
Magnus Damm
89b43b0812 ARM: dts: Include R-Car Gen2 product name in DTSI files
Improve the user friendliness of the DTS code base by including the
R-Car product name in each R-Car Gen2 DTSI file.

The product names are taken from:
Documentation/devicetree/bindings/arm/shmobile.txt

Signed-off-by: Magnus Damm <damm@opensource.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-28 10:32:31 +02:00
Geert Uytterhoeven
441f61e3aa ARM: dts: rcar: Correct SATA device sizes to 2 MiB
Update the SATA device nodes on R-Car H1, H2, and M2-W to use a 2 MiB
I/O space, as specified in Rev.1.0 of the R-Car H1 and R-Car Gen2
hardware user manuals.

See also commit e9f0089b2d ("arm64: dts: r8a7795: Correct SATA
device size to 2MiB").

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-08-27 15:02:12 +02:00
Wolfram Sang
cdbfaf640a ARM: dts: convert to SPDX identifier for Renesas boards
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-23 13:33:03 +02:00
Viresh Kumar
8199e49ff1 ARM: dts: r8a77(43|9[013]): Add missing OPP properties for CPUs
The OPP properties, like "operating-points", should either be present
for all the CPUs of a cluster or none. If these are present only for a
subset of CPUs of a cluster then things will start falling apart as soon
as the CPUs are brought online in a different order. For example, this
will happen because the operating system looks for such properties in
the CPU node it is trying to bring up, so that it can create an OPP
table.

Add such missing properties.

Fix other missing properties (like, clock latency, voltage tolerance,
etc) as well to make it all work.

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-23 13:33:02 +02:00
Linus Torvalds
8efcf34a26 ARM: SoC: late updates
This is a branch with a few merge requests that either came in late, or
 took a while longer for us to review and merge than usual and thus cut
 it a bit close to the merge window. We stage them in a separate branch
 and if things look good, we still send them up -- and that's the case
 here.
 
 This is mostly DT additions for Renesas platforms, adding IP block
 descriptions for existing and new SoCs.
 
 There are also some driver updates for Qualcomm platforms for SMEM/QMI
 and GENI, which is their generalized serial protocol interface.
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Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC late updates from Olof Johansson:
 "This is a branch with a few merge requests that either came in late,
  or took a while longer for us to review and merge than usual and thus
  cut it a bit close to the merge window. We stage them in a separate
  branch and if things look good, we still send them up -- and that's
  the case here.

  This is mostly DT additions for Renesas platforms, adding IP block
  descriptions for existing and new SoCs.

  There are also some driver updates for Qualcomm platforms for SMEM/QMI
  and GENI, which is their generalized serial protocol interface"

* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (186 commits)
  soc: qcom: smem: introduce qcom_smem_virt_to_phys()
  soc: qcom: qmi: fix a buffer sizing bug
  MAINTAINERS: Update pattern for qcom_scm
  soc: Unconditionally include qcom Makefile
  soc: qcom: smem: check sooner in qcom_smem_set_global_partition()
  soc: qcom: smem: fix qcom_smem_set_global_partition()
  soc: qcom: smem: fix off-by-one error in qcom_smem_alloc_private()
  soc: qcom: smem: byte swap values properly
  soc: qcom: smem: return proper type for cached entry functions
  soc: qcom: smem: fix first cache entry calculation
  soc: qcom: cmd-db: Make endian-agnostic
  drivers: qcom: add command DB driver
  arm64: dts: renesas: salvator-common: Add ADV7482 support
  ARM: dts: r8a7740: Add CEU1
  ARM: dts: r8a7740: Add CEU0
  arm64: dts: renesas: salvator-common: enable VIN
  arm64: dts: renesas: r8a77970: add VIN and CSI-2 nodes
  arm64: dts: renesas: r8a77965: add VIN and CSI-2 nodes
  arm64: dts: renesas: r8a7796: add VIN and CSI-2 nodes
  arm64: dts: renesas: r8a7795-es1: add CSI-2 node
  ...
2018-06-11 18:19:45 -07:00
Geert Uytterhoeven
8607428c96 ARM: dts: r8a7791: Add PMU device node
Enable support for the ARM Performance Monitor Units in the Cortex-A15
CPU cores on R-Car M2-W by adding a device node for the PMU.

New Linux output:

    hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-14 16:40:42 +02:00
Fabrizio Castro
6912394d66 ARM: dts: r8a7791: Add watchdog support to SoC dtsi
This commit adds watchdog support to the r8a7791 dtsi.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-04-25 08:51:10 +02:00
Fabrizio Castro
a332210049 ARM: dts: r8a7791: Adjust SMP routine size
This patch adjusts the definition of the SMP routine size according
to the latest changes made by commit:
"ARM: shmobile: Add watchdog support"

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-04-25 08:51:05 +02:00
Laurent Pinchart
e7f36fb8ff ARM: dts: renesas: r8a7791: Add FDP1 instances
The r8a7791 has two FDP1 instances.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-04-25 08:50:05 +02:00
Laurent Pinchart
e5c3f4707f ARM: dts: r8a7791: Convert to new LVDS DT bindings
The internal LVDS encoder now has DT bindings separate from the DU. Port
the device tree over to the new model.

Fixes: c6a27fa41f ("drm: rcar-du: Convert LVDS encoder code to bridge driver")
Fixes: bb21803ea4 ("ARM: dts: r8a7791: add soc node")
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-04-23 12:31:26 +02:00
Simon Horman
c57c1b7ce8 ARM: dts: r8a7791: consistently use single space before =
Consistently use a single space before a =.

This patch fixes instances where a tab is used instead.

This patch should not introduce any functional change.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-02-12 13:50:58 +01:00
Simon Horman
21b05c52ab ARM: dts: r8a7791: sort subnodes of root node
Sort subnodes of root node to aid maintenance.

This patch should not introduce any functional change.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-02-12 13:50:56 +01:00
Simon Horman
bb21803ea4 ARM: dts: r8a7791: add soc node
Add soc node to represent the bus and move all nodes with a base address
into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
Gen2 SoCs to this scheme.

The ordering is derived from simply moving each node with an address up to
before any nodes without a base address that occur before the soc node.  To
improve maintainability follow-up patches will sort subnodes of both the
new soc node and the root node.

This patch should not introduce any functional change.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-02-12 13:50:56 +01:00
Simon Horman
5025c78b3b ARM: dts: r8a7791: consistently use single space after =
Consistently use a single space after a =.

This patch removes instances where a tab or multiple spaces are used
instead.  It also avoids running over 80 columns in width in one of the
lines where whitespace is updated.

This patch should not introduce any functional change.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-02-12 13:50:56 +01:00
Simon Horman
3f59990674 ARM: dts: r8a7791: Reduce size of thermal registers
Reduce size of thermal registers in DT for r8a7791 (R-Car M3-W) SoC.

According to the "User's Manual: Hardware" v2.00 the registers at base
0xe61f0000 extend to an offset of 0x10, rather than 0x14 which is the case
on the r8a73a4 (R-Mobile APE6).

This should not have any runtime affect as mapping granularity is PAGE_SIZE.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-12 13:50:55 +01:00
Chris Paterson
e4fdf59bcc ARM: dts: r8a7791: Correct critical CPU temperature
The R-Car M2W hardware manual states that Tc = –40°C to +105°C. The
thermal sensor has an accuracy of ±5°C and there can be a temperature
difference of 1 or 2 degrees between Tjmax and the thermal sensor due
to the location of the latter.

This means that 95°C is a safer value to use.

Fixes: cac68a56e3 ("ARM: dts: r8a7791: enable to use thermal-zone")
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-12-18 12:14:18 +01:00
Magnus Damm
d3fb905378 ARM: dts: r8a7791: Remove CMT renesas,channels-mask
Update the DTS to remove the now deprecated "renesas,channels-mask"
property.

The channel information is now kept in the device driver and can easily
be determined based on the compat string.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-29 11:45:30 +01:00
Magnus Damm
bf50e0ab4f ARM: dts: r8a7791: Update CMT compat strings
Use recently updated R-Car Gen2 CMT0 and CMT1 compat strings.

With this change in place we can keep device-specific configuration in
the driver and the driver can be able to support CMT1 specific features.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-29 11:41:12 +01:00
Simon Horman
8423f640cf ARM: dts: r8a7791: Use R-Car SDHI Gen2 fallback compat string
Use newly added R-Car SDHI Gen2 fallback compat string
in the DT of the r8a7791 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27 11:40:04 +01:00
Simon Horman
fc2d62f04d ARM: dts: r8a7791: Use R-Car Gen2 Ether fallback compat string
Use newly added R-Car Gen2 Ether fallback compat string
in the DT of the r8a7791 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-11-27 11:39:41 +01:00
Geert Uytterhoeven
60b672fe7e ARM: dts: r8a7791: Add missing clock for secondary CA15 CPU core
Currently only the primary CPU in the CA15 cluster has a clocks
property, while the secondary CPU core is driven by the same clock.
Add the missing clocks property to fix this.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16 11:41:41 +02:00
Simon Horman
7140383d59 ARM: dts: r8a7791: Use R-Car GPIO Gen2 fallback compat string
Use newly added R-Car GPIO Gen2 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in the DT of the r8a7791 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-16 09:21:34 +02:00
Geert Uytterhoeven
18e5500c15 ARM: dts: r8a7791: Use generic node name for VSP1 nodes
Use the preferred generic node name instead of the specific name.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-06 11:22:49 +02:00
Geert Uytterhoeven
be5ae56e5f ARM: dts: r8a7791: Add reset control properties
Add properties to describe the reset topology for on-SoC devices:
  - Add the "#reset-cells" property to the CPG/MSSR device node,
  - Add resets and reset-names properties to the various device nodes.

This allows to reset SoC devices using the Reset Controller API.

Note that resets usually match the corresponding module clocks.
Exceptions are:
  - The audio module has resets for the Serial Sound Interfaces only,
  - The display module has only a single reset for all DU channels, but
    adding reset properties for the display is postponed.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-09-19 11:20:12 +02:00
Geert Uytterhoeven
580aa7cb47 ARM: dts: r8a7791: Stop grouping clocks under a "clocks" subnode
The current practice is to not group clocks under a "clocks" subnode,
but just put them together with the other on-SoC devices.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-09-19 11:19:44 +02:00
Geert Uytterhoeven
362b334b17 ARM: dts: r8a7791: Convert to new CPG/MSSR bindings
Convert the R-Car M2-W SoC from the old "Renesas R-Car Gen2 Clock Pulse
Generator (CPG)", "Renesas CPG DIV6 Clock", and "Renesas CPG Module Stop
(MSTP) Clocks" DT bindings to the new unified "Renesas Clock Pulse
Generator / Module Standby and Software Reset" DT bindings.

This simplifies the DTS files, and allows to add support for reset
control later.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-09-19 11:19:42 +02:00
Simon Horman
a4bc74d570 ARM: dts: r8a7791: Use R-Car SATA Gen2 fallback compat string
Use newly added R-Car SATA Gen2 fallback compat string
in the DT of the r8a7791 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before the fallback compat string is considered.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-08-17 11:02:51 +02:00
Simon Horman
b5595f2ffe ARM: dts: r8a7791: Use R-Car Gen 2 fallback binding for vin nodes
Use R-Car Gen 2 fallback binding for vind nodes in DT for r8a7791 SoC.

This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7791 and the
fallback binding for R-Car Gen 2

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-07-27 17:39:07 +02:00
Geert Uytterhoeven
d7ff938254 ARM: dts: r8a7791: Reserve SRAM for the SMP jump stub
Reserve SRAM for the jump stub for CPU core bringup.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27 16:28:38 +02:00
Geert Uytterhoeven
5ccce438b9 ARM: dts: r8a7791: Add Inter Connect RAM
R-Car M2-W has 2 regions of Inter Connect RAM (72 + 4 KiB).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27 16:28:35 +02:00
Rob Herring
f7d569c1e6 ARM: dts: r8a779x: Fix PCI bus dtc warnings
The bogus 'device_type = "pci"' confuses dtc, causing lots of totally
unrelated warnings.  After fixing that, real warnings like

    arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_reg): Node /pci@ee090000/usb@0,1 PCI unit address format error, expected "1,0"

are left.  Correct the unit-addresses and reg properties of the subnodes
to fix these.

Signed-off-by: Rob Herring <robh@kernel.org>
[geert: Improve description]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-06-12 11:18:30 +02:00
Marek Vasut
e15ebbfa1f ARM: dts: r8a7791: Add GyroADC clock and device node
Add node for the GyroADC block and it's associated clock.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-05-15 09:06:41 +02:00
Simon Horman
12cc7145d4 ARM: dts: r8a7791: update PFC node name to pin-controller
The device trees for Renesas SoCs use either pfc or pin-controller as the
node name for the PFC device. This patch is intended to take a step towards
unifying the node name used as pin-controller which appears to be the more
generic of the two and thus more in keeping with the DT specs.

My analysis is that this is a user-visible change to the extent that kernel
logs, and sysfs entries change from e6060000.pfc and pfc@e6060000 to
e6060000.pin-controller and pin-controller@e6060000.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-05-15 09:06:39 +02:00
Geert Uytterhoeven
eb77d7260c ARM: dts: r8a7791: Drop _clk suffix from external CAN clock node name
The current practice is to not add _clk suffixes to clock node names in
DT, as these names are used as the actual clock names.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-04-05 14:16:34 -04:00
Geert Uytterhoeven
16fe68dcab ARM: dts: r8a7791: Correct parent of SSI[0-9] clocks
The SSI-ALL gate clock is located in between the P clock and the
individual SSI[0-9] clocks, hence the former should be listed as their
parent.

Fixes: ee9141522d ("ARM: shmobile: r8a7791: add MSTP10 support on DTSI")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-04-03 06:32:43 -04:00
Kuninori Morimoto
d49db72b56 ARM: dts: r8a7791: Tidyup Audio-DMAC channel for DVC
Current	Audio-DMAC is assigned "rx" as Audio-DMAC0, "tx" as Audio-DMAC1.
Thus, DVC "tx" should be assigned as Audio-DMAC1, instead of Audio-DMAC0.

Because of this, current platform board (using SRC/DVC/SSI)
Playback/Capture both will use same Audio-DMAC0
(but it depends on audio data path).

First note is that this "rx" and "tx" are from each IP point,
it doesn't mean Playback/Capture.
Second note is that Audio DMAC assigned on DT is only for
Audio-DMAC, Audio-DMAC-peri-peri has no entry.

=> Audio-DMAC
-> Audio-DMAC-peri-peri
-- HW connection

Playback case

	[Mem] => [SRC]--[DVC] -> [SSI]--[Codec]
	      rx ~~~~~~~~~~~~
Capture

	[Mem] <= [DVC]--[SRC] <- [SSI]--[Codec]
	      tx ~~~~~~~~~~~~

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-10 10:23:28 +01:00
Geert Uytterhoeven
c2f2e266ac ARM: dts: r8a7791: Add INTC-SYS clock to device tree
Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.

Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-10 10:20:13 +01:00
Geert Uytterhoeven
5d6a2165ab ARM: dts: r8a7791: Remove unit-address and reg from integrated cache
The Cortex-A15 cache controller is an integrated controller, and thus
the device node representing it should not have a unit-addresses or reg
property.

Fixes: 6f9314ce25 ("ARM: dts: r8a7791: Fix W=1 dtc warnings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-07 07:44:49 +01:00
Marc Zyngier
387720c938 ARM: DTS: Fix register map for virt-capable GIC
Since everybody copied my own mistake from the DT binding example,
let's address all the offenders in one swift go.

Most of them got the CPU interface size wrong (4kB, while it should
be 8kB), except for both keystone platforms which got the control
interface wrong (4kB instead of 8kB).

In a few cases where I knew for sure what implementation was used,
I've added the "arm,gic-400" compatible string. I'm 99% sure that
this is what everyone is using, but short of having the TRM for
all the other SoCs, I've left them alone.

Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-02-07 15:06:46 +01:00
Simon Horman
fdda1f9e23 ARM: dts: r8a7791: Use R-Car Gen 2 fallback binding for msiof nodes
Use recently added R-Car Gen 2 fallback binding for msiof nodes in
DT for r8a7791 SoC.

This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7791 and the
fallback binding for R-Car Gen 2.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-01-03 10:47:00 +01:00
Simon Horman
8d76bf8a6a ARM: dts: r8a7791: Use R-Car Gen 2 fallback binding for iic nodes
Use recently added R-Car Gen 2 fallback binding for iic nodes in
DT for r8a7791 SoC.

This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7791 and the
fallback binding for R-Car Gen 2.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-01-03 10:46:53 +01:00
Simon Horman
c7407ca7ef ARM: dts: r8a7791: Use R-Car Gen 2 fallback binding for i2c nodes
Use recently added R-Car Gen 2 fallback binding for i2c nodes in
DT for r8a7791 SoC.

This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7791 and the
fallback binding for R-Car Gen 2.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-01-03 10:46:40 +01:00
Simon Horman
c39a6e76db ARM: dts: r8a7791: Use renesas,rcar-gen2-usb-phy fallback binding
A fallback binding for the Renesas R-Car Gen2 PHY driver was
added by commit 7777cb8ba0 ("phy: rcar-gen2: add fallback binding").
This patch makes use of this binding in the DT for the r8a7791 SoC.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-01-03 10:46:27 +01:00
Linus Torvalds
786a72d791 ARM: DT updates for v4.10
Lots of changes as usual, so I'm trying to be brief here. Most of the
 new hardware support has the respective driver changes merged through
 other trees or has had it available for a while, so this is where things
 come together.
 
 We get a DT descriptions for a couple of new SoCs, all of them variants
 of other chips we already support, and usually coming with a new
 evaluation board:
 
 - Oxford semiconductor (now Broadcom) OX820 SoC for NAS devices
 - Qualcomm MDM9615 LTE baseband
 - NXP imx6ull, the latest and smallest i.MX6 application processor variant
 - Renesas RZ/G (r8a7743 and r8a7745) application processors
 - Rockchip PX3, a variant of the rk3188 chip used in Android tablets
 - Rockchip rk1108 single-core application processor
 - ST stm32f746 Cortex-M7 based microcontroller
 - TI DRA71x automotive processors
 
 These are commercially available consumer platforms we now support:
 - Motorola Droid 4 (xt894) mobile phone
 - Rikomagic MK808 Android TV stick based on Rockchips rx3066
 - Cloud Engines PogoPlug v3 based on OX820
 - Various Broadcom based wireless devices:
   - Netgear R8500 router
   - Tenda AC9 router
   - TP-LINK Archer C9 V1
   - Luxul XAP-1510 Access point
 - Turris Omnia open hardware router based on Armada 385
 
 And a couple of new boards targeted at developers, makers
 or industrial integration:
 - Macnica Sodia development platform for Altera socfpga (Cyclone V)
 - MicroZed board based on Xilinx Zynq FPGA platforms
 - TOPEET itop/elite based on exynos4412
 - WP8548 MangOH Open Hardware platform for IOT, based on
   Qualcomm MDM9615
 - NextThing CHIP Pro gadget
 - NanoPi M1 development board
 - AM571x-IDK industrial board based on TI AM5718
 - i.MX6SX UDOO Neo
 - Boundary Devices Nitrogen6_SOM2 (i.MX6)
 - Engicam i.CoreM6
 - Grinn i.MX6UL liteSOM/liteBoard
 - Toradex Colibri iMX6 module
 
 Other changes:
 - added peripherals on renesas, davinci, stm32f429, uniphier, sti,
   mediatek, integrator, at91, imx, vybrid, ls1021a, omap, qualcomm,
   mvebu, allwinner, broadcom, exynos, zynq
 
 - Continued fixes for W=1 dtc warnings
 
 - The old STiH415/416 SoC support gets removed, these never made it into
   products and have served their purpose in the kernel as a template
   for teh newer chips from ST
 
 - The exynos4415 dtsi file is removed as nothing uses it.
 
 - Intel PXA25x can now be booted using devicetree
 
 Conflicts:
 arch/arm/boot/dts/r8a*.dtsi: a node was added
 the clk tree, keep both sides and watch out for git
 dropping the required '};' at the end of each side.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Arnd Bergmann:
 "Lots of changes as usual, so I'm trying to be brief here. Most of the
  new hardware support has the respective driver changes merged through
  other trees or has had it available for a while, so this is where
  things come together.

  We get a DT descriptions for a couple of new SoCs, all of them
  variants of other chips we already support, and usually coming with a
  new evaluation board:

   - Oxford semiconductor (now Broadcom) OX820 SoC for NAS devices
   - Qualcomm MDM9615 LTE baseband
   - NXP imx6ull, the latest and smallest i.MX6 application processor variant
   - Renesas RZ/G (r8a7743 and r8a7745) application processors
   - Rockchip PX3, a variant of the rk3188 chip used in Android tablets
   - Rockchip rk1108 single-core application processor
   - ST stm32f746 Cortex-M7 based microcontroller
   - TI DRA71x automotive processors

  These are commercially available consumer platforms we now support:

   - Motorola Droid 4 (xt894) mobile phone
   - Rikomagic MK808 Android TV stick based on Rockchips rx3066
   - Cloud Engines PogoPlug v3 based on OX820
   - Various Broadcom based wireless devices:
      - Netgear R8500 router
      - Tenda AC9 router
      - TP-LINK Archer C9 V1
      - Luxul XAP-1510 Access point
   - Turris Omnia open hardware router based on Armada 385

  And a couple of new boards targeted at developers, makers or
  industrial integration:

   - Macnica Sodia development platform for Altera socfpga (Cyclone V)
   - MicroZed board based on Xilinx Zynq FPGA platforms
   - TOPEET itop/elite based on exynos4412
   - WP8548 MangOH Open Hardware platform for IOT, based on Qualcomm MDM9615
   - NextThing CHIP Pro gadget
   - NanoPi M1 development board
   - AM571x-IDK industrial board based on TI AM5718
   - i.MX6SX UDOO Neo
   - Boundary Devices Nitrogen6_SOM2 (i.MX6)
   - Engicam i.CoreM6
   - Grinn i.MX6UL liteSOM/liteBoard
   - Toradex Colibri iMX6 module

  Other changes:

   - added peripherals on renesas, davinci, stm32f429, uniphier, sti,
     mediatek, integrator, at91, imx, vybrid, ls1021a, omap, qualcomm,
     mvebu, allwinner, broadcom, exynos, zynq

   - Continued fixes for W=1 dtc warnings

   - The old STiH415/416 SoC support gets removed, these never made it
     into products and have served their purpose in the kernel as a
     template for teh newer chips from ST

   - The exynos4415 dtsi file is removed as nothing uses it.

   - Intel PXA25x can now be booted using devicetree"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (422 commits)
  arm: dts: zynq: Add MicroZed board support
  ARM: dts: da850: enable high speed for mmc
  ARM: dts: da850: Add node for pullup/pulldown pinconf
  ARM: dts: da850: enable memctrl and mstpri nodes per board
  ARM: dts: da850-lcdk: Add ethernet0 alias to DT
  ARM: dts: artpec: add pcie support
  ARM: dts: add support for Turris Omnia
  devicetree: Add vendor prefix for CZ.NIC
  ARM: dts: berlin2q-marvell-dmp: fix typo in chosen node
  ARM: dts: berlin2q-marvell-dmp: fix regulators' name
  ARM: dts: Add xo to sdhc clock node on qcom platforms
  ARM: dts: r8a7794: Add device node for PRR
  ARM: dts: r8a7793: Add device node for PRR
  ARM: dts: r8a7792: Add device node for PRR
  ARM: dts: r8a7791: Add device node for PRR
  ARM: dts: r8a7790: Add device node for PRR
  ARM: dts: r8a7779: Add device node for PRR
  ARM: dts: r8a73a4: Add device node for PRR
  ARM: dts: sk-rzg1e: add Ether support
  ARM: dts: sk-rzg1e: initial device tree
  ...
2016-12-15 15:50:24 -08:00
Geert Uytterhoeven
366cd11202 ARM: dts: r8a7791: Add device node for PRR
Add a device node for the Product Register, which provides SoC product
and revision information.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-23 20:52:34 +01:00
Geert Uytterhoeven
5f25f9f52e ARM: dts: r8a7791: Correct SCIFB reg properties to cover all registers
Several SCIFB registers reside outside the reported register ranges.
Fortunately this works (on Linux), due to the PAGE_SIZE granularity of
ioremap().

Extend the sizes from 64 to 0x100 bytes to fix this, like is done on
SH/R-Mobile SoCs.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-04 10:36:03 +01:00
Geert Uytterhoeven
1fd27b80b6 ARM: dts: r8a7791: Add device node for RST module
Add a device node for the RST module, which provides a.o. reset control
and mode pin monitoring.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
2016-11-02 20:43:25 +01:00
Simon Horman
1efd670a73 ARM: dts: r8a7791: set maximum frequency for SDHI clocks
Define the upper limit otherwise the driver cannot utilize max speeds.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-10-17 08:20:02 +02:00
Geert Uytterhoeven
17d9af9e06 ARM: dts: r8a7791: Remove obsolete vsp1 properties
As of commit 5aa2eb3c86 ("[media] v4l: vsp1: Configure device
based on IP version"), the DT properties to identify the exact VSP
device instance features are no longer used. Hence remove them.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-08-17 09:22:26 +02:00
Magnus Damm
477cbcbd8f ARM: dts: r8a7791: Add APMU node
Add a DT node for the Advanced Power Management Units (APMU), and use
the enable-method to point out that the APMU should be used for SMP
support.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-06-29 14:28:42 +02:00