Commit Graph

8 Commits

Author SHA1 Message Date
Thomas Gleixner
f50a7f3d92 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 191
Based on 1 normalized pattern(s):

  licensed under gplv2

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 99 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Steve Winslow <swinslow@gmail.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190528170027.163048684@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:29:21 -07:00
Alexandre Belloni
6cf8f828ef ARM: dts: at91: at91sam9x5: switch to new clock bindings
Switch at91sam9x5 boards to the new PMC clock bindings.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2018-11-21 11:58:49 +01:00
Nicolas Ferre
e8fd0adf10 ARM: dts: at91: at91sam9g25: fix mux-mask pinctrl property
There are only 19 PIOB pins having primary names PB0-PB18. Not all of them
have a 'C' function. So the pinctrl property mask ends up being the same as the
other SoC of the at91sam9x5 series.

Reported-by: Marek Sieranski <marek.sieranski@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: <stable@vger.kernel.org> # v3.8+
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2018-03-21 17:22:57 +01:00
Josh Wu
7f9acb1093 ARM: at91: at91sam9x5/dts: add ISI dt support, include isi node, pinctrls
Add a new file: at91sam9x5_isi.dtsi, which includes ISI node and
pinctrls.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2015-03-04 18:36:07 +01:00
Boris BREZILLON
d195608acc ARM: at91/dt: split sam9x5 peripheral definitions
This patch splits the sam9x5 peripheral definitions into:
- a common base for all sam9x5 SoCs (at91sam9x5.dtsi)
- several optional peripheral definitions which will be included by specific
  sam9x5 SoCs (at91sam9x5_'periph name'.dtsi)

This provides a better representation of the real hardware (drop unneeded
dt nodes) and avoids future peripheral id conflict (lcdc and isi both use
peripheral id 25).

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-10-16 15:47:07 +02:00
Jean-Christophe PLAGNIOL-VILLARD
6db64d2978 ARM: at91: dt: use #include for all device trees
to prepare the switch to the macro.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-05-17 11:27:49 +02:00
Nicolas Ferre
2a5a461f17 ARM: at91/trivial: typos in compatible property
- unneeded whitespace
- missing double quote

Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: stable <stable@vger.kernel.org> # 3.8+
2013-03-26 12:27:34 +01:00
Jean-Christophe PLAGNIOL-VILLARD
ec6754a7b9 arm: at91: dt: at91sam9 add serial pinctrl support
Set the dbgu pinctrl config by default as we have only one possible config
For other uart set the rxd/txd by default.

For at91sam9x5ek create soc based dts as we need to include specific soc dtsi.

Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-10-13 09:21:44 +08:00