Commit Graph

73 Commits

Author SHA1 Message Date
Tao Ren
a1256487fd ARM: dts: aspeed-g5: add vhub port and endpoint properties
Add "aspeed,vhub-downstream-ports" and "aspeed,vhub-generic-endpoints"
properties to describe supported number of vhub ports and endpoints.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-03-15 12:11:53 +02:00
Andrew Jeffery
cf4aae1a05 ARM: dts: aspeed-g5: Sort LPC child nodes by unit address
Lets try to maintain some sort of sanity.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-12-17 13:38:22 +11:00
Andrew Jeffery
e3f0cf4fb8 ARM: dts: aspeed: Add reg hints to syscon children
Fixes the following warnings:

    arch/arm/boot/dts/aspeed-g5.dtsi:209.28-226.6: Warning (avoid_unnecessary_addr_size): /ahb/apb/syscon@1e6e2000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
    arch/arm/boot/dts/aspeed-g4.dtsi:156.28-172.6: Warning (avoid_unnecessary_addr_size): /ahb/apb/syscon@1e6e2000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-12-17 13:38:20 +11:00
Andrew Jeffery
2de782b769 ARM: dts: aspeed: Cleanup lpc-ctrl and snoop regs
Fix the following warning:

    arch/arm/boot/dts/aspeed-g5.dtsi:409.27-414.8: Warning (unique_unit_address): /ahb/apb/lpc@1e789000/lpc-host@80/lpc-ctrl@0: duplicate unit-address (also used in node /ahb/apb/lpc@1e789000/lpc-host@80/lpc-snoop@0)

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-12-17 13:38:19 +11:00
Andrew Jeffery
1f3051142b ARM: dts: aspeed-g5: Use recommended generic node name for SDMC
The EDAC is a sub-function of the SDRAM Memory Controller. Rename the
node to the appropriate generic node name.

Cc: Stefan M Schaeckeler <sschaeck@cisco.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Stefan Schaeckeler <sschaeck@cisco.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-12-17 13:38:05 +11:00
Andrew Jeffery
b41c03c1cf ARM: dts: aspeed-g5: Move EDAC node to APB
Previously the register interface was not attached to any internal bus,
which is not correct - it lives on the APB.

Cc: Stefan M Schaeckeler <sschaeck@cisco.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Stefan Schaeckeler <sschaeck@cisco.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-12-17 13:38:03 +11:00
Linus Torvalds
eb275167d1 ARM: Device-tree updates
As always, the bulk of updates. Some of the news this cycle:
 
 New SoC descriptions:
  - Broadcom BCM2711
  - Amlogic Meson A1 and G12
  - Freescale S32V234
  - Marvell Armada AP807/AP807-quad and CP115
  - Realtek RTD1293 and RTD1296
  - Rockchip RK3308
 
 New boards and platforms:
  - Allwinner: NanoPi Duo2
  - Amlogic: Ugoos am6
  - Atmel at91: Overkiz Kizbox2/4
  - Broadcom: RPi4, Luxul XWC-2000
  - Marvell: New Espressobin flavor
  - NXP: i.MX8MN LPDDR4 EVK, i.MX8QXP Colibri, S32V234 EVB, Netronix
    E60K02 and Kobo Clara HD, Kontron N6311 and N6411, OPOS6UL and
    OPOS6ULDev
  - Renesas: Salvator-XS
  - Rockchip: Beelink A1 (rk3308), rk3308 eval boards, rk3399-roc-pc
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM Device-tree updates from Olof Johansson:
 "As always, the bulk of updates.  Some of the news this cycle:

  New SoC descriptions:
   - Broadcom BCM2711
   - Amlogic Meson A1 and G12
   - Freescale S32V234
   - Marvell Armada AP807/AP807-quad and CP115
   - Realtek RTD1293 and RTD1296
   - Rockchip RK3308

  New boards and platforms:
   - Allwinner: NanoPi Duo2
   - Amlogic: Ugoos am6
   - Atmel at91: Overkiz Kizbox2/4
   - Broadcom: RPi4, Luxul XWC-2000
   - Marvell: New Espressobin flavor
   - NXP: i.MX8MN LPDDR4 EVK, i.MX8QXP Colibri, S32V234 EVB, Netronix
     E60K02 and Kobo Clara HD, Kontron N6311 and N6411, OPOS6UL and
     OPOS6ULDev
   - Renesas: Salvator-XS
   - Rockchip: Beelink A1 (rk3308), rk3308 eval boards, rk3399-roc-pc"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (653 commits)
  ARM: dts: logicpd-torpedo: Disable USB Host
  arm: dts: mt6323: add keys, power-controller, rtc and codec
  arm64: dts: mt8183: add systimer0 device node
  dt-bindings: mediatek: update bindings for MT8183 systimer
  arm64: dts: rockchip: fix sdmmc detection on boot on rk3328-roc-cc
  arm64: dts: rockchip: Split rk3399-roc-pc for with and without mezzanine board.
  arm64: dts: rockchip: Add Beelink A1
  dt-bindings: ARM: rockchip: Add Beelink A1
  arm64: dts: rockchip: Add RK3328 audio pipelines
  arm64: dts: ti: k3-j721e-common-proc-board: Add USB ports
  arm64: dts: ti: k3-j721e-main: add USB controller nodes
  ARM: dts: aspeed-g6: Add timer description
  ARM: dts: aspeed: ast2600evb: Enable i2c buses
  ARM: dts: at91: add a dts and dtsi file for kizbox2 based boards
  dt-bindings: arm: at91: Document Kizbox2-2 board binding
  arm64: dts: meson-gx: fix i2c compatible
  arm64: dts: meson-gx: cec node should be disabled by default
  arm64: dts: meson-g12b-odroid-n2: add missing amlogic, s922x compatible
  arm64: dts: meson-gxm: fix gpu irq order
  arm64: dts: meson-g12a: fix gpu irq order
  ...
2019-12-05 12:09:47 -08:00
Hongwei Zhang
7671be39c4 ARM: dts: aspeed-g5: Add SGPIO description
Add SGPIO node to the ASPEED AST2500 device tree.

Signed-off-by: Hongwei Zhang <hongweiz@ami.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01 22:07:38 +10:30
Cédric Le Goater
876c5d891c ARM: dts: aspeed: Add "spi-max-frequency" property
Keep the FMC controller chips at a safe 50 MHz rate and use 100 MHz
for the PNOR on the machines using a AST2500 SoC.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01 15:33:21 +10:30
Andrew Jeffery
b46aaf8a66 ARM: dts: aspeed: Migrate away from aspeed, g[45].* compatibles
Use the SoC-specific compatible strings instead.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01 15:33:21 +10:30
Oskar Senft
c791fc76bc arm: dts: aspeed: Add vuart aspeed,sirq-polarity-sense to aspeed-g5.dtsi
Enable auto-configuration of VUART SIRQ polarity on AST2500.

Signed-off-by: Oskar Senft <osk@google.com>
Link: https://lore.kernel.org/r/20190905144130.220713-3-osk@google.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-10-04 15:05:21 +02:00
Oscar A Perez
89b97c429e ARM: dts: aspeed-g5: Fixe gpio-ranges upper limit
According to the AST2500/AST2520 specs, these SoCs support up to 228 GPIO
pins. However, 'gpio-ranges' value in 'aspeed-g5.dtsi' file is currently
setting the upper limit to 220 which isn't allowing access to all their
GPIOs. The correct upper limit value is 232 (actual number is 228 plus a
4-GPIO hole in GPIOAB). Without this patch, GPIOs AC5 and AC6 do not work
correctly on a AST2500 BMC running Linux Kernel v4.19

Fixes: 2039f90d13 ("ARM: dts: aspeed-g5: Add gpio controller to devicetree")
Signed-off-by: Oscar A Perez <linux@neuralgames.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-09-04 17:34:34 -07:00
Andrew Jeffery
c35227958d ARM: dts: aspeed: Describe SD controllers
The AST2400 and AST2500 both share the same SD controller, at the same
location in the physical address space and the same hardware interrupt,
with the same clock configurations.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-08-21 13:28:38 +09:30
Hongwei Zhang
bb1dba7be1 ARM: dts: aspeed: Add SGPM pinmux
Add SGPM pinmux to ast2500-pinctrl function and group, to prepare for
supporting SGPIO in AST2500 SoC.

Signed-off-by: Hongwei Zhang <hongweiz@ami.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-07-23 12:25:42 +09:30
Patrick Venture
0215e2a546 ARM: dts: aspeed: Add aspeed-p2a-ctrl node
Add a node for the aspeed-p2a-ctrl module.  This node, when enabled will
disable the PCI-to-AHB bridge and then allow control of this bridge via
ioctls, and access via mmap.

Signed-off-by: Patrick Venture <venture@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-05-24 13:55:15 +09:30
Joel Stanley
459a6a2f25 ARM: dts: aspeed: Rename flash-controller nodes
The device tree compiler has started spitting out warnings about these
names, insisting they be called 'spi':

 ../arch/arm/boot/dts/aspeed-g5.dtsi:108.35-128.5: Warning
 (spi_bus_bridge): /ahb/flash-controller@1e631000: node name for SPI
 buses should be 'spi'

Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-05-24 13:55:15 +09:30
Joel Stanley
6d00c6f8d2 ARM: dts: aspeed: Add RTC node
The ASPEED ast2400 and ast2500 both contain an on board RTC device.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-04-05 14:08:20 +10:30
Eddie James
796b440701 ARM: dts: aspeed-g5: Add video engine
Add a node to describe the video engine on the AST2500.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-04-05 14:03:03 +10:30
Joel Stanley
e1920e7048 ARM: dts: aspeed-g5: Add resets and clocks to GFX node
The ast2500 has a reset for the CRT device that must be deasserted
before it can be used. Similarly it has a clock gate for a clock called
D1CLK that must be set to running.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-04-05 14:03:03 +10:30
Linus Torvalds
1b37b8c48d * A new EDAC AST 2500 SoC driver (Stefan M Schaeckeler)
* New i10nm EDAC driver for Intel 10nm CPUs (Qiuxu Zhuo and Tony Luck)
 
 * Altera SDRAM functionality carveout for separate enablement of RAS and
 SDRAM capabilities on some Altera chips. (Thor Thayer)
 
 * The usual round of cleanups and fixes
 
 Last but not least:
 
 * Recruit James Morse as a reviewer for the ARM side
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Merge tag 'edac_for_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp

Pull EDAC updates from Borislav Petkov:

 - A new EDAC AST 2500 SoC driver (Stefan M Schaeckeler)

 - New i10nm EDAC driver for Intel 10nm CPUs (Qiuxu Zhuo and Tony Luck)

 - Altera SDRAM functionality carveout for separate enablement of RAS
   and SDRAM capabilities on some Altera chips. (Thor Thayer)

 - The usual round of cleanups and fixes

And last but not least: recruit James Morse as a reviewer for the ARM
side.

* tag 'edac_for_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp:
  EDAC/altera: Add separate SDRAM EDAC config
  EDAC, altera: Add missing of_node_put()
  EDAC, skx_common: Add code to recognise new compound error code
  EDAC, i10nm: Fix randconfig builds
  EDAC, i10nm: Add a driver for Intel 10nm server processors
  EDAC, skx_edac: Delete duplicated code
  EDAC, skx_common: Separate common code out from skx_edac
  EDAC: Do not check return value of debugfs_create() functions
  EDAC: Add James Morse as a reviewer
  dt-bindings, EDAC: Add Aspeed AST2500
  EDAC, aspeed: Add an Aspeed AST2500 EDAC driver
2019-03-08 09:07:07 -08:00
Stefan M Schaeckeler
9b7e6242ee EDAC, aspeed: Add an Aspeed AST2500 EDAC driver
Add support for the Aspeed AST2500 SoC.

Signed-off-by: Stefan M Schaeckeler <sschaeck@cisco.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Andrew Jeffery <andrew@aj.id.au>
Cc: Joel Stanley <joel@jms.id.au>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-aspeed@lists.ozlabs.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: https://lkml.kernel.org/r/1547743097-5236-2-git-send-email-schaecsn@gmx.net
2019-01-18 15:23:11 +01:00
Vijay Khemka
9e9a6ad1d7 ARM: dts: aspeed: Add KCS support for LPC BMC
This adds the description of the four Keyboard Controller Style (KCS)
IPMI communication channels present in the ASPEED BMC. They are disabled
by default.

Signed-off-by: Vijay Khemka <vijaykhemka@fb.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-01-17 13:33:54 +11:00
Mark Walton
8b88029380 ARM: dts: aspeed: Add #interrupt-cells property to gpio controllers
Allows the GPIO controller to be used as an interrupt parent.

of_irq_find_parent() skips interrupt controller nodes that do
not have the #interrupt-cells property.

Signed-off-by: Mark Walton <mark.walton@serialtek.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-01-17 13:14:44 +11:00
Rob Herring
1426d40e11 ARM: dts: aspeed: Fix I2C bus warnings
dtc has new checks for I2C buses. The ASpeed dts files have a node named
'i2c' which causes a false positive warning. As the node is a 'simple-bus',
correct the node name to be 'bus' to fix the warnings.

arch/arm/boot/dts/aspeed-bmc-opp-lanyang.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus
arch/arm/boot/dts/aspeed-bmc-opp-romulus.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus
arch/arm/boot/dts/aspeed-ast2500-evb.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus
arch/arm/boot/dts/aspeed-bmc-arm-centriq2400-rep.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus
arch/arm/boot/dts/aspeed-bmc-intel-s2600wf.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus
arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus
arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus
arch/arm/boot/dts/aspeed-bmc-opp-zaius.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus
arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus
arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus

Cc: Joel Stanley <joel@jms.id.au>
Cc: Andrew Jeffery <andrew@aj.id.au>
Cc: linux-aspeed@lists.ozlabs.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2018-09-14 08:18:07 +09:30
Benjamin Herrenschmidt
2450ceaf21 ARM: dts: aspeed: Add coprocessor interrupt controller
Add a node for the CVIC (the coprocessor interrupt controller) and
add a label to the SRAM node so it can be referenced from the board
device-tree file.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2018-07-25 17:38:03 +09:30
Lei YU
a2df75ab0a ARM: dts: aspeed: Use 24MHz fixed clock for pwm
The aspeed pwm driver always sets the clock source to 24MHz, specify
the fixed clock in device tree to make sure the driver is using the
correct clock frequency to calculate the fan speed.

Signed-off-by: Lei YU <mine260309@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2018-07-18 22:37:21 +09:30
Benjamin Herrenschmidt
35578a85d9 ARM: dts: aspeed: Add G5 USB Virtual Hub
This adds the (disabled by default) device node for the
Aspeed virtual hub,a long with clocks and pinmux.

This also adds the missing pinmux definition for it
(the kernel driver already knows about it).

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2018-07-16 19:52:23 +09:30
Benjamin Herrenschmidt
112c5a640c ARM: dts: aspeed: Add G5 USB host pinmux
Set the default pinmux for EHCIs so boards don't have to do
it an document why it is not set for UHCI.

Remove the properties from the AST2500 EVB board which are
now redundant

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2018-07-16 19:52:10 +09:30
Joel Stanley
927c2fc2db ARM: dts: aspeed: Fix hwrng register address
The register address should be the full address of the rng, not the
offset from the start of the SCU.

Fixes: 5daa8212c0 ("ARM: dts: aspeed: Describe random number device")
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Olof Johansson <olof@lixom.net>
2018-06-02 01:18:53 -07:00
Benjamin Herrenschmidt
ac6e31d35f ARM: dts: Add Aspeed SoC USB controllers to device-tree
This adds the USB controllers to the DT template of the
AST24xx and AST25xx SoCs.

This patch doesn't enable them by default on any board specific
.dts yet. This will be done when we have the necessary clock/reset
and pinmux support. In the meantime though, this will work if
u-boot configures things properly.

For the AST2400 I only added pinmux definition for port 1
which is dual USB1/USB2. There are additional USB1 only ports
that might require more work but I don't have HW to test at
hand so I'm leaving that to whoever cares.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2018-05-25 13:57:30 +09:30
Joel Stanley
5daa8212c0 ARM: dts: aspeed: Describe random number device
There is a random number generator that updates a register in the SCU
every second. This is compatible with the timeriomem rng driver in the
kernel.

From the timeriomem_rng bindings:

  quality: estimated number of bits of true entropy per 1024 bits read
  from the rng.  Defaults to zero which causes the kernel's default
  quality to be used instead.  Note that the default quality is usually
  zero which disables using this rng to automatically fill the kernel's
  entropy pool.

As to the recommended value for us to use:

 Rick Altherr <raltherr@google.com> wrote:
 > Quality is #bit of entropy per 1000 bits read.  100 is a
 > conservative value that was suggested by those in the know.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2018-04-30 14:21:29 +09:30
Linus Torvalds
b240b419db ARM: SoC device tree updates for 4.17
This is the usual set of changes for device trees, with over 700
 non-merged changesets. There is an ongoing set of dtc warning fixes and
 the usual bugfixes, cleanups and added device support.
 
 The most interesting bit as usual is support for new machines listed
 below:
 
 - The Allwinner H6 makes its debut with the Pine-H64 board, and we get
   two new machines based on its older siblings: the H5 based OrangePi
   Zero+ and the A64 based Teres-I Laptop from Olimex. On the 32-bit side,
   we add The Olimex som204 based on Allwinner A20, and the Banana Pi M2
   Zero development board (based on H2).
 
 - NVIDIA adds support for Tegra194 aka "Xavier", plus their p2972
   development board and p2888 CPU module.
 
 - The Nuvoton npcm750 is a BMC that was newly added, for now we only
   support running on the evaluation board.
 
 - STmicroelectronics stm32 gains support for the stm32mp157c and two
   evaluation boards.
 
 - The Toradex Colibri board family grows a few members based on the
   i.MX6ULL variant.
 
 - The Advantec DMS-BA16 is a Qseven module using the NXP i.MX6
   family of chips.
 
 - The Phytec phyBOARD Mira is a family of industrial boards based on
   i.MX6. For now, four models get added.
 
 - TI am335x based PDU-001 is an industrial embedded machine used for
   traffic monitoring
 
 - The Aspeed platform now supports running on the BMC on the Qualcomm
   Centriq 2400 server
 
 - Samsung Exynos4 based Galaxy S3 is a family of mobile phones Qualcomm
   msm8974 based Galaxy S5 is a rather different phone made by the same
   company.
 
 - The Xilinx Zynq and ZynqMP platforms now gained a lot of dts file
   for the various boards made by Xilinx themselves, as well as the
   Digilent Zybo Z7.
 
 - The ARM Versatile family now supports the "IB2" interface board.
 
 - The Renesas H2 based "Stout" and the H3 based Salvator-X are more
   evaluation boards named after a kind of beer, as most of them are.
   The r8a77980 (V3H) based "Condor" apparently doesn't follow that
   tradition. ;-)
 
 - ROC-RK3328-CC is a simple developement board from the Libre Computer
   Project, based on the Rockchips RK3328 SoC
 
 - Haiku is another development board plus Qseven module based on Rockchips
   RK3368 and made by Theobroma Systems.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC device tree updates from Arnd Bergmann:
 "This is the usual set of changes for device trees, with over 700
  non-merged changesets. There is an ongoing set of dtc warning fixes
  and the usual bugfixes, cleanups and added device support.

  The most interesting bit as usual is support for new machines listed
  below:

   - The Allwinner H6 makes its debut with the Pine-H64 board, and we
     get two new machines based on its older siblings: the H5 based
     OrangePi Zero+ and the A64 based Teres-I Laptop from Olimex. On the
     32-bit side, we add The Olimex som204 based on Allwinner A20, and
     the Banana Pi M2 Zero development board (based on H2).

   - NVIDIA adds support for Tegra194 aka "Xavier", plus their p2972
     development board and p2888 CPU module.

   - The Nuvoton npcm750 is a BMC that was newly added, for now we only
     support running on the evaluation board.

   - STmicroelectronics stm32 gains support for the stm32mp157c and two
     evaluation boards.

   - The Toradex Colibri board family grows a few members based on the
     i.MX6ULL variant.

   - The Advantec DMS-BA16 is a Qseven module using the NXP i.MX6 family
     of chips.

   - The Phytec phyBOARD Mira is a family of industrial boards based on
     i.MX6. For now, four models get added.

   - TI am335x based PDU-001 is an industrial embedded machine used for
     traffic monitoring

   - The Aspeed platform now supports running on the BMC on the Qualcomm
     Centriq 2400 server

   - Samsung Exynos4 based Galaxy S3 is a family of mobile phones
     Qualcomm msm8974 based Galaxy S5 is a rather different phone made
     by the same company.

   - The Xilinx Zynq and ZynqMP platforms now gained a lot of dts file
     for the various boards made by Xilinx themselves, as well as the
     Digilent Zybo Z7.

   - The ARM Versatile family now supports the "IB2" interface board.

   - The Renesas H2 based "Stout" and the H3 based Salvator-X are more
     evaluation boards named after a kind of beer, as most of them are.
     The r8a77980 (V3H) based "Condor" apparently doesn't follow that
     tradition. ;-)

   - ROC-RK3328-CC is a simple developement board from the Libre
     Computer Project, based on the Rockchips RK3328 SoC

   - Haiku is another development board plus Qseven module based on
     Rockchips RK3368 and made by Theobroma Systems"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (701 commits)
  arm: dts: modify Nuvoton NPCM7xx device tree structure
  arm: dts: modify Makefile NPCM750 configuration name
  arm: dts: modify clock binding in NPCM750 device tree
  arm: dts: modify timer register size in NPCM750 device tree
  arm: dts: modify UART compatible name in NPCM750 device tree
  arm: dts: add watchdog device to NPCM750 device tree
  arm64: dts: uniphier: add ethernet node for PXs3
  ARM: dts: uniphier: add pinctrl groups of ethernet for second instance
  arm: dts: kirkwood*.dts: use SPDX-License-Identifier for board using GPL-2.0+
  arm: dts: kirkwood*.dts: use SPDX-License-Identifier for boards using GPL-2.0+/MIT
  arm: dts: kirkwood*.dts: use SPDX-License-Identifier for boards using GPL-2.0
  arm: dts: armada-385-turris-omnia: use SPDX-License-Identifier
  arm: dts: armada-385-db-ap: use SPDX-License-Identifier
  arm: dts: armada-388-rd: use SPDX-License-Identifier
  arm: dts: armada-xp-db-xc3-24g4xg: use SPDX-License-Identifier
  arm: dts: armada-xp-db-dxbc2: use SPDX-License-Identifier
  arm: dts: armada-370-db: use SPDX-License-Identifier
  arm: dts: armada-*.dts: use SPDX-License-Identifier for most of the Armada based board
  arm: dts: armada-xp-98dx: use SPDX-License-Identifier for prestara 98d SoCs
  arm: dts: armada-*.dtsi: use SPDX-License-Identifier for most of the Armada SoCs
  ...
2018-04-05 21:18:09 -07:00
Joel Stanley
9bdc00a5c1 ARM: dts: aspeed: Add default memory node
When we removed the inclusion of skeleton.dtsi from the device trees, we
broke booting for systems with bootloaders that aren't device tre aware.
This can be seen, for example, when appending the device tree blob to
the kernel image.

The reason booting broke was that the kernel lacked the device_type
label in the memory node. Add in a default memory node wth the
device_type. It can contain the memory address as the location is fixed
for each SoC generation, but the size needs to be added by the
bootloader or the board specific dts.

Fixes: 73102d6fdc ("ARM: dts: aspeed: Remove skeleton.dtsi")
Cc: <stable@vger.kernel.org>
Reported-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-03-14 10:05:28 +01:00
Joel Stanley
fd2de0a731 ARM: dts: aspeed: Add LPC reset controller node
On both the ast2400 and ast2500 SoCs, the LPC reset controller is
required to bring the UARTs out of reset without waiting for the LPC
reset to be deasserted.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2018-02-21 14:53:28 +10:30
Joel Stanley
7674bf96b8 ARM: dts: aspeed: Add LPC clock phandles
The LPC device uses LCLK.

Tested-by: Lei YU <mine260309@gmail.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2018-02-19 17:59:53 +10:30
Joel Stanley
542d2f4588 ARM: dts: aspeed-g5: Update LPC node
This addresses some differences between the G5 and G4 LPC nodes that
make them hard to compare. There is no functional change.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2018-02-19 17:59:50 +10:30
Joel Stanley
75b310b770 ARM: dts: aspeed: Add IPMI BT node
The IPMI BT device part of the LPC interface and is used for
communication with the host processor.

Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2018-02-19 17:59:46 +10:30
Joel Stanley
eb323ad0ef ARM: dts: aspeed: Update license headers
In b24413180f ("License cleanup: add SPDX GPL-2.0 license identifier
to files with no license") these files had the GPL-2.0 licence added
automatically. Update them to be GPL 2.0+ in line with other IBM kernel
contributions.

Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-12-21 14:03:18 +10:30
Joel Stanley
73102d6fdc ARM: dts: aspeed: Remove skeleton.dtsi
We don't require it for any of the ASPEED systems.

Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-12-21 14:03:18 +10:30
Joel Stanley
d558ce0ff0 ARM: dts: aspeed: Add LPC Snoop device
LPC snoop hardware on the ASPEED BMC, used for monitoring
host I/O port activity.

Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-12-21 14:03:17 +10:30
Joel Stanley
0734089f06 ARM: dts: aspeed: Add PWM and tachometer node
The PWM/tach unit has a clock and reset phandle. It needs both in order
to function correctly.

Signed-off-by: Joel Stanley <joel@jms.id.au>
--
v3:
 Add the pwm reset phandle
2017-12-21 14:03:17 +10:30
Joel Stanley
2528be7548 ARM: dts: aspeed: Add clock phandle to GPIO
This enables a feature where the driver can debounce inputs.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-12-21 14:03:16 +10:30
Joel Stanley
e1e0ec419c ARM: dts: aspeed: Add flash controller clocks
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-12-21 14:03:16 +10:30
Joel Stanley
a563e192cc ARM: dts: aspeed: Add watchdog clocks
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-12-21 14:03:15 +10:30
Joel Stanley
deb95c59bb ARM: dts: aspeed: Add MAC clocks
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-12-21 14:03:15 +10:30
Joel Stanley
bb8155ada4 ARM: dts: aspeed: Add proper clock references
This device tree will break existing kernels that do not have the clk
patches applied (no clocksource, as we don't know the speed of the APB
clock.  You can boot if you pass a lpj value on the command line, but
won't have a uart).

Older device trees running with the newer kernel will function as well
as pre-4.16 kernels. That is, that some IP blocks (i2c, pwm/tach, adc)
will not work as the kernel lacks reset controller and clock enabling.

This is being changed as existing device trees use fixed-clocks in order
to boot without a clk driver. The newly added clk driver provides proper
clock support, including gating, so we move the device trees over to
properly request clocks.

The SCU compatible string is updated as the g4-scu string made it into
the tree before we decided on aspeed,astX000-<ip> as the format for the
strings. The old string will be removed from the bindings in a future
patch.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-12-21 14:03:14 +10:30
Andrew Jeffery
b6436f765d ARM: dts: aspeed: Add LPC and child devices
Ensure the ordering is correct and add all of the children in the SoC
device trees for the ast2400 and ast2500.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-12-21 14:03:14 +10:30
Linus Torvalds
527d147074 ARM: Device-tree updates for 4.15
We add device tree files for a couple of additional SoCs in various areas:
 
 Allwinner R40/V40 for entertainment, Broadcom Hurricane 2 for networking,
 Amlogic A113D for audio, and Renesas R-Car V3M for automotive.
 
 As usual, lots of new boards get added based on those and other SoCs:
 
  - Actions S500 based CubieBoard6 single-board computer
 
  - Amlogic Meson-AXG A113D based development board
  - Amlogic S912 based Khadas VIM2 single-board computer
  - Amlogic S912 based Tronsmart Vega S96 set-top-box
 
  - Allwinner H5 based NanoPi NEO Plus2 single-board computer
  - Allwinner R40 based Banana Pi M2 Ultra and Berry single-board computers
  - Allwinner A83T based TBS A711 Tablet
 
  - Broadcom Hurricane 2 based Ubiquiti UniFi Switch 8
  - Broadcom bcm47xx based Luxul XAP-1440/XAP-810/ABR-4500/XBR-4500
      wireless access points and routers
 
  - NXP i.MX51 based Zodiac Inflight Innovations RDU1 board
  - NXP i.MX53 based GE Healthcare PPD biometric monitor
  - NXP i.MX6 based Pistachio single-board computer
  - NXP i.MX6 based Vining-2000 automotive diagnostic interface
  - NXP i.MX6 based Ka-Ro TX6 Computer-on-Module in additional variants
 
  - Qualcomm MSM8974 (Snapdragon 800) based Fairphone 2 phone
  - Qualcomm MSM8974pro (Snapdragon 801) based Sony Xperia Z2 Tablet
 
  - Realtek RTD1295 based set-top-boxes MeLE V9 and PROBOX2 AVA
 
  - Renesas R-Car V3M (R8A77970) SoC and "Eagle" reference board
  - Renesas H3ULCB and M3ULCB "Kingfisher" extension infotainment boards
  - Renasas r8a7745 based iWave G22D-SODIMM SoM
 
  - Rockchip rk3288 based Amarula Vyasa single-board computer
 
  - Samsung Exynos5800 based Odroid HC1 single-board computer
 
 For existing SoC support, there was a lot of ongoing work, as usual
 most of that concentrated on the Renesas, Rockchip, OMAP, i.MX, Amlogic
 and Allwinner platforms, but others were also active.
 
 Rob Herring and many others worked on reducing the number of issues that
 the latest version of 'dtc' now warns about. Unfortunately there is still
 a lot left to do.
 
 A rework of the ARM foundation model introduced several new files
 for common variations of the model.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM device-tree updates from Arnd Bergmann:
 "We add device tree files for a couple of additional SoCs in various
  areas:

  Allwinner R40/V40 for entertainment, Broadcom Hurricane 2 for
  networking, Amlogic A113D for audio, and Renesas R-Car V3M for
  automotive.

  As usual, lots of new boards get added based on those and other SoCs:

   - Actions S500 based CubieBoard6 single-board computer

   - Amlogic Meson-AXG A113D based development board
   - Amlogic S912 based Khadas VIM2 single-board computer
   - Amlogic S912 based Tronsmart Vega S96 set-top-box

   - Allwinner H5 based NanoPi NEO Plus2 single-board computer
   - Allwinner R40 based Banana Pi M2 Ultra and Berry single-board computers
   - Allwinner A83T based TBS A711 Tablet

   - Broadcom Hurricane 2 based Ubiquiti UniFi Switch 8
   - Broadcom bcm47xx based Luxul XAP-1440/XAP-810/ABR-4500/XBR-4500
     wireless access points and routers

   - NXP i.MX51 based Zodiac Inflight Innovations RDU1 board
   - NXP i.MX53 based GE Healthcare PPD biometric monitor
   - NXP i.MX6 based Pistachio single-board computer
   - NXP i.MX6 based Vining-2000 automotive diagnostic interface
   - NXP i.MX6 based Ka-Ro TX6 Computer-on-Module in additional variants

   - Qualcomm MSM8974 (Snapdragon 800) based Fairphone 2 phone
   - Qualcomm MSM8974pro (Snapdragon 801) based Sony Xperia Z2 Tablet

   - Realtek RTD1295 based set-top-boxes MeLE V9 and PROBOX2 AVA

   - Renesas R-Car V3M (R8A77970) SoC and "Eagle" reference board
   - Renesas H3ULCB and M3ULCB "Kingfisher" extension infotainment boards
   - Renasas r8a7745 based iWave G22D-SODIMM SoM

   - Rockchip rk3288 based Amarula Vyasa single-board computer

   - Samsung Exynos5800 based Odroid HC1 single-board computer

  For existing SoC support, there was a lot of ongoing work, as usual
  most of that concentrated on the Renesas, Rockchip, OMAP, i.MX,
  Amlogic and Allwinner platforms, but others were also active.

  Rob Herring and many others worked on reducing the number of issues
  that the latest version of 'dtc' now warns about. Unfortunately there
  is still a lot left to do.

  A rework of the ARM foundation model introduced several new files for
  common variations of the model"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (599 commits)
  arm64: dts: uniphier: route on-board device IRQ to GPIO controller for PXs3
  dt-bindings: bus: Add documentation for the Technologic Systems NBUS
  arm64: dts: actions: s900-bubblegum-96: Add fake uart5 clock
  ARM: dts: owl-s500: Add CubieBoard6
  dt-bindings: arm: actions: Add CubieBoard6
  ARM: dts: owl-s500-guitar-bb-rev-b: Add fake uart3 clock
  ARM: dts: owl-s500: Set power domains for CPU2 and CPU3
  arm: dts: mt7623: remove unused compatible string for pio node
  arm: dts: mt7623: update usb related nodes
  arm: dts: mt7623: update crypto node
  ARM: dts: sun8i: a711: Enable USB OTG
  ARM: dts: sun8i: a711: Add regulator support
  ARM: dts: sun8i: a83t: bananapi-m3: Enable AP6212 WiFi on mmc1
  ARM: dts: sun8i: a83t: cubietruck-plus: Enable AP6330 WiFi on mmc1
  ARM: dts: sun8i: a83t: Move mmc1 pinctrl setting to dtsi file
  ARM: dts: sun8i: a83t: allwinner-h8homlet-v2: Add AXP818 regulator nodes
  ARM: dts: sun8i: a83t: bananapi-m3: Add AXP813 regulator nodes
  ARM: dts: sun8i: a83t: cubietruck-plus: Add AXP818 regulator nodes
  ARM: dts: sunxi: Add dtsi for AXP81x PMIC
  arm64: dts: allwinner: H5: Restore EMAC changes
  ...
2017-11-16 15:48:26 -08:00
Greg Kroah-Hartman
b24413180f License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.

By default all files without license information are under the default
license of the kernel, which is GPL version 2.

Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier.  The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.

This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.

How this work was done:

Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
 - file had no licensing information it it.
 - file was a */uapi/* one with no licensing information in it,
 - file was a */uapi/* one with existing licensing information,

Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.

The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne.  Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.

The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed.  Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.

Criteria used to select files for SPDX license identifier tagging was:
 - Files considered eligible had to be source code files.
 - Make and config files were included as candidates if they contained >5
   lines of source
 - File already had some variant of a license header in it (even if <5
   lines).

All documentation files were explicitly excluded.

The following heuristics were used to determine which SPDX license
identifiers to apply.

 - when both scanners couldn't find any license traces, file was
   considered to have no license information in it, and the top level
   COPYING file license applied.

   For non */uapi/* files that summary was:

   SPDX license identifier                            # files
   ---------------------------------------------------|-------
   GPL-2.0                                              11139

   and resulted in the first patch in this series.

   If that file was a */uapi/* path one, it was "GPL-2.0 WITH
   Linux-syscall-note" otherwise it was "GPL-2.0".  Results of that was:

   SPDX license identifier                            # files
   ---------------------------------------------------|-------
   GPL-2.0 WITH Linux-syscall-note                        930

   and resulted in the second patch in this series.

 - if a file had some form of licensing information in it, and was one
   of the */uapi/* ones, it was denoted with the Linux-syscall-note if
   any GPL family license was found in the file or had no licensing in
   it (per prior point).  Results summary:

   SPDX license identifier                            # files
   ---------------------------------------------------|------
   GPL-2.0 WITH Linux-syscall-note                       270
   GPL-2.0+ WITH Linux-syscall-note                      169
   ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause)    21
   ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)    17
   LGPL-2.1+ WITH Linux-syscall-note                      15
   GPL-1.0+ WITH Linux-syscall-note                       14
   ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause)    5
   LGPL-2.0+ WITH Linux-syscall-note                       4
   LGPL-2.1 WITH Linux-syscall-note                        3
   ((GPL-2.0 WITH Linux-syscall-note) OR MIT)              3
   ((GPL-2.0 WITH Linux-syscall-note) AND MIT)             1

   and that resulted in the third patch in this series.

 - when the two scanners agreed on the detected license(s), that became
   the concluded license(s).

 - when there was disagreement between the two scanners (one detected a
   license but the other didn't, or they both detected different
   licenses) a manual inspection of the file occurred.

 - In most cases a manual inspection of the information in the file
   resulted in a clear resolution of the license that should apply (and
   which scanner probably needed to revisit its heuristics).

 - When it was not immediately clear, the license identifier was
   confirmed with lawyers working with the Linux Foundation.

 - If there was any question as to the appropriate license identifier,
   the file was flagged for further research and to be revisited later
   in time.

In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.

Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights.  The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.

Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.

In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.

Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
 - a full scancode scan run, collecting the matched texts, detected
   license ids and scores
 - reviewing anything where there was a license detected (about 500+
   files) to ensure that the applied SPDX license was correct
 - reviewing anything where there was no detection but the patch license
   was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
   SPDX license was correct

This produced a worksheet with 20 files needing minor correction.  This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.

These .csv files were then reviewed by Greg.  Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected.  This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.)  Finally Greg ran the script using the .csv files to
generate the patches.

Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-02 11:10:55 +01:00
Arnd Bergmann
b966bb4598 Merge tag 'aspeed-4.15-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into next/soc
Pull "ASPEED devicetree updates for 4.15" from Joel Stanley:

 - Cleanups of the ASPEED device trees
 - Enable the i2c bus on all platforms
 - Turn VUART on for BMC platforms
 - Bind watchdog two for compatilbiy with shipping u-boot

* tag 'aspeed-4.15-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
  ARM: dts: aspeed-romulus: Enable VUART
  ARM: dts: aspeed-palmetto: Enable VUART
  ARM: dts: aspeed: Enable watchdog two
  ARM: dts: aspeed: Remove undocumented wdt properties
  ARM: dts: aspeed: Clean up UART nodes
  ARM: dts: aspeed: Correctly order UART nodes
  ARM: dts: aspeed: Add aliases for UARTs
  ARM: dts: aspeed-ast2500: Add I2C devices
  ARM: dts: aspeed-palmetto: Add I2C devices
  ARM: dts: aspeed-romulus: Add I2C devices
  ARM: dts: aspeed: Add I2C buses
  ARM: dts: aspeed: Reorder ADC node
  ARM: dts: aspeed: Move pinctrl subnodes to improve readability
2017-10-20 00:38:05 +02:00