Commit Graph

4 Commits

Author SHA1 Message Date
Lionel Debroux
2f55ac072f suspend: constify platform_suspend_ops
While at it, fix two checkpatch errors.
Several non-const struct instances constified by this patch were added after
the introduction of platform_suspend_ops in checkpatch.pl's list of "should
be const" structs (79404849e9).

Patch against mainline.
Inspired by hunks of the grsecurity patch, updated for newer kernels.

Signed-off-by: Lionel Debroux <lionel_debroux@yahoo.fr>
Acked-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2010-11-16 14:14:02 +01:00
Haavard Skinnemoen
a8d902db22 avr32: Add MMIO address definitions for certain controllers
Hardcoded MMIO base addresses are used a few places throughout the
platform code. Move these into the chip-specific header file so that
adding support for new chips becomes a bit easier.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-08-08 12:42:14 +02:00
Haavard Skinnemoen
3663b736a5 avr32: Use <mach/foo.h> instead of <asm/arch/foo.h>
Update all avr32-specific files to use the new platform-specific header
locations. Drivers shared with ARM are left alone for now.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-08-05 14:36:57 +02:00
Haavard Skinnemoen
02a00cf672 avr32: Power Management support ("standby" and "mem" modes)
Implement Standby support. In this mode, we'll suspend all drivers,
put the SDRAM in self-refresh mode and switch off the HSB bus
("frozen" mode.)

Implement Suspend-to-mem support. In this mode, we suspend all
drivers, put the SDRAM into self-refresh mode and switch off all
internal clocks except the 32 kHz oscillator ("stop" mode.)

The lowest-level suspend code runs from a small portion of SRAM
allocated at startup time. This gets rid of a small potential race
with the SDRAM where we might try to enter self-refresh mode in the
middle of an icache burst. We also relocate all interrupt and
exception handlers to SRAM during the small window when we enter and
exit the low-power modes.

We don't need to do any special tricks to start and stop the PLL. The
main clock is automatically gated by hardware until the PLL is stable.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-07-02 11:05:01 +02:00