This is a major rework of the nouveau driver core, to reflect more closely
how the hw is used and to make it easier to implement newer features now
that the GPUs are more clearly understood than when nouveau started.
It also contains a few other bits:
thermal patches
nv41/44 pcie gart fixes
i2c unregistering fixes.
* 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: (191 commits)
drm/nv98/crypt: fix fuc build with latest envyas
drm/nouveau/devinit: fixup various issues with subdev ctor/init ordering
drm/nv41/vm: fix and enable use of "real" pciegart
drm/nv44/vm: fix and enable use of "real" pciegart
drm/nv04/dmaobj: fixup vm target handling in preparation for nv4x pcie
drm/nouveau: store supported dma mask in vmmgr
drm/nvc0/ibus: initial implementation of subdev
drm/nouveau/therm: add support for fan-control modes
drm/nouveau/hwmon: rename pwm0* to pmw1* to follow hwmon's rules
drm/nouveau/therm: calculate the pwm divisor on nv50+
drm/nouveau/fan: rewrite the fan tachometer driver to get more precision, faster
drm/nouveau/therm: move thermal-related functions to the therm subdev
drm/nouveau/bios: parse the pwm divisor from the perf table
drm/nouveau/therm: use the EXTDEV table to detect i2c monitoring devices
drm/nouveau/therm: rework thermal table parsing
drm/nouveau/gpio: expose the PWM/TOGGLE parameter found in the gpio vbios table
drm/nouveau: fix pm initialization order
drm/nouveau/bios: check that fixed tvdac gpio data is valid before using it
drm/nouveau: log channel debug/error messages from client object rather than drm client
drm/nouveau: have drm debugging macros build on top of core macros
...
Conflicts:
drivers/gpu/drm/nouveau/nouveau_dp.c
Hopefully fixed the tlb flush timeout issue. Was able to observe this
condition occur occasionally, and it appears the binary driver doesn't
wait on the old condition either..
Should give 39-bit DMA addressing on the relevant chipsets.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Something seems to be missing in regards to flushing specific ranges of
the TLB. For the moment, flushing the entire thing seems to make it
work alright.
Should give 39-bit DMA addressing on the relevant chipsets.
v2: allocate contig 16KiB for dummy pages, reported by mwk on irc
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
For now, only 2 control modes are available:
- NONE: The fan is never touched (default)
- MANUAL: The fan is set to the user-defined fan speed (pwm1)
This patch introduces a distinction between ptherm internal fan management
and external fan management. The latter is bound to respect the fan mode
while the first can still select the speed it wants unless the NONE mode
is selected. This is important for automatic fan management.
Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This was reported by tizbac on IRC.
Signed-off-by: Martin Peres <martin.peres@labri.fr>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
v2: Martin Peres <martin.peres@labri.fr>
- fixed unintentional use of floating point
Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
The previous driver waited for 250ms to accumulate data. This version times a
complete fan rotation and extrapolates to RPM.
The fan rotational speed should now be read in less than 250ms (worst case)
and usually in less 50ms.
Signed-off-by: Martin Peres <martin.peres@labri.fr>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
It looks scary because of the size, but I tried to keep the differences minimal.
Further patches will fix the actual "driver" code and add new features.
v2: change filenames, split to submodules
v3: add a missing include
v4: Ben Skeggs <bskeggs@redhat.com>
- fixed set_defaults() to allow min_duty < 30 (thermal table will
override this if it's actually necessary)
- fixed set_defaults() to not provide pwm_freq so nv4x (which only has
pwm_div) can actually work. the boards using pwm_freq will have a
thermal table entry to provide us the value.
- removed unused files
Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
v2: perf_table now is more in line with the other functions
Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit also adds a static list of all known devices and their possible
i2c addresses.
v2: use the common table parsing technique as suggested by darktama
Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
As an accident, it should also fix temperature reading on nv4x.
v2: introduce nvbios_therm_entry as advised by darktama
Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
If nouveau_pm_perflvl_get() fails, pm->profiles list will be left
uninitialized, which causes oops during nouveau_pm_fini().
Move INIT_LIST_HEAD before call to nouveau_pm_perflvl_get().
Signed-off-by: Dmitry Eremin-Solenikov <dmitry_eremin@mentor.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Not really sure how to confirm this 100%, but, the numbers match on all the
traces I have for NVCx (2 LTS), NVD9 (1LTS) and NVEx (4LTS).
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Triggers PIBUS interrupts due to register not existing anymore, and as
a result HUB_SET_CHAN times out.
After this commit, our fuc loads and can accelerate at least fbcon, X,
glxgears and OA on NVE4. NVE7 not tested as of yet.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Currently identical except the available chipset register lists. This will
*not* currently work and is disabled by default because of this.
May get merged again later, remains to be seen what further changes will be
required.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Future code will use the object class rather than chipset checks in order to
identify available channel features.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This value will match something that's easily available from the engine IRQ
handlers, and used to lookup the relevant context.
Since the changes in how this is done on each generation match when the
major PFIFO changes happened, fifo is responsible for calculating the
correct value to avoid duplicating the same code among many engine modules.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Kepler PFIFO lost the ability to address multiple engines from a single
channel, so we need a separate one for the copy engine.
v2: Marcin Slusarz <marcin.slusarz@gmail.com>
- regression fix: restore hw accelerated buffer copies
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
v2: Ben Skeggs <bskeggs@redhat.com>
- fill in nouveau_pm.dev to prevent oops
- fix ppc issues (build + OF shadow)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This is a HUGE commit, but it's not nearly as bad as it looks - any problems
can be isolated to a particular chipset and engine combination. It was
simply too difficult to port each one at a time, the compat layers are
*already* ridiculous.
Most of the changes here are simply to the glue, the process for each of the
engine modules was to start with a standard skeleton and copy+paste the old
code into the appropriate places, fixing up variable names etc as needed.
v2: Marcin Slusarz <marcin.slusarz@gmail.com>
- fix find/replace bug in license header
v3: Ben Skeggs <bskeggs@redhat.com>
- bump indirect pushbuf size to 8KiB, 4KiB barely enough for userspace and
left no space for kernel's requirements during GEM pushbuf submission.
- fix duplicate assignments noticed by clang
v4: Marcin Slusarz <marcin.slusarz@gmail.com>
- add sparse annotations to nv04_fifo_pause/nv04_fifo_start
- use ioread32_native/iowrite32_native for fifo control registers
v5: Ben Skeggs <bskeggs@redhat.com>
- rebase on v3.6-rc4, modified to keep copy engine fix intact
- nv10/fence: unmap fence bo before destroying
- fixed fermi regression when using nvidia gr fuc
- fixed typo in supported dma_mask checking
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
v2: Ben Skeggs <bskeggs@redhat.com>
- de-inline nv_icmd, triggers some gcc issue causing ctxnv[ce]0.c to
take a *very* *very* long time to build on some configs.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This is all very much a policy thing, and hence will not belong in SW
after the rework.
engsw now only handles receiving the event to say "can flip now" and makes
a callback to perform the actual work.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
There's a *lot* of code in here, and it's all going to use the PGRAPH priv
pointer rather than drm_device after the engine rework. This is handling
all the rename-only parts of the change.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Still the same code, but not an "engine" anymore. The fence code is more of
a policy decision rather than exposing mechanisms, so it's not appropriate
to port it to the new engine subsystem.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Having GPUOBJ and VM intertwined like this makes it *really* hard to
continue porting to the new driver architecture, split it out in
favour of requiring explit maps be the caller.
It's more flexible and obvious this way anyway...
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Still missing the main bits we use to change performance levels, I'll get
to it after all the hard yakka has been finished.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
v2/v3: Ben Skeggs <bskeggs@redhat.com>
- fix typo in default bus selection
- fix accidental loss of destructor
v4: Dmitry Eremin-Solenikov <dmitry_eremin@mentor.com>
- fix typo causing incorrect default i2c port settings when no BMP data
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
v2: Ben Skeggs <bskeggs@redhat.com>
- rebase on top of v3.6-rc6 with gpio reset patch integrated already
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Adds an extra layer of indirection to each register access, but it's not
too bad, and will also go away as pieces are ported.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
These currently just call the existing ones in nouveau_drv.c, but will be
extended in upcoming commits. This needed to be separated from the current
code as there will be some header clashes until things are ported.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit provides most of the infrastructure to support a major overhaul
of Nouveau's internals coming in the following commits. This work aims to
take all the things we've learned over the last several years, and turn that
into a cleaner architecture that's more maintainable going forward.
RAMHT and MM bits of the new core have been left out for the moment, and
will be pulled in as I go through the process of porting the code to
become either subdev or engine modules.
There are several main goals I wanted to achieve through this work:
-- Reduce complexity
The goal here was to make each component of the driver as independent as
possible, which will ease maintainability and readability, and provide a
good base for resetting locked up GPU units in the future.
-- Better tracking of GPU units that are required at any given time
This is for future PM work, we'll be able to tell exactly what parts of the
GPU we need powered at any given point (etc).
-- Expose all available NVIDIA GPUs to the client
In order to support things such as multi-GPU channels, we want to be able
to expose all the NVIDIA GPUs to the client over a single file descriptor
so it can send a single push buffer to multiple GPUs.
-- Untangle the core hardware support code from the DRM implementation
This happened initially as an unexpected side-effect of developing the
initial core infrastructure in userspace, but it turned into a goal of
the whole project. Initial benefits will be the availablility of a
number of userspace tools and tests using the same code as the driver
itself, but will also be important as I look into some virtualisation
ideas.
v2: Ben Skeggs <bskeggs@redhat.com>
- fix duplicate assignments noticed by clang
- implement some forgotten yelling in error path
- ensure 64-bit engine mask is used everywhere
v3: Marcin Slusarz <marcin.slusarz@gmail.com>
- sparse fixes
- inline nv_printk into nv_assert to prevent recursive inlining issues
v4: Ben Skeggs <bskeggs@redhat.com>
- fixed minor memory leak on gpuobj destruction
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Future work will be headed in the way of separating the policy supplied by
the nouveau drm module from the mechanisms provided by the driver core.
There will be a couple of major classes (subdev, engine) of driver modules
that have clearly defined tasks, and the further directory structure change
is to reflect this.
No code changes here whatsoever, aside from fixing up a couple of include
file pathnames.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Won't necessarily be a drm_mm_node in the future, and I can't think of any
good reason to not use the offset from the bo struct. There may have been
some reason once apon a time, but, separate commit just in case.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Fixes some unfortunate races on resume. The G84 version of the code doesn't
need this as "gpuobj"s are automagically suspended/resumed by the core code
whereas pinned buffer objects are not.
Cc: stable@vger.kernel.org
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
466e69b8b0 dropped busmaster enable from the
global drm code and moved it to the individual drivers, but missed the savage
driver. So, this re-adds busmaster enable to the savage driver, fixing the
regression.
Signed-off-by: Florian Zumbiehl <florz@florz.de>
Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
Cc: stable@vger.kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
