AuxXxilium/linux_dsm_epyc7002
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3 Commits

Author SHA1 Message Date
Tero Kristo
8fa4509579 dt-bindings: clock: dra7xx: add clkctrl indices for new data layout 
The new data layout will be split based on clockdomain boundaries, instead
of CM boundaries. This introduces a few new clkctrl providers, that have
different indices for the clkctrl data.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Tony Lindgren <tony@atomide.com>
 2018-10-03 15:02:26 +03:00
Faiz Abbas
91c17a7006 clk: ti: dra7: Add clkctrl clock data for the mcan clocks 
Add clkctrl data for the m_can clocks and register it within the
clkctrl driver

Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
CC: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
 2018-07-09 22:30:48 -07:00
Tero Kristo
ae263d5276 dt-bindings: clk: add dra7 clkctrl definitions 
Contains offsets for all dra7 clkctrl main and optional clocks.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
 2017-12-01 15:17:18 +02:00