Commit Graph

265 Commits

Author SHA1 Message Date
David Ung
31f40f8652 drm/tegra: Use correct relocation target offsets
When copying a relocation from userspace, copy the correct target
offset.

Signed-off-by: David Ung <davidu@nvidia.com>
Fixes: 961e3beae3 ("drm/tegra: Make job submission 64-bit safe")
Cc: stable@vger.kernel.org
[treding@nvidia.com: provide a better commit message]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:59 +01:00
Thierry Reding
359ae687db drm/tegra: Add minimal power management
For now only disable the KMS hotplug polling helper logic upon suspend
and re-enable it on resume.

Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Mark Zhang <markz@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:58 +01:00
Thierry Reding
666cb87332 drm/tegra: dc: Unify enabling the display controller
Previously output drivers would enable continuous display mode and power
up the display controller at various points during the initialization.
This is suboptimal because it accesses display controller registers in
output drivers and duplicates a bit of code.

Move this code into the display controller driver and enable the display
controller as the final step of the ->mode_set_nofb() implementation.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:58 +01:00
Thierry Reding
8f604f8c4d drm/tegra: Track tiling and format in plane state
Tracking these in the plane state allows them to be computed in the
->atomic_check() callback and reused when applying the configuration in
->atomic_update().

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:57 +01:00
Thierry Reding
47802b09a9 drm/tegra: Track active planes in CRTC state
Wrap struct drm_crtc_state in a driver-specific structure and add the
planes field which keeps track of which planes are updated or disabled
during a modeset. This allows atomic updates of the the display engine
at ->atomic_flush() time.

v2: open-code getting the state of the CRTC that the plane is being
    attached to (Daniel Vetter)

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:56 +01:00
Thierry Reding
3f0fb52ef0 drm/tegra: Remove unused ->mode_fixup() callbacks
All output drivers have now been converted to use the ->atomic_check()
callback, so the ->mode_fixup() callbacks are no longer used.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:56 +01:00
Thierry Reding
1503ca47d7 drm/tegra: Atomic conversion, phase 3, step 3
Provide a custom ->atomic_commit() implementation which supports async
commits. The generic atomic page-flip helper can use this to implement
page-flipping.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:55 +01:00
Thierry Reding
74f48791ad drm/tegra: Atomic conversion, phase 3, step 2
Replace drm_crtc_helper_set_config() by drm_atomic_helper_set_config().
All drivers have now been converted to use ->atomic_check() to set the
atomic state, therefore the atomic mode setting helpers can be used.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:55 +01:00
Thierry Reding
76d59ed049 drm/tegra: dc: Use atomic clock state in modeset
All clock state is now stored in the display controller's atomic state,
so the output drivers no longer need to call back into the display
controller driver to set up the clock. This is also required to make
sure no hardware changes are made before validating a configuration.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:54 +01:00
Thierry Reding
82f1511c35 drm/tegra: sor: Implement ->atomic_check()
The implementation of the ->atomic_check() callback precomputes all
parameters to check if the given configuration can be applied. If so the
precomputed values are stored in the atomic state object for the encoder
and applied during modeset. In that way the modeset no longer needs to
perform any checking but simply program values into registers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:54 +01:00
Thierry Reding
a9825a6e27 drm/tegra: hdmi: Implement ->atomic_check()
The implementation of the ->atomic_check() callback precomputes all
parameters to check if the given configuration can be applied. If so the
precomputed values are stored in the atomic state object for the encoder
and applied during modeset. In that way the modeset no longer needs to
perform any checking but simply program values into registers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:53 +01:00
Thierry Reding
ebd14afe8f drm/tegra: dsi: Implement ->atomic_check()
The implementation of the ->atomic_check() callback precomputes all
parameters to check if the given configuration can be applied. If so the
precomputed values are stored in the atomic state object for the encoder
and applied during modeset. In that way the modeset no longer needs to
perform any checking but simply program values into registers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:53 +01:00
Thierry Reding
3cebae6737 drm/tegra: rgb: Implement ->atomic_check()
The implementation of the ->atomic_check() callback precomputes all
parameters to check if the given configuration can be applied. If so the
precomputed values are stored in the atomic state object for the encoder
and applied during modeset. In that way the modeset no longer needs to
perform any checking but simply program values into registers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:53 +01:00
Thierry Reding
ca915b108a drm/tegra: dc: Store clock setup in atomic state
This allows the clock setup to be separated from the clock programming
and better matches the expectations of the atomic modesetting where no
code paths must fail during modeset.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:52 +01:00
Thierry Reding
07866963b6 drm/tegra: Atomic conversion, phase 3, step 1
Switch out the regular plane helpers for the atomic plane helpers. Also
use the default atomic helpers to implement the ->atomic_check() and
->atomic_commit() callbacks. The driver now exclusively uses the atomic
interfaces.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:51 +01:00
Thierry Reding
9d44189f55 drm/tegra: Atomic conversion, phase 2
Hook up the default ->reset() and ->atomic_duplicate_state() helpers.
This ensures that state objects are properly created and framebuffer
reference counts correctly maintained.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:51 +01:00
Thierry Reding
4aa3df7149 drm/tegra: Atomic conversion, phase 1
Implement initial atomic state handling. Hook up the CRTCs, planes' and
connectors' ->atomic_destroy_state() callback to ensure that the atomic
state objects don't leak.

Furthermore the CRTC now implements the ->mode_set_nofb() callback that
is used by new helpers to implement ->mode_set() and ->mode_set_base().
These new helpers also make use of the new plane helper functions which
the driver now provides.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:50 +01:00
Thierry Reding
05f175f4f3 drm/tegra: dc: Do not needlessly deassert reset
Commit 9c0127004f ("drm/tegra: dc: Add powergate support") changed the
driver's ->probe() implementation to deassert the module reset, and with
there being nobody else to assert it until ->remove() there is no need
to deassert again later on.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:50 +01:00
Thierry Reding
328ec69e7f drm/tegra: Output cleanup functions cannot fail
The tegra_output_exit() and tegra_output_remove() functions cannot fail,
so make them return void.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:49 +01:00
Thierry Reding
ea130b240d drm/tegra: Remove remnants of the output midlayer
The tegra_output midlayer is now completely gone and output drivers use
it purely as a helper library.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:49 +01:00
Thierry Reding
4009c22420 drm/tegra: debugfs cleanup cannot fail
The debugfs cleanup code never fails, so no error is returned. Therefore
the functions can all return void instead.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:48 +01:00
Thierry Reding
6fad8f66d7 drm/tegra: sor: Demidlayer
Implement encoder and connector within the eDP driver itself using the
Tegra output helpers rather than using the Tegra output as midlayer. By
doing so one level of indirection is removed and output drivers become
more flexible while keeping the majority of the advantages provided by
the common output helpers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:48 +01:00
Thierry Reding
5b901e78b2 drm/tegra: dsi: Demidlayer
Implement encoder and connector within the DSI driver itself using the
Tegra output helpers rather than using the Tegra output as midlayer. By
doing so one level of indirection is removed and output drivers become
more flexible while keeping the majority of the advantages provided by
the common output helpers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:48 +01:00
Thierry Reding
596827196f drm/tegra: hdmi: Demidlayer
Implement encoder and connector within the HDMI driver itself using the
Tegra output helpers rather than using the Tegra output as midlayer. By
doing so one level of indirection is removed and output drivers become
more flexible while keeping the majority of the advantages provided by
the common output helpers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:47 +01:00
Thierry Reding
3b0e585548 drm/tegra: rgb: Demidlayer
Implement encoder and connector within the RGB driver itself using the
Tegra output helpers rather than using the Tegra output as midlayer. By
doing so one level of indirection is removed and output drivers become
more flexible while keeping the majority of the advantages provided by
the common output helpers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:47 +01:00
Thierry Reding
c5a107d327 drm/tegra: Add tegra_dc_setup_clock() helper
This is a small helper that performs the basic steps required by all
output drivers to prepare the display controller for use with a given
encoder.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:46 +01:00
Thierry Reding
d5bae6f33e drm/tegra: output: Make ->setup_clock() optional
In order to transition output drivers to using the struct tegra_output
as a helper rather than midlayer, make this callback optional. Instead
drivers should implement the equivalent as part of ->mode_fixup(). For
the conversion to atomic modesetting a new callback ->atomic_check()
should be implemented that updates the display controller's state with
the corresponding parent clock, rate and shift clock divider.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:46 +01:00
Thierry Reding
132085d84f drm/tegra: Convert output midlayer to helpers
The output layer was initially designed to help reduce the amount of
code duplicated in output drivers. An unfortunate side-effect of that
was that it turned into a midlayer and it became difficult to make the
output drivers work without bending over backwards to fit into the
midlayer.

This commit starts to convert the midlayer into a helper library by
exporting most of the common functions so that they can be used by the
output drivers directly. Doing so will allow output drivers to reuse
common code paths but more easily override them where necessary.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:45 +01:00
Thierry Reding
50a246aa13 drm/tegra: dc: No longer disable planes at CRTC disable
The DRM core should take care of disabling all unneeded planes, so there
is no need to do this explicitly.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:45 +01:00
Thierry Reding
f991421490 drm/tegra: Move tegra_drm_mode_funcs to the core
This structure will be extended using non-framebuffer related callbacks
in subsequent patches, so it should move to a more central location.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:44 +01:00
Thierry Reding
86df256f30 drm/tegra: dc: Wait for idle when disabled
When disabling the display controller, stop it and wait for it to become
idle. Doing so ensures that no further accesses to the framebuffer occur
and the buffers can be safely unmapped or freed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:43 +01:00
Thierry Reding
36904adf21 drm/tegra: Stop CRTC at CRTC disable time
Previously output drivers would all stop the display controller in their
disable path. However with the transition to atomic modesetting the
display controller needs to be kept running until all planes have been
disabled so that software can properly determine (using VBLANK counts)
when it is safe to remove the framebuffers associated with the planes.

Moving this code into the display controller's disable path also gets
rid of the duplication of this into all output drivers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:43 +01:00
Thierry Reding
62b9e06321 drm/tegra: Use tegra_commit_dc() in output drivers
All output drivers have open-coded variants of this function, so export
it to remove some code duplication.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:43 +01:00
Dan Carpenter
2cb207e413 drm/tegra: gem: oops in error handling
kfree(ERR_PTR(-ENOMEM)) will not work very well.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:41 +01:00
Dan Carpenter
8643bc6d8e drm/tegra: dc: Fix bad irqsave/restore in tegra_dc_finish_page_flip()
We can't save two values to the IRQ flags at the same time so the IRQs
are not enabled at the end.  This kind of bug is easy to miss in testing
if the function is normally called with IRQs disabled so we wouldn't
enable IRQs anyway.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:40 +01:00
David Ung
2dafd63682 drm/tegra: dsi: Adjust D-PHY timing
Compliance testing shows that HS Trail is off by -12%. Increase the HS
Trail time to make this test pass.

Signed-off-by: David Ung <davidu@nvidia.com>
[treding@nvidia.com: update specification references, add comment]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:40 +01:00
Thierry Reding
201106d83e drm/tegra: dsi: Reset across ->exit()/->init()
This allows a DRM driver unload/reload cycle to completely reset the DSI
controller and may help in situations where it's broken.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:39 +01:00
Thierry Reding
92f0e073ed drm/tegra: dsi: Soft-reset controller on ->disable
This reset is necessary to properly clean up the internal state of the
controller.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:39 +01:00
Thierry Reding
9c0b4ca112 drm/tegra: dsi: Registers are 32-bit
Use a sized unsigned 32-bit data type (u32) to store register contents.
The DSI registers are 32 bits wide irrespective of the architecture's
data width.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:38 +01:00
Thierry Reding
4ee8cee0c5 drm/tegra: hdmi: Registers are 32-bit
Use a sized unsigned 32-bit data type (u32) to store register contents.
The HDMI registers are 32 bits wide irrespective of the architecture's
data width.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:37 +01:00
Thierry Reding
fb35c6b60e drm/tegra: dc: Return planar flag for non-YUV modes
This prevents the compiler from warning about using a variable that is
possibly uninitialized.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:37 +01:00
Thierry Reding
d700ba7a66 drm/tegra: dc: Describe register copies
Most of the display controller's registers are double-buffered, a few of
them are triple-buffered. The ASSEMBLY shadow copy is latched intto the
ACTIVE copy for double-buffered registers. For triple-buffered registers
the ASSEMBLY copy is first latched into the ARM copy.

Latching into the ACTIVE copy happens immediately if the controller is
inactive. Otherwise the latching happens on the next frame boundary. The
latching of the ASSEMBLY into the ARM copy happens immediately. Latching
is controlled by a set of *_ACT_REQ and *_UPDATE bits in the
DC_CMD_STATE_CONTROL register.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:37 +01:00
Thierry Reding
42d0659ba7 drm/tegra: dc: Initialize border color
Tegra114 and earlier support specifying the color of the border (i.e.
the active area of the screen that is not covered by any of the overlay
windows). By default this is set to a light blue, so set it to black to
comply with the requirements set by atomic modesetting.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:36 +01:00
Dan Carpenter
bf19b885f9 drm/tegra: Check for NULL pointer instead of IS_ERR()
iommu_domain_alloc() returns NULL on error, it never returns error
pointers.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:36 +01:00
Thierry Reding
518e6227af drm/tegra: plane: Use proper possible_crtcs mask
The possible_crtcs mask needs to be a mask of CRTC indices. There is no
guarantee that the DRM indices match the hardware pipe number, so the
mask must be computed from the CRTC index.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:35 +01:00
Thierry Reding
aa942f6ac4 drm/tegra: Remove redundant zeroing out of memory
The DRM core now zeroes out the memory associated with CRTC, encoder and
connector objects upon cleanup, so there's no need to explicitly do that
in drivers anymore.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:34 +01:00
Thierry Reding
8c8cb58ed6 drm/tegra: gem: Use iommu_map_sg()
The iommu_map_sg() function is now available in the IOMMU API, so drop
the open-coded variant.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:34 +01:00
Thierry Reding
f4c5cf88fb gpu: host1x: Provide a proper struct bus_type
Previously the struct bus_type exported by the host1x infrastructure was
only a very basic skeleton. Turn that implementation into a more full-
fledged bus to support proper probe ordering and power management.

Note that the bus infrastructure needs to be available before any of the
drivers can be registered. This is automatically ensured if all drivers
are built as loadable modules (via symbol dependencies). If all drivers
are built-in there are no such guarantees and the link order determines
the initcall ordering. Adjust drivers/gpu/Makefile to make sure that the
host1x bus infrastructure is initialized prior to any of its users (only
drm/tegra currently).

v2: Fix building host1x and tegra-drm as modules
    Reported-by: Dave Airlie <airlied@gmail.com>

Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Mark Zhang <markz@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:09:14 +01:00
Dave Airlie
e5202a2289 Merge tag 'topic/core-stuff-2014-12-19' of git://anongit.freedesktop.org/drm-intel into drm-next
Misc drm patches with mostly polish patches from Thierry, with a bit of
generic mode validation from Ville and a few other oddball things.

* tag 'topic/core-stuff-2014-12-19' of git://anongit.freedesktop.org/drm-intel: (25 commits)
  drm: Include drm_crtc_helper.h in DocBook
  drm: Make drm_crtc_helper.h standalone includible
  drm: Move IRQ related fields to proper section
  drm: Remove stale comment
  drm: Do basic sanity checks for user modes
  drm: Perform basic sanity checks on probed modes
  drm: Reorganize probed mode validation
  drm/doc: Remove duplicate "by"
  drm/info: Remove unused code
  drm/cache: Use wbinvd helpers
  drm/plane-helper: Test for plane disable earlier
  drm/doc: Document drm_add_modes_noedid() usage
  drm: bit of spell-check / editorializing.
  drm: Prefer sizeof(type) over sizeof type
  drm: Remove useless else block
  drm: Remove unneeded braces for single statement blocks
  drm: Do not assign in if condition
  drm: Prefer kmalloc_array() over kmalloc() with multiply
  drm: Prefer kcalloc() over kzalloc() with multiply
  drm: Miscellaneous checkpatch whitespace cleanups
  ...
2015-01-09 09:13:41 +10:00
Sean Paul
93396d0f9c drm/tegra: dc: Select root window for event dispatch
In finish pageflip, the driver was not selecting the root window when
dispatching events. This exposed a race where a plane update would
change the window selection and cause tegra_dc_finish_page_flip to check
the wrong base address.

This patch also protects access to the window selection register as well
as the registers affected by it.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-12-17 14:27:39 +01:00