Commit Graph

837591 Commits

Author SHA1 Message Date
Enric Balletbo i Serra
93abf68b6b mfd: cros_ec: Update the EC feature codes
Update the feature enum for the Chromebook Embedded Controller to the
latest version. Some of these enums are still not used in the kernel but
we might be also interested on have these enums up to date. Userspace
can use them to query the features to the EC via the cros-ec character
device.

While here, also fix a typo in one comment in the enum.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:27 +01:00
Andy Shevchenko
dd6629073a mfd: intel-lpss: Add Intel Comet Lake PCI IDs
Intel Comet Lake has the same LPSS than Intel Cannon Lake.
Add the new IDs to the list of supported devices.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Tested-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:27 +01:00
Charles Keepax
c273e63129 mfd: lochnagar: Add links to binding docs for sound and hwmon
Lochnagar is an evaluation and development board for Cirrus
Logic Smart CODEC and Amp devices. It allows the connection of
most Cirrus Logic devices on mini-cards, as well as allowing
connection of various application processor systems to provide a
full evaluation platform. This driver supports the board
controller chip on the Lochnagar board.

Add links to the binding documents for the new sound and hardware
monitor parts of the driver.

Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:27 +01:00
Jonathan Neuschäfer
38a3227151 mfd: ab8500-debugfs: Fix a typo ("deubgfs")
"debugfs" was misspelled.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:27 +01:00
S.j. Wang
13d7294532 mfd: imx6sx: Add MQS register definition for iomuxc gpr
Add macros to define masks and bits for imx6sx MQS registers

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:27 +01:00
Dan Murphy
a2a0c4ef4e dt-bindings: mfd: LMU: Fix lm3632 dt binding example
Fix the lm3632 dt binding examples as the LCM enable GPIOs
are defined as enable GPIOs per the regulator/lm363x-regulator.txt
bindings document.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:27 +01:00
Su Bao Cheng
a9bf6aa699 mfd: intel_quark_i2c_gpio: Adjust IOT2000 matching
Since there are more IOT2040 variants with identical hardware but
different asset tags, the asset tag matching should be adjusted to
support them.

For the board name "SIMATIC IOT2000", currently there are 2 types of
hardware, IOT2020 and IOT2040. Both are identical regarding the
intel_quark_i2c_gpio. In the future there will be no other devices with
the "SIMATIC IOT2000" DMI board name but different hardware. So remove
the asset tag matching from this driver.

Signed-off-by: Su Bao Cheng <baocheng.su@siemens.com>
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:27 +01:00
Steve Twiss
6b4814a945 mfd: da9063: Fix OTP control register names to match datasheets for DA9063/63L
Mismatch between what is found in the Datasheets for DA9063 and DA9063L
provided by Dialog Semiconductor, and the register names provided in the
MFD registers file. The changes are for the OTP (one-time-programming)
control registers. The two naming errors are OPT instead of OTP, and
COUNT instead of CONT (i.e. control).

Cc: Stable <stable@vger.kernel.org>
Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:27 +01:00
Daniel Gomez
9e364e87ad mfd: tps65912-spi: Add missing of table registration
MODULE_DEVICE_TABLE(of, <of_match_table> should be called to complete DT
OF mathing mechanism and register it.

Before this patch:
modinfo drivers/mfd/tps65912-spi.ko | grep alias
alias:          spi:tps65912

After this patch:
modinfo drivers/mfd/tps65912-spi.ko | grep alias
alias:          of:N*T*Cti,tps65912C*
alias:          of:N*T*Cti,tps65912
alias:          spi:tps65912

Reported-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Daniel Gomez <dagmcr@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:27 +01:00
Chen-Yu Tsai
e7037d75ac mfd: axp20x: Add USB power supply mfd cell to AXP803
The AXP803 has a VBUS power input. Its functionality is the same as the
one found in the AXP813. Now that the axp20x_usb_power driver supports
this variant, we can add an mfd cell for it to use it.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:27 +01:00
Arnd Bergmann
8ca6ff16de mfd: sun6i-prcm: Fix build warning for non-OF configurations
When CONFIG_OF is disabled, we get a harmless warning about an
unused variable:

drivers/mfd/sun6i-prcm.c: In function 'sun6i_prcm_probe':
drivers/mfd/sun6i-prcm.c:151:22: error: unused variable 'np' [-Werror=unused-variable]

Remove the variable and open-code the value in the only place
it is used, so it can get left out as well without CONFIG_OF.

Fixes: a05a2e7998 ("mfd: sun6i-prcm: Allow to compile with COMPILE_TEST")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:27 +01:00
Binbin Wu
dad0653229 mfd: intel-lpss: Set the device in reset state when init
In virtualized setup, when system reboots due to warm
reset interrupt storm is seen.

Call Trace:
<IRQ>
dump_stack+0x70/0xa5
__report_bad_irq+0x2e/0xc0
note_interrupt+0x248/0x290
? add_interrupt_randomness+0x30/0x220
handle_irq_event_percpu+0x54/0x80
handle_irq_event+0x39/0x60
handle_fasteoi_irq+0x91/0x150
handle_irq+0x108/0x180
do_IRQ+0x52/0xf0
common_interrupt+0xf/0xf
</IRQ>
RIP: 0033:0x76fc2cfabc1d
Code: 24 28 bf 03 00 00 00 31 c0 48 8d 35 63 77 0e 00 48 8d 15 2e
94 0e 00 4c 89 f9 49 89 d9 4c 89 d3 e8 b8 e2 01 00 48 8b 54 24 18
<48> 89 ef 48 89 de 4c 89 e1 e8 d5 97 01 00 84 c0 74 2d 48 8b 04
24
RSP: 002b:00007ffd247c1fc0 EFLAGS: 00000293 ORIG_RAX: ffffffffffffffda
RAX: 0000000000000000 RBX: 00007ffd247c1ff0 RCX: 000000000003d3ce
RDX: 0000000000000000 RSI: 00007ffd247c1ff0 RDI: 000076fc2cbb6010
RBP: 000076fc2cded010 R08: 00007ffd247c2210 R09: 00007ffd247c22a0
R10: 000076fc29465470 R11: 0000000000000000 R12: 00007ffd247c1fc0
R13: 000076fc2ce8e470 R14: 000076fc27ec9960 R15: 0000000000000414
handlers:
[<000000000d3fa913>] idma64_irq
Disabling IRQ #27

To avoid interrupt storm, set the device in reset state
before bringing out the device from reset state.

Changelog v2:
- correct the subject line by adding "mfd: "

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:27 +01:00
Evan Green
7235560ac7 platform/chrome: Add support for v1 of host sleep event
Add support in code for the new forms of the host sleep event.
Detects the presence of this version of the command at runtime,
and use whichever form the EC supports. At this time, always
request the default timeout, and only report the failing response
via a WARN_ONCE(). Future versions could accept the sleep parameter
from outside the driver, and return the response information to
usermode or elsewhere.

Signed-off-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Rajat Jain <rajatja@chromium.org>
Reviewed-by: Guenter Roeck <groeck@chromium.org>
Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:27 +01:00
Evan Green
afe2bb5c4b mfd: cros_ec: Add host_sleep_event_v1 command
Introduce the command and response structures for the second revision
of the host sleep event. These structures are part of a new EC change
that enables detection of failure to enter S0ix. The EC waits a
kernel-specified timeout (or a default amount of time) for the S0_SLP
pin to change, and wakes the system if that change does not occur in
time.

Signed-off-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Rajat Jain <rajatja@chromium.org>
Reviewed-by: Guenter Roeck <groeck@chromium.org>
Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:26 +01:00
Enric Balletbo i Serra
49a65e3c27 mfd: cros_ec: Instantiate the CrOS USB PD logger driver
Add the cros-usbpd-logger driver for logging event data for the USB PD
charger available in the Embedded Controller on ChromeOS systems. The
logging feature is logically separate functionality from charge manager,
hence is instantiated as a different driver.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Guenetr Roeck <linux@roeck-us.net>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:26 +01:00
Ajit Pandey
178bc6b87a mfd: cs47l90: Make DAC_AEC_CONTROL_2 readable
There is a second AEC loopback on cs47l90 so the registers for it should
be readable.

Signed-off-by: Ajit Pandey <ajit.pandey@cirrus.com>
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:26 +01:00
Richard Fitzgerald
801f0da9b7 mfd: cs47l35: Make DAC_AEC_CONTROL_2 readable
There is a second AEC loopback on cs47l35 so the registers for it should
be readable.

Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:26 +01:00
Tudor Ambarus
993c0ba7e4 mfd: syscon: atmel: Switch to SPDX license identifiers
Adopt the SPDX license identifiers to ease license compliance
management.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:26 +01:00
Wolfram Sang
c6b9605f5e mfd: da9063: Remove platform_data support
There are no in-kernel users anymore, so remove this outdated interface.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Steve Twiss <stwiss.opensource@diasemi.com>
Tested-by: Steve Twiss <stwiss.opensource@diasemi.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:26 +01:00
Wolfram Sang
9efbc6f175 mfd: da9063: Convert headers to SPDX
Covnert the headers of the source and include files to SPDX.
And fix some typos in the descriptions ("interrupt" instead of "I2C").

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Steve Twiss <stwiss.opensource@diasemi.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:26 +01:00
Maxime Ripard
4f799e47ad mfd: axp20x: Allow the AXP223 to be probed by I2C
The AXP223 can be used both using the RSB proprietary bus, or a more
traditional I2C bus. The RSB is a faster bus and provides more features
(like some integrity checks on the messages), so it's usually preferrable
to use it, but since it's proprietary, when we want to use the PMIC in a
multi-master setup, the i2c might make sense as well.

Let's add that possibility.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:26 +01:00
Tony Xie
54349b3ce8 mfd: rk808: Remove the id_table
Remove the id_table because it's not used.

Signed-off-by: Tony Xie <tony.xie@rock-chips.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:26 +01:00
Rushikesh S Kadam
d4cee9509e mfd: cros_ec: Instantiate properly CrOS ISH MCU device
Integrated Sensor Hub (ISH) is also a MCU running EC
having feature bit EC_FEATURE_ISH. Instantiate it as
a special CrOS EC device with device name 'cros_ish'.

Signed-off-by: Rushikesh S Kadam <rushikesh.s.kadam@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:26 +01:00
Claudiu Beznea
730080a758 dt-bindings: mfd: Add bindings for SAM9X60 HLCD controller
Add new compatible string for the HLCD controller on SAM9X60 SoC.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:26 +01:00
Claudiu Beznea
1e8c158561 mfd: atmel-hlcdc: Add compatible for SAM9X60 HLCD controller
Add compatible for SAM9X60 HLCD controller.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:26 +01:00
Enrico Weigelt, metux IT consult
2cd0ee3b1d mfd: Kconfig: Pedantic formatting
Formatting of Kconfig files doesn't look so pretty, so let the
Great White Handkerchief come around and clean it up.

Signed-off-by: Enrico Weigelt, metux IT consult <info@metux.net>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:25 +01:00
Quentin Schulz
129fc67785 mfd: axp20x: Add USB power supply mfd cell to AXP813
The AXP813 has a VBUS power input. Now that the axp20x_usb_power driver
supports this variant, we can add an mfd cell for it to use it.

Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
[wens@csie.org: add commit message]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:25 +01:00
Tony Lindgren
48171d0ea7 mfd: twl6040: Fix device init errors for ACCCTL register
I noticed that we can get a -EREMOTEIO errors on at least omap4 duovero:

twl6040 0-004b: Failed to write 2d = 19: -121

And then any following register access will produce errors.

There 2d offset above is register ACCCTL that gets written on twl6040
powerup. With error checking added to the related regcache_sync() call,
the -EREMOTEIO error is reproducable on twl6040 powerup at least
duovero.

To fix the error, we need to wait until twl6040 is accessible after the
powerup. Based on tests on omap4 duovero, we need to wait over 8ms after
powerup before register write will complete without failures. Let's also
make sure we warn about possible errors too.

Note that we have twl6040_patch[] reg_sequence with the ACCCTL register
configuration and regcache_sync() will write the new value to ACCCTL.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:25 +01:00
Fabrice Gasnier
a00406b71c mfd: syscon: Add optional clock support
Some system control registers need to be clocked, so the registers can
be accessed. Add an optional clock and attach it to regmap.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:25 +01:00
Fabrice Gasnier
c6ba08819b dt-bindings: stm32: syscon: Add clock support
STM32 system configuration controller registers needs to be clocked.
Document clock support on stm32-syscon.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:25 +01:00
Stuart Menefy
ec85d4a10e mfd: sec: Add support for the RTC on S2MPA01
The RTC portion of the S2MPA01 appears to have the same
register layout as the S2MPS14.

Signed-off-by: Stuart Menefy <stuart.menefy@mathembedded.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:25 +01:00
Stuart Menefy
f01faec625 mfd: sec: Put one element structure initialisation on one line
Change the layout of the initialisation of structures with one
element to a single line of code. This keeps the coding style
consistent.

Signed-off-by: Stuart Menefy <stuart.menefy@mathembedded.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:25 +01:00
Yauhen Kharuzhy
236c765d6a mfd: intel_soc_pmic_chtwc: Register LED child device
Add MFD cell for LEDs driver to the Intel Cherry Trail Whiskey Cove PMIC
mfd device driver.

Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-05-14 08:13:25 +01:00
Lee Jones
60a7a9a249 Immutable branch between MFD, ARM and Net due for the 5.2 merge window
-----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEdrbJNaO+IJqU8IdIUa+KL4f8d2EFAlyjBD8ACgkQUa+KL4f8
 d2EpUw/+KZuPkcazjIvRTqWkzk3UcoEfZF79vP2qJbHSXMTcBJTdCM1Ahm7thwii
 2mhtXlBFk8PPtwlVhhggfkY5a3+InozsiAL7qn7GyYyaxk7KHHInG0YQTStHW8Zl
 IOmuo+WFmpAEXJ1vPSJN0xCwiK8BtEpbSenBN6v7OXA+PgRTKIuvTN4ZB3pP9c2Q
 bTT3uB9uCibSP+H+NvMJR1TRtnQUcBevle8qUqK9Y/HTiq2T+KKDMBqs+J4DyGuZ
 pJ2bNziJDGY9AXXO3ndPW7WYoXmRjZMOFZXYegP8uKOD1dRm/OebBZI6raLSreq2
 OcFDLFsdeU5GTc/OcoIITz8GpTbvGQoh0j5F7a1BKflj7GRcvvu8key3onh3V85m
 G6vTdrZhN9Bw2G80KTkCOPGcztCWKxIlU+Xn9er7Q1u1qacx/IYUBf1PjjvP+ZCO
 FY/jJfVf6PiTVkiStdHzras3PYjj+RHUWM83NKw9F9T8ZdLJOd3myd5Zcfa2dJf2
 I/BqsH3JYWLIHOjdcpMLe+FwG2gMKiM0WDpqPYUzjokM6tRfShO/n9SSj/mNcv7J
 64szoH53c841nUAWTE2v/E0n+UB2LGCFkyZlA1NgEMwV3a2wLuNJYYDe4Fj0Y/Fp
 ydiYOa3H3PtFFIRmp+kZu5YWpTNazmf3Obteu/F6l644Yik5d+Q=
 =55X1
 -----END PGP SIGNATURE-----

Merge branches 'ib-mfd-arm-leds-5.2', 'ib-mfd-gpio-input-leds-power-5.2', 'ib-mfd-pinctrl-5.2-2' and 'ib-mfd-regulator-5.2', tag 'ib-mfd-arm-net-5.2' into ibs-for-mfd-merged

Immutable branch between MFD, ARM and Net due for the 5.2 merge window
2019-05-14 08:09:23 +01:00
Bjorn Helgaas
c7a1c2bbb6 Merge branch 'pci/trivial'
- Cleanup PCI register definitions, typos, etc (Bjorn Helgaas)

  - Remove unnecessary use of user-space types in CPER (Bjorn Helgaas)

  - Cleanup setup-bus.c comments & whitespace (Nicholas Johnson)

* pci/trivial:
  PCI: Cleanup setup-bus.c comments and whitespace
  CPER: Remove unnecessary use of user-space types
  CPER: Add UEFI spec references
  PCI: Fix comment typos
  PCI: Cleanup register definition width and whitespace

# Conflicts:
#	drivers/pci/pci.c
#	drivers/pci/setup-bus.c
2019-05-13 18:34:48 -05:00
Bjorn Helgaas
f8587c80c6 Merge branch 'pci/printk-portdrv'
- Change some desirable KERN_DEBUG messages to KERN_INFO/KERN_ERR
    (Frederick Lawler)

  - Log PCIe port service messages with pci_dev, not the pcie_device
    (Frederick Lawler)

  - Convert pciehp from pciehp_debug module parameter to generic dynamic
    debug (Frederick Lawler)

* pci/printk-portdrv:
  PCI: pciehp: Remove pointless MY_NAME definition
  PCI: pciehp: Remove pointless PCIE_MODULE_NAME definition
  PCI: pciehp: Remove unused dbg/err/info/warn() wrappers
  PCI: pciehp: Log messages with pci_dev, not pcie_device
  PCI: pciehp: Replace pciehp_debug module param with dyndbg
  PCI: pciehp: Remove pciehp_debug uses
  PCI/AER: Log messages with pci_dev, not pcie_device
  PCI/DPC: Log messages with pci_dev, not pcie_device
  PCI/PME: Replace dev_printk(KERN_DEBUG) with dev_info()
  PCI/AER: Replace dev_printk(KERN_DEBUG) with dev_info()
2019-05-13 18:34:47 -05:00
Bjorn Helgaas
192415f498 Merge branch 'pci/printk'
* pci/printk:
  PCI: Replace dev_printk(KERN_DEBUG) with dev_info(), etc
  PCI: Replace printk(KERN_INFO) with pr_info(), etc
  PCI: Use dev_printk() when possible
2019-05-13 18:34:46 -05:00
Bjorn Helgaas
f2e9468316 Merge branch 'pci/iova-dma-ranges'
- Add list of legal DMA address ranges to PCI host bridge (Srinath
    Mannam)

  - Reserve inaccessible DMA ranges so IOMMU doesn't allocate them (Srinath
    Mannam)

  - Parse iProc DT dma-ranges to learn what PCI devices can reach via DMA
    (Srinath Mannam)

* pci/iova-dma-ranges:
  PCI: iproc: Add sorted dma ranges resource entries to host bridge
  iommu/dma: Reserve IOVA for PCIe inaccessible DMA address
  PCI: Add dma_ranges window list

# Conflicts:
#	drivers/pci/probe.c
2019-05-13 18:34:45 -05:00
Bjorn Helgaas
ee6df38da8 Merge branch 'remotes/lorenzo/pci/misc'
- Exit pcitest with error code when test fails (Jean-Jacques Hiblot)

  - Fix leaked of_node references in dra7xx, uniphier, layerscape,
    rockchip, aardvark, iproc, mediatek, rpadlpar (Wen Yang)

  - Fix pcitest "help" option parsing (Kishon Vijay Abraham I)

  - Fix Makefile bug that inadvertently removes pcitest.sh (Kishon Vijay
    Abraham I)

  - Check for alloc_workqueue() failure in endpoint test driver (Kangjie
    Lu)

* remotes/lorenzo/pci/misc:
  PCI: endpoint: Fix a potential NULL pointer dereference
  tools: PCI: Handle pcitest.sh independently from pcitest
  tools: PCI: Add 'h' in optstring of getopt()
  PCI: mediatek: Fix a leaked reference by adding missing of_node_put()
  PCI: iproc: Fix a leaked reference by adding missing of_node_put()
  PCI: aardvark: Fix a leaked reference by adding missing of_node_put()
  PCI: rockchip: Fix a leaked reference by adding missing of_node_put()
  PCI: dwc: layerscape: Fix a leaked reference by adding missing of_node_put()
  PCI: uniphier: Fix a leaked reference by adding missing of_node_put()
  PCI: dwc: pci-dra7xx: Fix a leaked reference by adding missing of_node_put()
  tools: PCI: Exit with error code when test fails
2019-05-13 18:34:44 -05:00
Bjorn Helgaas
ed0eaf3205 Merge branch 'remotes/lorenzo/pci/xilinx'
- Check for __get_free_pages() failure in xilinx (Kangjie Lu)

* remotes/lorenzo/pci/xilinx:
  PCI: xilinx: Check for __get_free_pages() failure
2019-05-13 18:34:44 -05:00
Bjorn Helgaas
cdf4315502 Merge branch 'remotes/lorenzo/pci/tegra'
- Use DMA-API to get tegra MSI address to prevent device DMA from
    generating unwanted MSIs (Vidya Sagar)

* remotes/lorenzo/pci/tegra:
  PCI: tegra: Use the DMA-API to get the MSI address
2019-05-13 18:34:43 -05:00
Bjorn Helgaas
673525c5c2 Merge branch 'remotes/lorenzo/pci/rockchip'
- Fix rockchip bitwise operations that overflow type (Colin Ian King)

* remotes/lorenzo/pci/rockchip:
  PCI: rockchip: Fix rockchip_pcie_ep_assert_intx() bitwise operations
2019-05-13 18:34:43 -05:00
Bjorn Helgaas
bac9789e53 Merge branch 'remotes/lorenzo/pci/rcar'
- Use BIT() when appropriate in rcar (Marek Vasut)

  - Use u32 to match rcar hardware register widths (Marek Vasut)

  - Use BITS_PER_BYTE when appropriate in rcar (Marek Vasut)

  - Remove unnecessary casts in rcar (Marek Vasut)

  - Fix 64-bit MSI target addresses in rcar (Marek Vasut)

  - Check for __get_free_pages() failure in rcar (Kangjie Lu)

  - Fix shadowed rcar "irq" variable (Wolfram Sang)

* remotes/lorenzo/pci/rcar:
  PCI: rcar: Do not shadow the 'irq' variable
  PCI: rcar: Fix a potential NULL pointer dereference
  PCI: rcar: Fix 64bit MSI message address handling
  PCI: rcar: Clean up debug messages
  PCI: rcar: Replace (8 * n) with (BITS_PER_BYTE * n)
  PCI: rcar: Replace various variable types with unsigned ones for register values
  PCI: rcar: Replace unsigned long with u32/unsigned int in register accessors
  PCI: rcar: Clean up remaining macros defining bits

# Conflicts:
#	drivers/pci/controller/pcie-rcar.c
2019-05-13 18:34:42 -05:00
Bjorn Helgaas
fb8a85fabd Merge branch 'remotes/lorenzo/pci/mediatek'
- Make mediatek clocks optional, not required (Chunfeng Yun)

  - Remove unused mediatek mt2712 "num-lanes" DT property (Honghui Zhang)

* remotes/lorenzo/pci/mediatek:
  arm64: dts: mt2712: Remove un-used property for PCIe
  PCI: mediatek: Get optional clocks with devm_clk_get_optional()
2019-05-13 18:34:41 -05:00
Bjorn Helgaas
0b8439d374 Merge branch 'remotes/lorenzo/pci/keystone'
- Move IRQ register address computation inside macros (Kishon Vijay
    Abraham I)

  - Separate legacy IRQ and MSI configuration (Kishon Vijay Abraham I)

  - Use hwirq, not virq, to get MSI IRQ number offset (Kishon Vijay Abraham
    I)

  - Squash ks_pcie_handle_msi_irq() into ks_pcie_msi_irq_handler() (Kishon
    Vijay Abraham I)

  - Add dwc support for platforms with custom MSI controllers (Kishon Vijay
    Abraham I)

  - Add keystone-specific MSI controller (Kishon Vijay Abraham I)

  - Remove dwc host_ops previously used for keystone-specific MSI (Kishon
    Vijay Abraham I)

  - Skip dwc default MSI init if platform has custom MSI controller (Kishon
    Vijay Abraham I)

  - Implement .start_link() and .stop_link() for keystone endpoint support
    (Kishon Vijay Abraham I)

  - Add keystone "reg-names" DT binding (Kishon Vijay Abraham I)

  - Squash ks_pcie_dw_host_init() into ks_pcie_add_pcie_port() (Kishon
    Vijay Abraham I)

  - Get keystone register resources from DT by name, not index (Kishon
    Vijay Abraham I)

  - Get DT resources in .probe() to prepare for endpoint support (Kishon
    Vijay Abraham I)

  - Add "ti,syscon-pcie-mode" DT property for PCIe mode configuration
    (Kishon Vijay Abraham I)

  - Explicitly set keystone to host mode (Kishon Vijay Abraham I)

  - Document DT "atu" reg-names requirement for DesignWare core >= 4.80
    (Kishon Vijay Abraham I)

  - Enable dwc iATU unroll for endpoint mode as well as host mode (Kishon
    Vijay Abraham I)

  - Add dwc "version" to identify core >= 4.80 for ATU programming (Kishon
    Vijay Abraham I)

  - Don't build ARM32-specific keystone code on ARM64 (Kishon Vijay Abraham
    I)

  - Add DT binding for keystone PCIe RC in AM654 SoC (Kishon Vijay Abraham
    I)

  - Add keystone support for AM654 SoC PCIe RC (Kishon Vijay Abraham I)

  - Reset keystone PHYs before enabling them (Kishon Vijay Abraham I)

  - Make of_pci_get_max_link_speed() available to endpoint drivers as well
    as host drivers (Kishon Vijay Abraham I)

  - Add keystone support for DT "max-link-speed" property (Kishon Vijay
    Abraham I)

  - Add endpoint library support for BAR buffer alignment (Kishon Vijay
    Abraham I)

  - Make all dw_pcie_ep_ops structs const (Kishon Vijay Abraham I)

  - Fix fencepost error in dw_pcie_ep_find_capability() (Kishon Vijay
    Abraham I)

  - Add dwc hooks for dbi/dbi2 that share the same address space (Kishon
    Vijay Abraham I)

  - Add keystone support for TI AM654x in endpoint mode (Kishon Vijay
    Abraham I)

  - Configure designware endpoints to advertise smallest resizable BAR
    (1MB) (Kishon Vijay Abraham I)

  - Align designware endpoint ATU windows for raising MSIs (Kishon Vijay
    Abraham I)

  - Add endpoint test support for TI AM654x (Kishon Vijay Abraham I)

  - Fix endpoint test test_reg_bar issue (Kishon Vijay Abraham I)

* remotes/lorenzo/pci/keystone:
  misc: pci_endpoint_test: Fix test_reg_bar to be updated in pci_endpoint_test
  misc: pci_endpoint_test: Add support to test PCI EP in AM654x
  PCI: designware-ep: Use aligned ATU window for raising MSI interrupts
  PCI: designware-ep: Configure Resizable BAR cap to advertise the smallest size
  PCI: keystone: Add support for PCIe EP in AM654x Platforms
  dt-bindings: PCI: Add PCI EP DT binding documentation for AM654
  PCI: dwc: Add callbacks for accessing dbi2 address space
  PCI: dwc: Fix dw_pcie_ep_find_capability() to return correct capability offset
  PCI: dwc: Add const qualifier to struct dw_pcie_ep_ops
  PCI: endpoint: Add support to specify alignment for buffers allocated to BARs
  PCI: keystone: Add support to set the max link speed from DT
  PCI: OF: Allow of_pci_get_max_link_speed() to be used by PCI Endpoint drivers
  PCI: keystone: Invoke phy_reset() API before enabling PHY
  PCI: keystone: Add support for PCIe RC in AM654x Platforms
  dt-bindings: PCI: Add PCI RC DT binding documentation for AM654
  PCI: keystone: Prevent ARM32 specific code to be compiled for ARM64
  PCI: dwc: Fix ATU identification for designware version >= 4.80
  PCI: dwc: Enable iATU unroll for endpoint too
  dt-bindings: PCI: Document "atu" reg-names
  PCI: keystone: Explicitly set the PCIe mode
  dt-bindings: PCI: Add dt-binding to configure PCIe mode
  PCI: keystone: Move resources initialization to prepare for EP support
  PCI: keystone: Use platform_get_resource_byname() to get memory resources
  PCI: keystone: Perform host initialization in a single function
  dt-bindings: PCI: keystone: Add "reg-names" binding information
  PCI: keystone: Cleanup error_irq configuration
  PCI: keystone: Add start_link()/stop_link() dw_pcie_ops
  PCI: dwc: Remove default MSI initialization for platform specific MSI chips
  PCI: dwc: Remove Keystone specific dw_pcie_host_ops
  PCI: keystone: Use Keystone specific msi_irq_chip
  PCI: dwc: Add support to use non default msi_irq_chip
  PCI: keystone: Cleanup ks_pcie_msi_irq_handler()
  PCI: keystone: Use hwirq to get the MSI IRQ number offset
  PCI: keystone: Add separate functions for configuring MSI and legacy interrupt
  PCI: keystone: Cleanup interrupt related macros

# Conflicts:
#	drivers/pci/controller/dwc/pcie-designware.h
2019-05-13 18:34:41 -05:00
Bjorn Helgaas
b138f67d7b Merge branch 'remotes/lorenzo/pci/iproc'
- Work around iproc CRS completion issues (Srinath Mannam)

  - Allow smaller iproc outbound windows so driver can work on 32-bit
    systems (Srinath Mannam)

  - Use iproc-specific config read for PAXBv2 (not PAXB) (Srinath Mannam)

* remotes/lorenzo/pci/iproc:
  PCI: iproc: Enable iProc config read for PAXBv2
  PCI: iproc: Allow outbound configuration for 32-bit I/O region
  PCI: iproc: Add CRS check in config read
2019-05-13 18:34:39 -05:00
Bjorn Helgaas
5349abcf8e Merge branch 'remotes/lorenzo/pci/imx'
- Simplify imx7d_pcie_wait_for_phy_pll_lock() by using
    regmap_read_poll_timeout() (Andrey Smirnov)

  - Drop imx6_pcie_wait_for_link() in favor of the more generic
    dw_pcie_wait_for_link() (Andrey Smirnov)

  - Return -ETIMEDOUT instead of -EINVAL from
    imx6_pcie_wait_for_speed_change() (Andrey Smirnov)

  - Remove unused PCIE_PL_PFLR_* constants from imx6 (Andrey Smirnov)

  - Use shared PHY debug register definitions in imx6 (Andrey Smirnov)

  - Use BIT() in imx6 (Andrey Smirnov)

  - Simplify imx6 PHY bit operations (Andrey Smirnov)

  - Simplify imx6 pcie_phy_poll_ack() (Andrey Smirnov)

  - Use data types that match actual imx6 PHY register width (Andrey
    Smirnov)

  - Mark imx6 suspend support with drvdata flags instead of checking
    variants (Andrey Smirnov)

  - Sleep instead of delay in imx6_pcie_enable_ref_clk() (Andrey Smirnov)

* remotes/lorenzo/pci/imx:
  PCI: imx6: Use usleep_range() in imx6_pcie_enable_ref_clk()
  PCI: imx6: Use flags to indicate support for suspend
  PCI: imx6: Restrict PHY register data to 16-bit
  PCI: imx6: Simplify pcie_phy_poll_ack()
  PCI: imx6: Simplify bit operations in PHY functions
  PCI: imx6: Make use of BIT() in constant definitions
  PCI: dwc: imx6: Share PHY debug register definitions
  PCI: imx6: Remove PCIE_PL_PFLR_* constants
  PCI: imx6: Return -ETIMEOUT from imx6_pcie_wait_for_speed_change()
  PCI: imx6: Drop imx6_pcie_wait_for_link()
  PCI: imx6: Simplify imx7d_pcie_wait_for_phy_pll_lock()
2019-05-13 18:34:39 -05:00
Bjorn Helgaas
29fa3bbd6c Merge branch 'pci/dwc'
- Use generic config space reader in qcom (Marc Gonzalez)

  - Stop calling IRQ handler cleanup in dwc driver for invalid MSI IRQs
    (Jisheng Zhang)

  - Free dwc MSI target page when freeing MSI (Jisheng Zhang)

  - Fix dwc MSI leak in host init error path (Jisheng Zhang)

  - Use managed host bridge alloc to simplify dwc (Jisheng Zhang)

  - Save dwc root pci_bus pointer for use by .remove() methods (Jisheng
    Zhang)

  - Allow imx6 asynchronous probing (Lucas Stach)

* pci/dwc:
  PCI: imx6: Allow asynchronous probing
  PCI: dwc: Save root bus for driver remove hooks
  PCI: dwc: Use devm_pci_alloc_host_bridge() to simplify code
  PCI: dwc: Free MSI in dw_pcie_host_init() error path
  PCI: dwc: Free MSI IRQ page in dw_pcie_free_msi()
  PCI: dwc: Fix dw_pcie_free_msi() if msi_irq is invalid
  PCI: qcom: Use default config space read function
2019-05-13 18:34:38 -05:00
Bjorn Helgaas
4014eb8b61 Merge branch 'remotes/lorenzo/pci/controller-fixes'
- Restore R-Car PCIe link early in resume (Kazufumi Ikeda)

  - Fix Hyper-V PCI ejection memory leak (Dexuan Cui)

  - Cleanup Hyper-V PCI slots on module unload (Dexuan Cui)

  - Cleanup Hyper-V PCI slot on device removal to address a race (Dexuan
    Cui)

* remotes/lorenzo/pci/controller-fixes:
  PCI: hv: Add pci_destroy_slot() in pci_devices_present_work(), if necessary
  PCI: hv: Add hv_pci_remove_slots() when we unload the driver
  PCI: hv: Fix a memory leak in hv_eject_device_work()
  PCI: rcar: Add the initialization of PCIe link in resume_noirq()
2019-05-13 18:34:37 -05:00
Bjorn Helgaas
83d8235282 Merge branch 'pci/host/al'
- Add Amazon Annapurna Labs PCIe host controller driver (Jonathan
    Chocron)

* pci/host/al:
  PCI: al: Add Amazon Annapurna Labs PCIe host controller driver
2019-05-13 18:34:36 -05:00