Update the feature enum for the Chromebook Embedded Controller to the
latest version. Some of these enums are still not used in the kernel but
we might be also interested on have these enums up to date. Userspace
can use them to query the features to the EC via the cros-ec character
device.
While here, also fix a typo in one comment in the enum.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Intel Comet Lake has the same LPSS than Intel Cannon Lake.
Add the new IDs to the list of supported devices.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Tested-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Lochnagar is an evaluation and development board for Cirrus
Logic Smart CODEC and Amp devices. It allows the connection of
most Cirrus Logic devices on mini-cards, as well as allowing
connection of various application processor systems to provide a
full evaluation platform. This driver supports the board
controller chip on the Lochnagar board.
Add links to the binding documents for the new sound and hardware
monitor parts of the driver.
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Add macros to define masks and bits for imx6sx MQS registers
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Fix the lm3632 dt binding examples as the LCM enable GPIOs
are defined as enable GPIOs per the regulator/lm363x-regulator.txt
bindings document.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Since there are more IOT2040 variants with identical hardware but
different asset tags, the asset tag matching should be adjusted to
support them.
For the board name "SIMATIC IOT2000", currently there are 2 types of
hardware, IOT2020 and IOT2040. Both are identical regarding the
intel_quark_i2c_gpio. In the future there will be no other devices with
the "SIMATIC IOT2000" DMI board name but different hardware. So remove
the asset tag matching from this driver.
Signed-off-by: Su Bao Cheng <baocheng.su@siemens.com>
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Mismatch between what is found in the Datasheets for DA9063 and DA9063L
provided by Dialog Semiconductor, and the register names provided in the
MFD registers file. The changes are for the OTP (one-time-programming)
control registers. The two naming errors are OPT instead of OTP, and
COUNT instead of CONT (i.e. control).
Cc: Stable <stable@vger.kernel.org>
Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
MODULE_DEVICE_TABLE(of, <of_match_table> should be called to complete DT
OF mathing mechanism and register it.
Before this patch:
modinfo drivers/mfd/tps65912-spi.ko | grep alias
alias: spi:tps65912
After this patch:
modinfo drivers/mfd/tps65912-spi.ko | grep alias
alias: of:N*T*Cti,tps65912C*
alias: of:N*T*Cti,tps65912
alias: spi:tps65912
Reported-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Daniel Gomez <dagmcr@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
The AXP803 has a VBUS power input. Its functionality is the same as the
one found in the AXP813. Now that the axp20x_usb_power driver supports
this variant, we can add an mfd cell for it to use it.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
When CONFIG_OF is disabled, we get a harmless warning about an
unused variable:
drivers/mfd/sun6i-prcm.c: In function 'sun6i_prcm_probe':
drivers/mfd/sun6i-prcm.c:151:22: error: unused variable 'np' [-Werror=unused-variable]
Remove the variable and open-code the value in the only place
it is used, so it can get left out as well without CONFIG_OF.
Fixes: a05a2e7998 ("mfd: sun6i-prcm: Allow to compile with COMPILE_TEST")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Add support in code for the new forms of the host sleep event.
Detects the presence of this version of the command at runtime,
and use whichever form the EC supports. At this time, always
request the default timeout, and only report the failing response
via a WARN_ONCE(). Future versions could accept the sleep parameter
from outside the driver, and return the response information to
usermode or elsewhere.
Signed-off-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Rajat Jain <rajatja@chromium.org>
Reviewed-by: Guenter Roeck <groeck@chromium.org>
Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Introduce the command and response structures for the second revision
of the host sleep event. These structures are part of a new EC change
that enables detection of failure to enter S0ix. The EC waits a
kernel-specified timeout (or a default amount of time) for the S0_SLP
pin to change, and wakes the system if that change does not occur in
time.
Signed-off-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Rajat Jain <rajatja@chromium.org>
Reviewed-by: Guenter Roeck <groeck@chromium.org>
Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Add the cros-usbpd-logger driver for logging event data for the USB PD
charger available in the Embedded Controller on ChromeOS systems. The
logging feature is logically separate functionality from charge manager,
hence is instantiated as a different driver.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Guenetr Roeck <linux@roeck-us.net>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
There is a second AEC loopback on cs47l90 so the registers for it should
be readable.
Signed-off-by: Ajit Pandey <ajit.pandey@cirrus.com>
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
There is a second AEC loopback on cs47l35 so the registers for it should
be readable.
Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Adopt the SPDX license identifiers to ease license compliance
management.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
There are no in-kernel users anymore, so remove this outdated interface.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Steve Twiss <stwiss.opensource@diasemi.com>
Tested-by: Steve Twiss <stwiss.opensource@diasemi.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Covnert the headers of the source and include files to SPDX.
And fix some typos in the descriptions ("interrupt" instead of "I2C").
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Steve Twiss <stwiss.opensource@diasemi.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
The AXP223 can be used both using the RSB proprietary bus, or a more
traditional I2C bus. The RSB is a faster bus and provides more features
(like some integrity checks on the messages), so it's usually preferrable
to use it, but since it's proprietary, when we want to use the PMIC in a
multi-master setup, the i2c might make sense as well.
Let's add that possibility.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Integrated Sensor Hub (ISH) is also a MCU running EC
having feature bit EC_FEATURE_ISH. Instantiate it as
a special CrOS EC device with device name 'cros_ish'.
Signed-off-by: Rushikesh S Kadam <rushikesh.s.kadam@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Add new compatible string for the HLCD controller on SAM9X60 SoC.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Add compatible for SAM9X60 HLCD controller.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Formatting of Kconfig files doesn't look so pretty, so let the
Great White Handkerchief come around and clean it up.
Signed-off-by: Enrico Weigelt, metux IT consult <info@metux.net>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
The AXP813 has a VBUS power input. Now that the axp20x_usb_power driver
supports this variant, we can add an mfd cell for it to use it.
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
[wens@csie.org: add commit message]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
I noticed that we can get a -EREMOTEIO errors on at least omap4 duovero:
twl6040 0-004b: Failed to write 2d = 19: -121
And then any following register access will produce errors.
There 2d offset above is register ACCCTL that gets written on twl6040
powerup. With error checking added to the related regcache_sync() call,
the -EREMOTEIO error is reproducable on twl6040 powerup at least
duovero.
To fix the error, we need to wait until twl6040 is accessible after the
powerup. Based on tests on omap4 duovero, we need to wait over 8ms after
powerup before register write will complete without failures. Let's also
make sure we warn about possible errors too.
Note that we have twl6040_patch[] reg_sequence with the ACCCTL register
configuration and regcache_sync() will write the new value to ACCCTL.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Some system control registers need to be clocked, so the registers can
be accessed. Add an optional clock and attach it to regmap.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
STM32 system configuration controller registers needs to be clocked.
Document clock support on stm32-syscon.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
The RTC portion of the S2MPA01 appears to have the same
register layout as the S2MPS14.
Signed-off-by: Stuart Menefy <stuart.menefy@mathembedded.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Change the layout of the initialisation of structures with one
element to a single line of code. This keeps the coding style
consistent.
Signed-off-by: Stuart Menefy <stuart.menefy@mathembedded.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Add MFD cell for LEDs driver to the Intel Cherry Trail Whiskey Cove PMIC
mfd device driver.
Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEdrbJNaO+IJqU8IdIUa+KL4f8d2EFAlyjBD8ACgkQUa+KL4f8
d2EpUw/+KZuPkcazjIvRTqWkzk3UcoEfZF79vP2qJbHSXMTcBJTdCM1Ahm7thwii
2mhtXlBFk8PPtwlVhhggfkY5a3+InozsiAL7qn7GyYyaxk7KHHInG0YQTStHW8Zl
IOmuo+WFmpAEXJ1vPSJN0xCwiK8BtEpbSenBN6v7OXA+PgRTKIuvTN4ZB3pP9c2Q
bTT3uB9uCibSP+H+NvMJR1TRtnQUcBevle8qUqK9Y/HTiq2T+KKDMBqs+J4DyGuZ
pJ2bNziJDGY9AXXO3ndPW7WYoXmRjZMOFZXYegP8uKOD1dRm/OebBZI6raLSreq2
OcFDLFsdeU5GTc/OcoIITz8GpTbvGQoh0j5F7a1BKflj7GRcvvu8key3onh3V85m
G6vTdrZhN9Bw2G80KTkCOPGcztCWKxIlU+Xn9er7Q1u1qacx/IYUBf1PjjvP+ZCO
FY/jJfVf6PiTVkiStdHzras3PYjj+RHUWM83NKw9F9T8ZdLJOd3myd5Zcfa2dJf2
I/BqsH3JYWLIHOjdcpMLe+FwG2gMKiM0WDpqPYUzjokM6tRfShO/n9SSj/mNcv7J
64szoH53c841nUAWTE2v/E0n+UB2LGCFkyZlA1NgEMwV3a2wLuNJYYDe4Fj0Y/Fp
ydiYOa3H3PtFFIRmp+kZu5YWpTNazmf3Obteu/F6l644Yik5d+Q=
=55X1
-----END PGP SIGNATURE-----
Merge branches 'ib-mfd-arm-leds-5.2', 'ib-mfd-gpio-input-leds-power-5.2', 'ib-mfd-pinctrl-5.2-2' and 'ib-mfd-regulator-5.2', tag 'ib-mfd-arm-net-5.2' into ibs-for-mfd-merged
Immutable branch between MFD, ARM and Net due for the 5.2 merge window
* pci/printk:
PCI: Replace dev_printk(KERN_DEBUG) with dev_info(), etc
PCI: Replace printk(KERN_INFO) with pr_info(), etc
PCI: Use dev_printk() when possible
- Use DMA-API to get tegra MSI address to prevent device DMA from
generating unwanted MSIs (Vidya Sagar)
* remotes/lorenzo/pci/tegra:
PCI: tegra: Use the DMA-API to get the MSI address
- Move IRQ register address computation inside macros (Kishon Vijay
Abraham I)
- Separate legacy IRQ and MSI configuration (Kishon Vijay Abraham I)
- Use hwirq, not virq, to get MSI IRQ number offset (Kishon Vijay Abraham
I)
- Squash ks_pcie_handle_msi_irq() into ks_pcie_msi_irq_handler() (Kishon
Vijay Abraham I)
- Add dwc support for platforms with custom MSI controllers (Kishon Vijay
Abraham I)
- Add keystone-specific MSI controller (Kishon Vijay Abraham I)
- Remove dwc host_ops previously used for keystone-specific MSI (Kishon
Vijay Abraham I)
- Skip dwc default MSI init if platform has custom MSI controller (Kishon
Vijay Abraham I)
- Implement .start_link() and .stop_link() for keystone endpoint support
(Kishon Vijay Abraham I)
- Add keystone "reg-names" DT binding (Kishon Vijay Abraham I)
- Squash ks_pcie_dw_host_init() into ks_pcie_add_pcie_port() (Kishon
Vijay Abraham I)
- Get keystone register resources from DT by name, not index (Kishon
Vijay Abraham I)
- Get DT resources in .probe() to prepare for endpoint support (Kishon
Vijay Abraham I)
- Add "ti,syscon-pcie-mode" DT property for PCIe mode configuration
(Kishon Vijay Abraham I)
- Explicitly set keystone to host mode (Kishon Vijay Abraham I)
- Document DT "atu" reg-names requirement for DesignWare core >= 4.80
(Kishon Vijay Abraham I)
- Enable dwc iATU unroll for endpoint mode as well as host mode (Kishon
Vijay Abraham I)
- Add dwc "version" to identify core >= 4.80 for ATU programming (Kishon
Vijay Abraham I)
- Don't build ARM32-specific keystone code on ARM64 (Kishon Vijay Abraham
I)
- Add DT binding for keystone PCIe RC in AM654 SoC (Kishon Vijay Abraham
I)
- Add keystone support for AM654 SoC PCIe RC (Kishon Vijay Abraham I)
- Reset keystone PHYs before enabling them (Kishon Vijay Abraham I)
- Make of_pci_get_max_link_speed() available to endpoint drivers as well
as host drivers (Kishon Vijay Abraham I)
- Add keystone support for DT "max-link-speed" property (Kishon Vijay
Abraham I)
- Add endpoint library support for BAR buffer alignment (Kishon Vijay
Abraham I)
- Make all dw_pcie_ep_ops structs const (Kishon Vijay Abraham I)
- Fix fencepost error in dw_pcie_ep_find_capability() (Kishon Vijay
Abraham I)
- Add dwc hooks for dbi/dbi2 that share the same address space (Kishon
Vijay Abraham I)
- Add keystone support for TI AM654x in endpoint mode (Kishon Vijay
Abraham I)
- Configure designware endpoints to advertise smallest resizable BAR
(1MB) (Kishon Vijay Abraham I)
- Align designware endpoint ATU windows for raising MSIs (Kishon Vijay
Abraham I)
- Add endpoint test support for TI AM654x (Kishon Vijay Abraham I)
- Fix endpoint test test_reg_bar issue (Kishon Vijay Abraham I)
* remotes/lorenzo/pci/keystone:
misc: pci_endpoint_test: Fix test_reg_bar to be updated in pci_endpoint_test
misc: pci_endpoint_test: Add support to test PCI EP in AM654x
PCI: designware-ep: Use aligned ATU window for raising MSI interrupts
PCI: designware-ep: Configure Resizable BAR cap to advertise the smallest size
PCI: keystone: Add support for PCIe EP in AM654x Platforms
dt-bindings: PCI: Add PCI EP DT binding documentation for AM654
PCI: dwc: Add callbacks for accessing dbi2 address space
PCI: dwc: Fix dw_pcie_ep_find_capability() to return correct capability offset
PCI: dwc: Add const qualifier to struct dw_pcie_ep_ops
PCI: endpoint: Add support to specify alignment for buffers allocated to BARs
PCI: keystone: Add support to set the max link speed from DT
PCI: OF: Allow of_pci_get_max_link_speed() to be used by PCI Endpoint drivers
PCI: keystone: Invoke phy_reset() API before enabling PHY
PCI: keystone: Add support for PCIe RC in AM654x Platforms
dt-bindings: PCI: Add PCI RC DT binding documentation for AM654
PCI: keystone: Prevent ARM32 specific code to be compiled for ARM64
PCI: dwc: Fix ATU identification for designware version >= 4.80
PCI: dwc: Enable iATU unroll for endpoint too
dt-bindings: PCI: Document "atu" reg-names
PCI: keystone: Explicitly set the PCIe mode
dt-bindings: PCI: Add dt-binding to configure PCIe mode
PCI: keystone: Move resources initialization to prepare for EP support
PCI: keystone: Use platform_get_resource_byname() to get memory resources
PCI: keystone: Perform host initialization in a single function
dt-bindings: PCI: keystone: Add "reg-names" binding information
PCI: keystone: Cleanup error_irq configuration
PCI: keystone: Add start_link()/stop_link() dw_pcie_ops
PCI: dwc: Remove default MSI initialization for platform specific MSI chips
PCI: dwc: Remove Keystone specific dw_pcie_host_ops
PCI: keystone: Use Keystone specific msi_irq_chip
PCI: dwc: Add support to use non default msi_irq_chip
PCI: keystone: Cleanup ks_pcie_msi_irq_handler()
PCI: keystone: Use hwirq to get the MSI IRQ number offset
PCI: keystone: Add separate functions for configuring MSI and legacy interrupt
PCI: keystone: Cleanup interrupt related macros
# Conflicts:
# drivers/pci/controller/dwc/pcie-designware.h
- Work around iproc CRS completion issues (Srinath Mannam)
- Allow smaller iproc outbound windows so driver can work on 32-bit
systems (Srinath Mannam)
- Use iproc-specific config read for PAXBv2 (not PAXB) (Srinath Mannam)
* remotes/lorenzo/pci/iproc:
PCI: iproc: Enable iProc config read for PAXBv2
PCI: iproc: Allow outbound configuration for 32-bit I/O region
PCI: iproc: Add CRS check in config read
- Simplify imx7d_pcie_wait_for_phy_pll_lock() by using
regmap_read_poll_timeout() (Andrey Smirnov)
- Drop imx6_pcie_wait_for_link() in favor of the more generic
dw_pcie_wait_for_link() (Andrey Smirnov)
- Return -ETIMEDOUT instead of -EINVAL from
imx6_pcie_wait_for_speed_change() (Andrey Smirnov)
- Remove unused PCIE_PL_PFLR_* constants from imx6 (Andrey Smirnov)
- Use shared PHY debug register definitions in imx6 (Andrey Smirnov)
- Use BIT() in imx6 (Andrey Smirnov)
- Simplify imx6 PHY bit operations (Andrey Smirnov)
- Simplify imx6 pcie_phy_poll_ack() (Andrey Smirnov)
- Use data types that match actual imx6 PHY register width (Andrey
Smirnov)
- Mark imx6 suspend support with drvdata flags instead of checking
variants (Andrey Smirnov)
- Sleep instead of delay in imx6_pcie_enable_ref_clk() (Andrey Smirnov)
* remotes/lorenzo/pci/imx:
PCI: imx6: Use usleep_range() in imx6_pcie_enable_ref_clk()
PCI: imx6: Use flags to indicate support for suspend
PCI: imx6: Restrict PHY register data to 16-bit
PCI: imx6: Simplify pcie_phy_poll_ack()
PCI: imx6: Simplify bit operations in PHY functions
PCI: imx6: Make use of BIT() in constant definitions
PCI: dwc: imx6: Share PHY debug register definitions
PCI: imx6: Remove PCIE_PL_PFLR_* constants
PCI: imx6: Return -ETIMEOUT from imx6_pcie_wait_for_speed_change()
PCI: imx6: Drop imx6_pcie_wait_for_link()
PCI: imx6: Simplify imx7d_pcie_wait_for_phy_pll_lock()
- Restore R-Car PCIe link early in resume (Kazufumi Ikeda)
- Fix Hyper-V PCI ejection memory leak (Dexuan Cui)
- Cleanup Hyper-V PCI slots on module unload (Dexuan Cui)
- Cleanup Hyper-V PCI slot on device removal to address a race (Dexuan
Cui)
* remotes/lorenzo/pci/controller-fixes:
PCI: hv: Add pci_destroy_slot() in pci_devices_present_work(), if necessary
PCI: hv: Add hv_pci_remove_slots() when we unload the driver
PCI: hv: Fix a memory leak in hv_eject_device_work()
PCI: rcar: Add the initialization of PCIe link in resume_noirq()