3 Commits

Author	SHA1	Message	Date
Philippe De Muyter	9c68015b14	m68knommu: Use symbolic constants for cache operations on M54xx ... Now that we have meaningfull symbolic constants for bit definitions of the cache registers of m5407 and m548x chips, use them to improve readability, portability and efficiency of the cache operations. This also fixes __flush_cache_all for m548x chips : implicit DCACHE_SIZE was exact for m5407, but wrong for m548x. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Greg Ungerer <gerg@uclinux.org>	2011-01-05 15:19:17 +10:00
Philippe De Muyter	b3d75b09bf	m68knommu: Move __flush_cache_all definition for m54xx in m54xxacr.h ... __flush_cache_all for m54xx is intrinsically related to the bit definitions in m54xxacr.h. Move it there from cacheflush_no.h, for easier maintenance. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Greg Ungerer <gerg@uclinux.org>	2011-01-05 15:19:17 +10:00
Philippe De Muyter	5291fa9856	m68knommu: Create new m54xxacr.h from m5407sim.h subpart ... The MCF548x have the same cache control registers as the MCF5407. Extract the bit definitions for the ACR and CACR registers from m5407sim.h and move them to a new file m54xxacr.h. Those definitions are not used anywhere yet, so no other file is involved. This is a preparation for m54xx cache support cleanup. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Greg Ungerer <gerg@uclinux.org>	2011-01-05 15:19:16 +10:00