Commit Graph

2478 Commits

Author SHA1 Message Date
Ulf Hansson
9ae4ed7d30 mmc: tmio: Extract bus_width modifications to a separate function
Move code for bus_width modification, out of the ->set_ios() callback
and into a separate function, to simplify code.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2014-09-09 13:59:09 +02:00
Ulf Hansson
0369483efc mmc: tmio: Keep host active while serving requests
Use runtime PM to keep the host active during I/O operations and other
requests which requires the tmio hardware to be powered.

Additionally make use of the runtime PM autosuspend feature with a
default timeout of 50 ms.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2014-09-09 13:59:08 +02:00
Ulf Hansson
7501c4315f mmc: tmio: Keep host active while SDIO IRQ is enabled
The host must be kept active to be able to serve SDIO IRQs, thus let's
prevent it from going inactive while SDIO IRQ is enabled.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2014-09-09 13:59:08 +02:00
Nicolas Ferre
215ba3995a mmc: atmel-mci: add 0x600 IP version
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-09-09 13:59:08 +02:00
Peter Griffin
b315376573 mmc: sdhci-pxav3: set_uhs_signaling is initialized twice differently
.set_uhs_signaling field is currently initialised twice once to the
arch specific callback pxav3_set_uhs_signaling, and also to the generic
sdhci_set_uhs_signaling callback.

This means that uhs is currently broken for this platform currently, as pxav3
has some special constriants which means it can't use the generic callback.

This happened in
commit 96d7b78cfc ("mmc: sdhci: convert sdhci_set_uhs_signaling() into a library function")
commit a702c8abb2 ("mmc: host: split up sdhci-pxa, create sdhci-pxav3.c")'

Fix this and hopefully prevent it happening in the future by ensuring named
initialisers always follow the declaration order in the structure definition.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Cc: <stable@vger.kernel.org> # v3.16+
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-09-09 13:59:06 +02:00
Peter Griffin
1d75f74b14 mmc: sdhci-acpi.c: Use SET_RUNTIME_PM_OPS macro to set runtime pm callbacks
This allows us to get rid of the #else condition, as the macro compiles
away to nothing if not enabled.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-09-09 13:59:06 +02:00
Peter Griffin
f3a92b1a32 mmc: sdhci-pci: Use SET_RUNTIME_PM_OPS macro to set runtime pm callbacks
This allows us to get rid of the #else condition, as the macro compiles
away to nothing if not enabled.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-09-09 13:59:06 +02:00
Peter Griffin
0529b81094 mmc: dw_mmc-pltfm: Remove superflous #else condition on CONFIG_PM_SLEEP
As the code is using SIMPLE_DEV_PM_OPS helper, this compiles away to
nothing if CONFIG_PM_SLEEP is disabled. Thus we don't need to #define
the suspend/resume callbacks to NULL.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-09-09 13:59:05 +02:00
Peter Griffin
eb4667426b mmc: dw_mmc-pci: Remove superflous #else condition on CONFIG_PM_SLEEP
As the code is using SIMPLE_DEV_PM_OPS helper, this compiles away to
nothing if CONFIG_PM_SLEEP is disabled. Thus we don't need to #define
the suspend/resume callbacks to NULL.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-09-09 13:59:05 +02:00
Peter Griffin
2137f5d3b8 mmc: remove .owner field for drivers using module_platform_driver
This patch removes the superflous .owner field for drivers which
use the module_platform_driver API, as this is overriden in
platform_driver_register anyway.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-09-09 13:59:04 +02:00
Andrew Bresticker
b1dec12032 mmc: dw_mmc: Add support for MIPS
There are upcoming MIPS SoCs with dw_mmc hosts.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-09-09 13:59:03 +02:00
Andrew Bresticker
0857c6912d mmc: dw_mmc: Add dependency on DMA
The dw_mmc drivers rely on the DMA API, so update the Kconfig entry
to depend on HAS_DMA.  Since the drivers should build on any platform
with DMA, allow the driver to compile tested on non-ARC/ARM platforms.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-09-09 13:59:03 +02:00
Matthieu CASTET
fac6a52fe9 sdhci : recompute timeout_clk when needed
when SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK is set, timeout_clk is sdclk.
We need to update it when we change sdclk in sdhci_set_clock.
This allow to have a more precisse timeout and max_busy_timeout. This
can help for command that need a big busy wait (erase, ...).

Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-09-09 13:59:03 +02:00
Matthieu CASTET
c5abd5e899 sdhci : handle busy timeout irq
When we wait for busy after sending a command, if there is
a timeout, we got SDHCI_INT_DATA_TIMEOUT flags.
Before this commit we got the message :
"Got data interrupt 0x00100000 even though no data  operation was in progress."
and we need to wait 10s that sdhci_timeout_timer expires.

Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-09-09 13:59:02 +02:00
Roger Tseng
6f67cc6fd1 mmc: rtsx_usb_sdmmc: fix incorrect last byte in R2 response
Current code erroneously fill the last byte of R2 response with an undefined
value. In addition, the controller actually 'offloads' the last byte
(CRC7, end bit) while receiving R2 response and thus it's impossible to get the
actual value. This could cause mmc stack to obtain inconsistent CID from the
same card after resume and misidentify it as a different card.

Fix by assigning dummy CRC and end bit: {7'b0, 1} = 0x1 to the last byte of R2.

Cc: <stable@vger.kernel.org> # v3.16+
Fixes: c7f6558d84 ("mmc: Add realtek USB sdmmc host driver")
Signed-off-by: Roger Tseng <rogerable@realtek.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-09-09 13:59:02 +02:00
Roger Tseng
d1419d50c1 mmc: rtsx_pci_sdmmc: fix incorrect last byte in R2 response
Current code erroneously fill the last byte of R2 response with an undefined
value. In addition, the controller actually 'offloads' the last byte
(CRC7, end bit) while receiving R2 response and thus it's impossible to get the
actual value. This could cause mmc stack to obtain inconsistent CID from the
same card after resume and misidentify it as a different card.

Fix by assigning dummy CRC and end bit: {7'b0, 1} = 0x1 to the last byte of R2.

Cc: <stable@vger.kernel.org> # v3.8+
Fixes: ff984e57d3 ("mmc: Add realtek pcie sdmmc host driver")
Signed-off-by: Roger Tseng <rogerable@realtek.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-09-09 13:59:01 +02:00
Wei Yongjun
ee9d19d42c mmc: au1xmmc: fix error return code in au1xmmc_probe()
Fix to return a negative error code from the error handling
case instead of 0, as done elsewhere in this function.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-09-09 13:59:01 +02:00
Doug Anderson
2aa354650a mmc: dw_mmc: Make sure we don't get stuck when we get an error
If we happened to get a data error at just the wrong time the dw_mmc
driver could get into a state where it would never complete its
request.  That would leave the caller just hanging there.

We fix this two ways and both of the two fixes on their own appear to
fix the problems we've seen:

1. Fix a race in the tasklet where the interrupt setting the data
   error happens _just after_ we check for it, then we get a
   EVENT_XFER_COMPLETE.  We fix this by repeating a bit of code.
2. Fix it so that if we detect that we've got an error in the "data
   busy" state and we're not going to do anything else we end the
   request and unblock anyone waiting.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@gmail.com>
Acked-by: Seungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-09-09 13:59:01 +02:00
Chuanxiao.Dong
ae9060377a mmc: sdhci: fix the wrong type of curr
curr should use signed type since it will contain the returned
value which is possible to be a negative value. Using u32 will
make the returned value to be true even there is a negative result.
Change to use int instead of u32

Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-09-09 13:59:00 +02:00
Apelete Seketeli
bb2f45927f mmc: jz4740: prepare next dma transfer in parallel with current transfer
Make use of the MMC asynchronous request capability to prepare the
next DMA transfer request in parallel with the current transfer.
This is done by adding pre-request and post-request callbacks that are
used by the MMC framework during an active data transfer.

It should help reduce the impact of DMA preparation overhead on the SD
card performance.

Signed-off-by: Apelete Seketeli <apelete@seketeli.net>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-09-09 13:58:59 +02:00
Apelete Seketeli
7ca27a6f80 mmc: jz4740: add dma infrastructure for data transfers
Until now the MMC driver for JZ4740 SoC was relying on PIO mode only
for data transfers.
This patch allows the use of DMA for data trasnfers in addition to PIO
mode by relying on DMA Engine.

DMA tranfers performance might be further improved by taking advantage
of the asynchronous request capability of the MMC framework.

Signed-off-by: Apelete Seketeli <apelete@seketeli.net>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-09-09 13:58:59 +02:00
Addy Ke
f629ba2c04 mmc: dw_mmc: add support for RK3288
This patch focuses on clock setting for RK3288 mmc controller.

In RK3288 mmc controller, CLKDIV register can only be set 0 or 1,
and if DDR 8bit mode, CLKDIV register must be set 1.

Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-09-09 13:58:59 +02:00
Pawel Moll
45c19e2a81 mmc: sdhci-pltfm: Do not use parent as the host's device
The code selecting a device for the sdhci host has been
continuously tweaked (4b711cb138
"mmc: sdhci-pltfm: Add structure for host-specific data" and
a4d2177f00 "mmc: sdhci-pltfm: dt
device does not pass parent to sdhci_alloc_host" while there
does not seem to be any reason to use platform device's parent
in the first place.

The comment saying "Some PCI-based MFD need the parent here"
seem to refer to Timberdale FPGA driver (the only MFD driver
registering SDHCI cell, drivers/mfd/timberdale.c) but again,
the only situation when parent device matter is runtime PM,
which is not implemented for Timberdale.

Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-09-09 13:58:58 +02:00
Srinivas Kandagatla
9cb15142d0 mmc: mmci: Add qcom dml support to the driver.
On Qualcomm APQ8064 SOCs, SD card controller has an additional glue
called DML (Data Mover Local/Lite) to assist dma transfers.
This hardware needs to be setup before any dma transfer is requested.
DML itself is not a DMA engine, its just a gule between the SD card
controller and dma controller.

Most of this code has been ported from qualcomm's 3.4 kernel.

This patch adds the code necessary to intialize the hardware and setup
before doing any dma transfers.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-09-09 13:58:46 +02:00
Bartlomiej Zolnierkiewicz
221414db19 mmc: sdhci-s3c: fix runtime PM handling on sdhci_add_host() failure
Runtime Power Management handling for the sdhci_add_host() failure
case in sdhci_s3c_probe() should match the code in sdhci_s3c_remove()
(which uses pm_runtime_disable() call which matches the earlier
pm_runtime_enable() one).  Fix it.

This patch fixes "BUG: spinlock bad magic on CPU#0, swapper/0/1" and
"Unbalanced pm_runtime_enable!" warnings.

>From the kernel log:
...
[    1.659631] s3c-sdhci 12530000.sdhci: sdhci_add_host() failed
[    1.665096] BUG: spinlock bad magic on CPU#0, swapper/0/1
[    1.670433]  lock: 0xea01e484, .magic: 00000000, .owner: <none>/-1, .owner_cpu: 0
[    1.677895] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.16.0-next-20140804-00008-ga59480f-dirty #707
[    1.687037] [<c0013ae4>] (unwind_backtrace) from [<c0010d70>] (show_stack+0x10/0x14)
[    1.694740] [<c0010d70>] (show_stack) from [<c04050c8>] (dump_stack+0x68/0xb8)
[    1.701948] [<c04050c8>] (dump_stack) from [<c0052558>] (do_raw_spin_lock+0x15c/0x1a4)
[    1.709848] [<c0052558>] (do_raw_spin_lock) from [<c040a630>] (_raw_spin_lock_irqsave+0x20/0x28)
[    1.718619] [<c040a630>] (_raw_spin_lock_irqsave) from [<c030d7d0>] (sdhci_do_set_ios+0x1c/0x5cc)
[    1.727464] [<c030d7d0>] (sdhci_do_set_ios) from [<c030ddfc>] (sdhci_runtime_resume_host+0x50/0x104)
[    1.736574] [<c030ddfc>] (sdhci_runtime_resume_host) from [<c02462dc>] (pm_generic_runtime_resume+0x2c/0x40)
[    1.746383] [<c02462dc>] (pm_generic_runtime_resume) from [<c0247898>] (__rpm_callback+0x34/0x70)
[    1.755233] [<c0247898>] (__rpm_callback) from [<c02478fc>] (rpm_callback+0x28/0x88)
[    1.762958] [<c02478fc>] (rpm_callback) from [<c02486f0>] (rpm_resume+0x384/0x4ec)
[    1.770511] [<c02486f0>] (rpm_resume) from [<c02488b0>] (pm_runtime_forbid+0x58/0x64)
[    1.778325] [<c02488b0>] (pm_runtime_forbid) from [<c030ea70>] (sdhci_s3c_probe+0x4a4/0x540)
[    1.786749] [<c030ea70>] (sdhci_s3c_probe) from [<c02429cc>] (platform_drv_probe+0x2c/0x5c)
[    1.795076] [<c02429cc>] (platform_drv_probe) from [<c02415f0>] (driver_probe_device+0x114/0x234)
[    1.803929] [<c02415f0>] (driver_probe_device) from [<c024179c>] (__driver_attach+0x8c/0x90)
[    1.812347] [<c024179c>] (__driver_attach) from [<c023ffb4>] (bus_for_each_dev+0x54/0x88)
[    1.820506] [<c023ffb4>] (bus_for_each_dev) from [<c0240df8>] (bus_add_driver+0xd8/0x1cc)
[    1.828665] [<c0240df8>] (bus_add_driver) from [<c0241db8>] (driver_register+0x78/0xf4)
[    1.836652] [<c0241db8>] (driver_register) from [<c00088a4>] (do_one_initcall+0x80/0x1d0)
[    1.844816] [<c00088a4>] (do_one_initcall) from [<c059ac94>] (kernel_init_freeable+0x108/0x1d4)
[    1.853503] [<c059ac94>] (kernel_init_freeable) from [<c0401300>] (kernel_init+0x8/0xe4)
[    1.861568] [<c0401300>] (kernel_init) from [<c000e538>] (ret_from_fork+0x14/0x3c)
[    1.869582] platform 12530000.sdhci: Driver s3c-sdhci requests probe deferral
...
[    1.997047] s3c-sdhci 12530000.sdhci: Unbalanced pm_runtime_enable!
...
[    2.027235] s3c-sdhci 12530000.sdhci: sdhci_add_host() failed
[    2.032884] platform 12530000.sdhci: Driver s3c-sdhci requests probe deferral
...

Tested on Hardkernel's Exynos4412 based ODROID-U3 board.

Fixes: 9f4e8151db ("mmc: sdhci-s3c: Enable runtime power management")
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-09-08 10:23:04 +02:00
Linus Torvalds
a11c5c9ef6 PCI changes for the v3.17 merge window (part 2):
Miscellaneous
     - Remove DEFINE_PCI_DEVICE_TABLE macro use (Benoit Taine)
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJT7PyAAAoJEFmIoMA60/r8kjQQALr/8oEfZoVcjgCb7waWOr25
 hUTnrI6GBIAh/50hoBiPq0ouPCAKVv66+CUhuhFkLP7oJz+rMU0B9hfUvdLfmCpH
 7ppaallkllT9nPFIr7h5RUWLXsoQyuHmCYmSrUCcnlT2LPgU0dN72YWElLisEM6Z
 Pldg3933xyIQaCWviHjGEjWb7NvC+JY4pTkV5iyqGgU8Ale/eFYtLLSfdBEjIbGv
 VDirYZmKELYeuncZPrTAsp4IENRMZn702wwDakMSODVMEWtJB5h4yrBawqQDlFP5
 9ztIX6n9p9zkdVKbYZlx/Xwv6SYEnYXLxauVQMSO3Nck7Z10R5Ud+5uuCg/6mWH8
 AQI4UV5bbJcg7zHgocTG9XLFLFPoPtD2JT6k6UT1LeUAiAOqcSzhRO+/qJBmJOWZ
 Zv+EHXPlxBrl0zNifut6ZQrY17teuItVtmha70a/9W3PjnIx3KecqLcTwdTvDsOY
 IAyH8WMZrBKpPpsczSmfE93i2Z1QRS91HEAOeSMxl/98dcDTdllYZS7spjoDll2f
 xmpGDbpriLSCu2XsGHfTC9RbqA7CyuFlHggJSQDkT/5Esli0sCs7eweTuK3RVvPu
 t6bUHK3yElb6x9qMZhb5q6l72wSMlGMishTdaxEHmqrEA8PtaIFodmVX2T/Zel5n
 GHN6bysPqDItNR2v/3JX
 =jJGu
 -----END PGP SIGNATURE-----

Merge tag 'pci-v3.17-changes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

Pull DEFINE_PCI_DEVICE_TABLE removal from Bjorn Helgaas:
 "Part two of the PCI changes for v3.17:

    - Remove DEFINE_PCI_DEVICE_TABLE macro use (Benoit Taine)

  It's a mechanical change that removes uses of the
  DEFINE_PCI_DEVICE_TABLE macro.  I waited until later in the merge
  window to reduce conflicts, but it's possible you'll still see a few"

* tag 'pci-v3.17-changes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
  PCI: Remove DEFINE_PCI_DEVICE_TABLE macro use
2014-08-14 18:10:33 -06:00
Linus Torvalds
a8e4def604 MMC core:
- Forward compatibility for eMMC.
  - Fix some blacklisted cards with broken secure discard.
 
 MMC host:
  - mmci: Add support for Qualcomm variant.
  - mmci: Fix regression for arm_variant.
  - sdhci: Various fixes and cleanups.
  - sdhci: Improve external VDD regulator support.
  - sdhci: Support for DDR50 1.8V mode for BayTrail.
  - sdhci-st: Add driver for ST SDHCI controller.
  - sh-mmcif: DMA fixes.
  - omap_hsmmc: Add support for SDIO interrupts.
  - sdhci-pci: Add support for Intel Quark X1000.
  - dw_mmc: Update the reset sequence.
  - s3cmci: port DMA code to dmaengine API.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJT6K/QAAoJEP4mhCVzWIwpj5UP/3KWAsUCz5PlPaTxWgh/U+aN
 lwO8aryFGjxfengCtJaw4cVksg3Lc5EvaSweg7BUqTucHoq/epdAU+Doqf5OVZ9Y
 kicfx+WOAwIGTTuY9Wu7W884WgF+litZW4O4LtQnr6hHzx+xQhPabTc6zKJVS7WD
 /Fx1Qcc0WFdGA3D0VdpCqGa7Y8IYk8cEP16MOA4s0HxZxONkjFbPdpQRF/zywGOA
 tqJC7kAhlY+Rx5bsrr5Lvbhu2Ut+cfLBPdPYuJz50wnymQ15IrLj5n4rSd5GLY+f
 HjMeCJzDHi1gk26wn3kYyWwz3JkJGWhtf6fC1hDqvkWEmHd872v7EuU9V4D3ehV1
 xPVVVyUYqMgs0Vi+PXAlMhoajrwgnlM1Ox0sheOOefcaRoFVpV6PZOuAsAOfKRfC
 ySOuEhOKn5OOvjH2TB4dNH1a3hegR9B3fJqjFe4UmUQP4FBicOfUKi+n6HwC+Omb
 VDCuVvwmMCVPi/Lop6thpPepJBfR8Ncb3vanLpK64LcIjEfoPTwoAyNI32Qnry52
 XMO4Tppl+bPzglGpV427KXlFbBwccp+8sCMRc/4lRiIMH9QhbZfVA1FcxwpvZ419
 6SKXmqhA62nHLcWlQrRlvdnNyr+Ow2o5gJ0iVffByfmzcgPmja9YZYyDfx+DxWOo
 W1oItq+qMd25rnnOPTLB
 =kGSY
 -----END PGP SIGNATURE-----

Merge tag 'mmc-v3.17-1' of git://git.linaro.org/people/ulf.hansson/mmc

Pull MMC updates from Ulf Hansson:
 "Me and Chris Ball decided to try out using my MMC tree as the primary
  one, to simplify handling of patches.

  This pull does thus contains all the MMC patches for 3.17 rc1, no pull
  from Chris this time.

  Details:

  MMC core:
   - forward compatibility for eMMC
   - fix some blacklisted cards with broken secure discard

  MMC host:
   - mmci: Add support for Qualcomm variant
   - mmci: Fix regression for arm_variant
   - sdhci: Various fixes and cleanups
   - sdhci: Improve external VDD regulator support
   - sdhci: Support for DDR50 1.8V mode for BayTrail
   - sdhci-st: Add driver for ST SDHCI controller
   - sh-mmcif: DMA fixes
   - omap_hsmmc: Add support for SDIO interrupts
   - sdhci-pci: Add support for Intel Quark X1000
   - dw_mmc: Update the reset sequence
   - s3cmci: port DMA code to dmaengine API"

* tag 'mmc-v3.17-1' of git://git.linaro.org/people/ulf.hansson/mmc: (67 commits)
  mmc: dw_mmc: modify the dt-binding for removing slot-node and supports-highspeed
  mmc: dw_mmc: Slot quirk "disable-wp" is deprecated.
  mmc: mmci: Reverse IRQ handling for the arm_variant
  mmc: mmci: Move all CMD irq handling to mmci_cmd_irq()
  mmc: mmci: Remove redundant check of status for DATA irq
  mmc: dw_mmc: change to use recommended reset procedure
  mmc: sdhci-pxav3: Use devm_* managed helpers
  mmc: tmio: Configure DMA slave bus width
  mmc: sh_mmcif: Configure DMA slave bus width
  mmc: sh_mmcif: Fix DMA slave address configuration
  mmc: sh_mmcif: Document DT bindings
  mmc: sdhci-pci: remove PCI PM functions in suspend/resume callback
  mmc: Do not advertise secure discard if it is blacklisted
  mmc: sdhci-msm: Get COMPILE_TEST support
  mmc: sdhci-msm: Remove unnecessary header file inclusion
  mmc: sdhci-msm: Fix the binding example
  mmc: sdhci: add DDR50 1.8V mode support for BayTrail eMMC Controller
  mmc: sdhci: Preset value not supported in Baytrail eMMC
  mmc: MMC_USDHI6ROL0 should depend on HAS_DMA
  mmc: MMC_SH_MMCIF should depend on HAS_DMA
  ...
2014-08-14 09:15:53 -06:00
Benoit Taine
9baa3c34ac PCI: Remove DEFINE_PCI_DEVICE_TABLE macro use
We should prefer `struct pci_device_id` over `DEFINE_PCI_DEVICE_TABLE` to
meet kernel coding style guidelines.  This issue was reported by checkpatch.

A simplified version of the semantic patch that makes this change is as
follows (http://coccinelle.lip6.fr/):

// <smpl>

@@
identifier i;
declarer name DEFINE_PCI_DEVICE_TABLE;
initializer z;
@@

- DEFINE_PCI_DEVICE_TABLE(i)
+ const struct pci_device_id i[]
= z;

// </smpl>

[bhelgaas: add semantic patch]
Signed-off-by: Benoit Taine <benoit.taine@lip6.fr>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-08-12 12:15:14 -06:00
Jaehoon Chung
26375b5c84 mmc: dw_mmc: Slot quirk "disable-wp" is deprecated.
Slot quirks "disable-wp" is deprecated.
Instead, use the host quirk "disable-wp".
(Because the slot-node is removed in dt-file.)

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Sachin Kamat <sachin.kamat@samsung.com>
Acked-by: Seungwon Jeon <tgih.jun@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-08-11 11:42:39 +02:00
Ulf Hansson
7878289b26 mmc: mmci: Reverse IRQ handling for the arm_variant
Commit "mmc: mmci: Handle CMD irq before DATA irq", caused an issue
when using the ARM model of the PL181 and running QEMU.

The bug was reported for the following QEMU version:
$ qemu-system-arm -version
QEMU emulator version 2.0.0 (Debian 2.0.0+dfsg-2ubuntu1.1), Copyright
(c) 2003-2008 Fabrice Bellard

To resolve the problem, let's restore the old behavior were the DATA
irq is handled prior the CMD irq, but only for the arm_variant, which
the problem was reported for.

Reported-by: John Stultz <john.stultz@linaro.org>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Russell King <linux@arm.linux.org.uk>
Tested-by: Kees Cook <keescook@chromium.org>
Tested-by: John Stultz <john.stultz@linaro.org>
Cc: <stable@vger.kernel.org> # v3.15+
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-08-11 10:24:23 +02:00
Ulf Hansson
ad82bfea44 mmc: mmci: Move all CMD irq handling to mmci_cmd_irq()
This patch won't change the behavior of how mmci deals with CMD irqs.
By moving code from mmci_irq() to mmci_cmd_irq(), we getter a better
overview of what going on.

Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Russell King <linux@arm.linux.org.uk>
Tested-by: Kees Cook <keescook@chromium.org>
Tested-by: John Stultz <john.stultz@linaro.org>
Cc: <stable@vger.kernel.org> # v3.15+
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-08-11 10:24:15 +02:00
Ulf Hansson
1cb9da5028 mmc: mmci: Remove redundant check of status for DATA irq
We don't need to verify the content of the status register twice, while
we are about to handle a DATA irq. Instead let's leave all verification
to be handled by mmci_data_irq().

Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Russell King <linux@arm.linux.org.uk>
Tested-by: Kees Cook <keescook@chromium.org>
Tested-by: John Stultz <john.stultz@linaro.org>
Cc: <stable@vger.kernel.org> # v3.15+
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-08-11 10:16:16 +02:00
Sonny Rao
3a33a94ce2 mmc: dw_mmc: change to use recommended reset procedure
This patch changes the fifo reset code to follow the reset procedure
outlined in the documentation of Synopsys Mobile storage host databook.

Signed-off-by: Sonny Rao <sonnyrao@chromium.org>
Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Acked-by: Seungwon Jeon <tgih.jun@samsung.com>
[sonnyrao: fix compile for !CONFIG_MMC_DW_IDMAC case]
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-08-11 09:52:55 +02:00
Laurent Pinchart
3df5b28149 mmc: sdhci-pxav3: Use devm_* managed helpers
This simplifies probe error and remove code paths.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-08-11 08:53:04 +02:00
Linus Torvalds
54c72d5987 == Changes to existing drivers ==
- Checkpatch fixes throughout the subsystem
   - Use Regmap to handle IRQs in max77686, extcon-max77693 and mc13xxx-core
   - Use DMA in rtsx_pcr
   - Restrict building on unsupported architectures on timberdale, cs5535
   - SPI hardening in cros_ec_spi
   - More robust error handing in asic3, cros_ec, ab8500-debugfs,
         max77686 and pcf50633-core
   - Reorder PM runtime and regulator handing during shutdown in arizona
   - Enable wakeup in cros_ec_spi
   - Unused variable/code clean-up in pm8921-core, cros_ec, htc-i2cpld,
         tps65912-spi, wm5110-tables and ab8500-debugfs
   - Add regulator handing into suspend() in sec-core
   - Remove pointless wrapper functions in extcon-max77693 and i2c-cros-ec-tunnel
   - Use cross-architecture friendly data sizes in stmpe-i2c, arizona,
         max77686 and tps65910
   - Device Tree documentation updates throughout
   - Provide power management support in max77686
   - Few OF clean-ups in max77686
   - Use manged resources in tps6105x
 
  == New drivers/supported devices ==
   - Add support for s2mpu02 to sec-core
   - Add support for Allwinner A32 to sun6i-prcm
   - Add support for Maxim 77802 in max77686
   - Add support for DA9063 AD in da9063
   - Add new driver for Intel PMICs (generic) and specifically Crystal Cove
 
  == (Re-)moved drivers ==
   - Move out keyboard functionality cros_ec ==> input/keyboard/cros_ec_keyb
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJT40p7AAoJEFGvii+H/HdhTo0P/1GuZyvCAJCeqt2oN1gcloIe
 Hgf5rEo/PVPh3T9vHA7GCbWhgtdxfJI8FxrQYvU7Dw5cEMlmvl5p/ZHNPIProv97
 uI59JO67roLpXZP+aYX8BzXcplYkaR/ah16o/ePtaOCwGrXDz+TtJiHEVVN/8bAG
 PWsdcDNBC8byP7BZ/8zFdu6pX4800eRZ0KgeBH+u4k6UDor7M6LkQrxF1hJhU1Bv
 z14Q2wKQufhbcyEtQWcYc6M8hignD1Ioyd4I8mnEJs0EUiABfGUEk/K/G4Z5Q7Sv
 eRIEPZCd1CEBKD5JQcPXyE1QGdG9GiD15PLmctPA4VY1V+9c5/Hoq0TLoxlAQNWA
 gUr7WSqJ+KT2Nch0WVr/MdP8l0jPYfboWbsd/apj4GK0/9quwJNkGUxx0mCdCXyg
 9ylitwUrmlrd4CEKjybfEuTQB52Jvcdq24fnNYHHn1TGppZH6w7LVvdwSW7UcjF0
 Y48hTImYYnVAlWl5lE5xVQTWD/3hseAcoWTsdSORSWJbkCfAhJUg/Gn5bH/Fkwhs
 /aWYPvkF+m47PoudZ9Z8qB5OTO4uz/Q9uEBBf2/k4Yy95vl2IZdy9VqS5tYG67e7
 LLdAZvG5hjEwDi3OwcwGSdZ/kRB5Hgq/YvpqjItle86CKj0ECdAqL/PfqLISgJq9
 x3zSuWMRLcNoyhc2HnBj
 =2cNI
 -----END PGP SIGNATURE-----

Merge tag 'mfd-for-linus-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull MFD update from Lee Jones:
 "Changes to existing drivers:
   - checkpatch fixes throughout the subsystem
   - use Regmap to handle IRQs in max77686, extcon-max77693 and
     mc13xxx-core
   - use DMA in rtsx_pcr
   - restrict building on unsupported architectures on timberdale,
     cs5535
   - SPI hardening in cros_ec_spi
   - more robust error handing in asic3, cros_ec, ab8500-debugfs,
     max77686 and pcf50633-core
   - reorder PM runtime and regulator handing during shutdown in arizona
   - enable wakeup in cros_ec_spi
   - unused variable/code clean-up in pm8921-core, cros_ec, htc-i2cpld,
     tps65912-spi, wm5110-tables and ab8500-debugfs
   - add regulator handing into suspend() in sec-core
   - remove pointless wrapper functions in extcon-max77693 and
     i2c-cros-ec-tunnel
   - use cross-architecture friendly data sizes in stmpe-i2c, arizona,
     max77686 and tps65910
   - devicetree documentation updates throughout
   - provide power management support in max77686
   - few OF clean-ups in max77686
   - use manged resources in tps6105x

  New drivers/supported devices:
   - add support for s2mpu02 to sec-core
   - add support for Allwinner A32 to sun6i-prcm
   - add support for Maxim 77802 in max77686
   - add support for DA9063 AD in da9063
   - new driver for Intel PMICs (generic) and specifically Crystal Cove

  (Re-)moved drivers ==
   - move out keyboard functionality cros_ec ==> input/keyboard/cros_ec_keyb"

* tag 'mfd-for-linus-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (101 commits)
  MAINTAINERS: Update MFD repo location
  mfd: omap-usb-host: Fix improper mask use.
  mfd: arizona: Only free the CTRLIF_ERR IRQ if we requested it
  mfd: arizona: Add missing handling for ISRC3 under/overclocked
  mfd: wm5110: Add new interrupt register definitions
  mfd: arizona: Rename thermal shutdown interrupt
  mfd: wm5110: Add in the output done interrupts
  mfd: wm5110: Remove non-existant interrupts
  mfd: tps65912-spi: Remove unused variable
  mfd: htc-i2cpld: Remove unused code
  mfd: da9063: Add support for AD silicon variant
  mfd: arizona: Map MICVDD from extcon device to the Arizona core
  mfd: arizona: Add MICVDD to mapped regulators for wm8997
  mfd: max77686: Ensure device type IDs are architecture agnostic
  mfd: max77686: Add Maxim 77802 PMIC support
  mfd: tps6105x: Use managed resources when allocating memory
  mfd: wm8997-tables: Suppress 'line over 80 chars' warnings
  mfd: kempld-core: Correct a variety of checkpatch warnings
  mfd: ipaq-micro: Fix coding style errors/warnings reported by checkpatch
  mfd: si476x-cmd: Remedy checkpatch style complains
  ...
2014-08-07 17:17:39 -07:00
Manuel Lauss
b6507596df MIPS: Alchemy: au1xmmc: use clk framework
Use the clock framework to get the peripheral clock rate to
correctly set the MMC/SD bus clock divider.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/7475/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-07-30 14:11:42 +02:00
Manuel Lauss
2f73bfbe08 MIPS: Alchemy: remove au_read/write/sync
replace au_read/write/sync with __raw_read/write and wmb.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/7465/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-07-30 13:56:34 +02:00
Manuel Lauss
1d09de7dc7 MIPS: Alchemy: introduce helpers to access SYS register block.
This patch changes all absolute SYS_XY registers to offsets from the
SYS block base, prefixes them with AU1000 to avoid silent failures due
to changed addresses, and introduces helper functions to read/write
them.

No functional changes, comparing assembly of a few select functions shows
no differences.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/7464/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-07-30 13:53:28 +02:00
Laurent Pinchart
39ab196243 mmc: tmio: Configure DMA slave bus width
Even though some implementations support 4-bytes data register access,
the tmio driver never configures the hardware in such a way and always
performs 2-bytes accesses. Hardcode the DMA transfer size to 2 bytes.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-26 11:38:19 +02:00
Laurent Pinchart
e36152aa84 mmc: sh_mmcif: Configure DMA slave bus width
The data register is 4 bytes wide, hardcode the DMA transfer size to
4 bytes in both directions.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-26 11:38:19 +02:00
Laurent Pinchart
d25006e7e5 mmc: sh_mmcif: Fix DMA slave address configuration
Commit e5a233cb64 ("mmc: sh_mmcif:
Factorize DMA channel request and configuration code") incorrectly
set the destination address for both slave channels instead of setting
the source address for the receive channel. Fix that.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-26 11:38:19 +02:00
Chuanxiao.Dong
6b91f2d42a mmc: sdhci-pci: remove PCI PM functions in suspend/resume callback
It is not required (in fact it even is not recommended) that a PCI
driver's suspend() callback save the standard configuration registers
of the device, prepare it for waking up the system, or put it into a
low-power state.  All of these operations can very well be taken
care of by the PCI subsystem, without the driver's participation. Thus
remove these PCI functions.

For the device which has wake up capability, use device_init_wakeup to
init the wake up capability so that PCI core will help to enable the wakeup
for it.

Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-26 11:23:41 +02:00
Georgi Djakov
6096d7a8c1 mmc: sdhci-msm: Get COMPILE_TEST support
Increase the build testing coverage.

Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-26 11:08:17 +02:00
Georgi Djakov
d30f01b0e8 mmc: sdhci-msm: Remove unnecessary header file inclusion
The header <linux/regulator/consumer.h> is unused. Remove it.

Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-26 11:08:11 +02:00
Maurice Petallo
f25c33724d mmc: sdhci: add DDR50 1.8V mode support for BayTrail eMMC Controller
This is to enable DDR50 bus speed mode with 1.8V signaling capability
for BayTrail ACPI and PCI mode eMMC Controller.

Signed-off-by: Maurice Petallo <mauricex.r.petallo@intel.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-10 14:58:29 +02:00
Maurice Petallo
d61b59461b mmc: sdhci: Preset value not supported in Baytrail eMMC
"SDHCI_QUIRK2_PRESET_VALUE_BROKEN" quirk is added to prohibit
preset value enabling for Baytrail eMMC controller.

Signed-off-by: Maurice Petallo <mauricex.r.petallo@intel.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-10 14:57:37 +02:00
Geert Uytterhoeven
1ef9474048 mmc: MMC_USDHI6ROL0 should depend on HAS_DMA
If NO_DMA=y:

    drivers/built-in.o: In function `usdhi6_dma_setup':
    usdhi6rol0.c:(.text+0x5c35fc): undefined reference to `dma_map_sg'
    drivers/built-in.o: In function `usdhi6_dma_stop_unmap':
    usdhi6rol0.c:(.text+0x5c3738): undefined reference to `dma_unmap_sg'

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-10 14:45:26 +02:00
Geert Uytterhoeven
0e7d437868 mmc: MMC_SH_MMCIF should depend on HAS_DMA
If NO_DMA=y:

    drivers/built-in.o: In function `sh_mmcif_start_dma_tx':
    sh_mmcif.c:(.text+0x5a3286): undefined reference to `dma_map_sg'
    drivers/built-in.o: In function `sh_mmcif_start_dma_rx':
    sh_mmcif.c:(.text+0x5a33fc): undefined reference to `dma_map_sg'
    drivers/built-in.o: In function `sh_mmcif_end_cmd':
    sh_mmcif.c:(.text+0x5a3668): undefined reference to `dma_unmap_sg'

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-10 14:45:16 +02:00
Geert Uytterhoeven
c00c594d88 mmc: MMC_OMAP_HS should depend on HAS_DMA
If NO_DMA=y:

    drivers/built-in.o: In function `omap_hsmmc_pre_dma_transfer':
    omap_hsmmc.c:(.text+0x5a0928): undefined reference to `dma_map_sg'
    drivers/built-in.o: In function `omap_hsmmc_dma_cleanup':
    omap_hsmmc.c:(.text+0x5a0e8e): undefined reference to `dma_unmap_sg'
    drivers/built-in.o: In function `omap_hsmmc_dma_callback':
    omap_hsmmc.c:(.text+0x5a1f58): undefined reference to `dma_unmap_sg'
    drivers/built-in.o: In function `omap_hsmmc_post_req':
    omap_hsmmc.c:(.text+0x5a2082): undefined reference to `dma_unmap_sg'

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-10 14:44:39 +02:00
Peter Griffin
f52d9c4f45 mmc: sdhci-st: Intial support for ST SDHCI controller
This platform driver adds initial support for the SDHCI host controller
found on STMicroelectronics SoCs.

It has been tested on STiH41x b2020 platforms currently.

Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-10 09:11:18 +02:00