Commit Graph

24 Commits

Author SHA1 Message Date
Pierre-Yves MORDRET
cc832dc8e3 dmaengine: stm32-dma: check whether length is aligned on FIFO threshold
When a period length is not multiple of FIFO some data may be stuck
within FIFO.

Burst/FIFO Threshold/Period or buffer length check has to be hardened

In any case DMA will grant any request from client but will degraded
any parameters whether awkward.

Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2018-10-02 20:32:15 +05:30
Benjamin Gaignard
90ec93cb6b dmaengine: stm32: replace "%p" with "%pK"
The format specifier "%p" can leak kernel addresses.
Use "%pK" instead.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2018-07-09 23:01:57 +05:30
Pierre Yves MORDRET
9df3bd5520 dmaengine: stm32-dma: properly mask irq bits
A single register of the controller holds the information for four dma
channels.
The functions stm32_dma_irq_status() don't mask the relevant bits after
the shift, thus adjacent channel's status is also reported in the returned
value.
Fixed by masking the value before returning it.

Similarly, the function stm32_dma_irq_clear() don't mask the input value
before shifting it, thus an incorrect input value could disable the
interrupts of adjacent channels.
Fixed by masking the input value before using it.

Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2018-04-04 11:49:36 +05:30
Pierre Yves MORDRET
80a76952a5 dmaengine: stm32-dma: fix max items per transfer
Having 0 in item counter register is valid and stands for a "No or Ended
transfer". Therefore valid transfer starts from @+0 to @+0xFFFE leading to
unaligned scatter gather at boundary. Thus it's safer to round down this
value on its FIFO size (16 Bytes).

Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2018-04-04 11:49:36 +05:30
Pierre Yves MORDRET
c2d86b1cd6 dmaengine: stm32-dma: fix DMA IRQ status handling
Update the way Transfer Complete and Half Transfer Complete status are
acknowledge. Even if HTI is not enabled its status is shown when reading
registers, driver has to clear it gently and not raise an error.

Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2018-04-04 11:49:36 +05:30
Pierre Yves MORDRET
a2b6103b7a dmaengine: stm32-dma: Improve memory burst management
This patch improves memory burst capability using best burst size
according to transferred buffer size from/to memory.

>From now on, memory burst is not necessarily same as with peripheral
burst one and fifo threshold is directly managed by this driver in order
to fit with computed memory burst.

Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2018-04-04 11:49:36 +05:30
Pierre Yves MORDRET
249d553118 dmaengine: stm32-dma: fix typo and reported checkpatch warnings
Fix typo in a comment and solved reported checkpatch warnings.

Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2018-04-04 11:49:36 +05:30
Pierre Yves MORDRET
e57cb3b3f1 dmaengine: stm32-dma: fix incomplete configuration in cyclic mode
When in cyclic mode, the configuration is updated after having started the
DMA hardware (STM32_DMA_SCR_EN) leading to incomplete configuration of
SMxAR registers.

Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: Hugues Fruchet <hugues.fruchet@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2018-04-04 11:49:36 +05:30
Pierre Yves MORDRET
951f44cb6c dmaengine: stm32-dma: threshold manages with bitfield feature
>From now on, DMA bitfield is to manage DMA FIFO Threshold.

Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2018-04-04 11:49:36 +05:30
Colin Ian King
041cf7e064 dmaengine: stm32-dma: fix up error dev_err message
Trivial fix to spelling mistake and make channel plural.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-03-06 10:41:24 +05:30
Linus Torvalds
97a229f907 dmaengine updates for 4.11-rc1
This time we fairly boring and bit small update.
 
 - Support for Intel iDMA 32-bit hardware
 - deprecate broken support for channel switching in async_tx
 - bunch of updates on stm32-dma
 - Cyclic support for zx dma and making in generic zx dma driver
 - Small updates to bunch of other drivers
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJYrI1RAAoJEHwUBw8lI4NHMH4QALbxsOzil+Sl5gq27xK02ox3
 8NGkVdAZgUlMI0m7VnPrdenhLy+t7wz383RM0/DUJfHqJItwxdR+895GRwe5TJTl
 PJJMrrdURv6k24ZqUq1b8qKN51YOjp9aVX6sjKi531fcf1Cmj6nuquo8/gIlZtQC
 GnLPQGqgK/i5EX/LGQwuHw4j6hESsLGu1vCPdJBSRGzlzd6T4rbmc2ApUjSB1PRO
 uhmLrORdkbQnxnt1mUYDlEVwGy/0wVNML89k/SX1g/70NI2kvVUn2NX5Aq7+C+vl
 iIdBfYXuPDnhygrze8jYNd6acc9MWyKp7uYelTtm+m4tvVMAD2UJS/eXgbgkcyLj
 XoGGkfjDLlK40gQDqnWiNfLi+Dn899ZEwXvCZNsQa72RS32wiatu3ZG39x+a55mK
 XISolM57iph975C4manY2sxLfOZmM5qmXg8+JGMppine5U2kmID44Y72jYKLNeUU
 EjMCVeZidx7LFkAR8BfA5pZt2BBIooHcncIwD9MW9KsEMPqzMcjqg9Wvxn/hSIUu
 VGPVnBZrz/IBSeN9sqMmXWVY0kI+teC7bFZHecZBOUylOyxcQ9ZBHT7Ie2wM2piM
 fY4UYWTtn9p/YOrfE32iSn226ga6a0Pk1kEfWgOQ/KXmOd20D33z0NYY9xOQ/CXC
 aT+Skn10zjYZbfU0MCp5
 =pcdH
 -----END PGP SIGNATURE-----

Merge tag 'dmaengine-4.11-rc1' of git://git.infradead.org/users/vkoul/slave-dma

Pull dmaengine updates from Vinod Koul:
 "This time we fairly boring and bit small update.

   - Support for Intel iDMA 32-bit hardware
   - deprecate broken support for channel switching in async_tx
   - bunch of updates on stm32-dma
   - Cyclic support for zx dma and making in generic zx dma driver
   - Small updates to bunch of other drivers"

* tag 'dmaengine-4.11-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (29 commits)
  async_tx: deprecate broken support for channel switching
  dmaengine: rcar-dmac: Widen DMA mask to 40 bits
  dmaengine: sun6i: allow build on ARM64 platforms (sun50i)
  dmaengine: Provide a wrapper for memcpy operations
  dmaengine: zx: fix build warning
  dmaengine: dw: we do support Merrifield SoC in PCI mode
  dmaengine: dw: add support of iDMA 32-bit hardware
  dmaengine: dw: introduce register mappings for iDMA 32-bit
  dmaengine: dw: introduce block2bytes() and bytes2block()
  dmaengine: dw: extract dwc_chan_pause() for future use
  dmaengine: dw: replace convert_burst() with one liner
  dmaengine: dw: register IRQ and DMA pool with instance ID
  dmaengine: dw: Fix data corruption in large device to memory transfers
  dmaengine: ste_dma40: indicate granularity on channels
  dmaengine: ste_dma40: indicate directions on channels
  dmaengine: stm32-dma: Add error messages if xlate fails
  dmaengine: dw: pci: remove LPE Audio DMA ID
  dmaengine: stm32-dma: Add max_burst support
  dmaengine: stm32-dma: Add synchronization support
  dmaengine: stm32-dma: Fix residue computation issue in cyclic mode
  ...
2017-02-21 17:06:22 -08:00
M'boumba Cedric Madianga
5df4eb453c dmaengine: stm32-dma: Add error messages if xlate fails
This patch adds some error messages when a slave device fails to request a
channel.

Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Reviewed-by: Ludovic BARRE <ludovic.barre@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-10 10:50:47 +05:30
M'boumba Cedric Madianga
276b0046ff dmaengine: stm32-dma: Add max_burst support
This patch sets the max_burst value supported by the STM32 DMA

Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-03 09:23:23 +05:30
M'boumba Cedric Madianga
dc80867510 dmaengine: stm32-dma: Add synchronization support
Implement the new device_synchronize() callback to allow proper
synchronization when stopping a channel.

Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-03 09:23:23 +05:30
M'boumba Cedric Madianga
2b12c5580e dmaengine: stm32-dma: Fix residue computation issue in cyclic mode
This patch resolves the residue computation issue detected in cyclic mode.
Now, in cyclic mode, we increment next_sg variable as soon as a period is
transferred instead of after pushing a new sg request.
Then, we take into account that after transferring a complete buffer,
the next_sg variable is equal to 0.

Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Reviewed-by: Ludovic BARRE <ludovic.barre@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-03 09:23:17 +05:30
M'boumba Cedric Madianga
8d1b76f031 dmaengine: stm32-dma: Rework starting transfer management
This patch reworks the way to manage transfer starting.
Now, starting DMA is only allowed when the channel is not busy.
Then, stm32_dma_start_transfer is declared as void.
At least, after each transfer completion, we start the next transfer if a
new descriptor as been queued in the issued list during an ongoing
transfer.

Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Reviewed-by: Ludovic BARRE <ludovic.barre@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-03 09:23:17 +05:30
M'boumba Cedric Madianga
57b5a32135 dmaengine: stm32-dma: Fix null pointer dereference in stm32_dma_tx_status
chan->desc is always set to NULL when a DMA transfer is complete.
As a DMA transfer could be complete during the call of stm32_dma_tx_status,
we need to be sure that chan->desc is not NULL before using this variable
to avoid a null pointer deference issue.

Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Reviewed-by: Ludovic BARRE <ludovic.barre@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-02 09:28:52 +05:30
M'boumba Cedric Madianga
7e96304d99 dmaengine: stm32-dma: Set correct args number for DMA request from DT
This patch sets the right number of arguments to be used for DMA clients
which request channels from DT.

Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Reviewed-by: Ludovic BARRE <ludovic.barre@st.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-01-02 09:28:52 +05:30
Vinod Koul
cad0eca39f dmaengine: stm32-dma: remove unused ‘src_addr’
In stm32_dma_set_xfer_param(), variable ‘src_addr’ is initialized but never used, which
leads to warning with W=1

drivers/dma/stm32-dma.c: In function ‘stm32_dma_set_xfer_param’:
drivers/dma/stm32-dma.c:577:13: warning: variable ‘src_addr’ set but not used [-Wunused-but-set-variable]
  dma_addr_t src_addr, dst_addr;

So remove it.

Reviewed-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-12-12 22:25:22 +05:30
Vinod Koul
2a440bd417 dmaengine: stm32-dma: remove unused ‘dst_addr’
In stm32_dma_set_xfer_param(), variable ‘dst_addr’ is initialized but never used, which
leads to warning with W=1

drivers/dma/stm32-dma.c: In function ‘stm32_dma_set_xfer_param’:
drivers/dma/stm32-dma.c:577:23: warning: variable ‘dst_addr’ set but not used [-Wunused-but-set-variable]
  dma_addr_t src_addr, dst_addr;

So remove it.

Reviewed-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-12-12 22:25:22 +05:30
Vinod Koul
1bc4f06c24 dmaengine: stm32-dma: remove unused ‘sfcr’
In stm32_dma_chan_irq(), variable ‘sfcr’ is initialized but never used, which
leads to warning with W=1

drivers/dma/stm32-dma.c: In function ‘stm32_dma_chan_irq’:
drivers/dma/stm32-dma.c:530:19: warning: variable ‘sfcr’ set but not used [-Wunused-but-set-variable]
  u32 status, scr, sfcr;

So remove it.

Reviewed-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-12-12 22:25:22 +05:30
Vinod Koul
e97adb49b4 dmaengine: stm32-dma: make stm32_dma_set_config static
Sparse complains:
drivers/dma/stm32-dma.c:957:6: warning: symbol 'stm32_dma_set_config' was
not declared. Should it be static?

SO make stm32_dma_set_config static.

Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-09-26 22:31:36 +05:30
M'boumba Cedric Madianga
aea08a5dfa dmaengine: stm32-dma: Fix unchecked deference of chan->desc
'commit d8b468394f ("dmaengine: Add STM32 DMA driver")' leads to the
following Smatch complaint:

drivers/dma/stm32-dma.c:562 stm32_dma_issue_pending()
    error: we previously assumed 'chan->desc' could be null (see line 560)

So, this patch fixes the unchecked dereference of chan->desc by returning
operation not permitted error when stm32_dma_start_transfer() does not
succeed to allocate a virtual channel descriptor.

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-12-10 09:45:22 +05:30
M'boumba Cedric Madianga
d8b468394f dmaengine: Add STM32 DMA driver
This patch adds support for the STM32 DMA controller.

Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-11-16 08:56:10 +05:30