Commit Graph

5890 Commits

Author SHA1 Message Date
Feifei Xu
a6651c98c6 drm/amd/include:cleanup vega10 mp header files.
Cleanup asic_reg/vega10/MP folder, remove mp_9_0_default.h

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:17 -05:00
Feifei Xu
75199b8c7f drm/amd/include:cleanup vega10 hdp header files.
Cleanup asic_reg/vega10/HDP folder, remove hdp_4_0_default.h

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:16 -05:00
Feifei Xu
812f77b749 drm/amd/include:cleanup vega10 sdma0/1 header files.
To remove include/asic_reg/vega10 folder,create IP folders sdma0/1.
This patch cleanup asic_reg/vega10/SDMA folders.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:16 -05:00
Monk Liu
ce1b1b66cd drm/amdgpu:partially revert 1cfd8e237f0318e330190ac21d63c58ae6a1f66c
found RING0 test fail after S3 resume regression, which is
introduced by 1cfd8e237f0318e330190ac21d63c58ae6a1f66c

Because after suspend VRAM will be cleared, so driver must
unpin the GART table(resident in VRAM) during suspend so it
can be evicted to system ram and must correspondingly pin it
during resume so the GART table could be restored to VRAM.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:15 -05:00
Tony Cheng
0293bd519f drm/amd/display: dal 3.1.20
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:14 -05:00
Andrew Jiang
621fd3e39f drm/amd/display: Set OPP default values in init_hw
On S3 resume, we do not reconstruct OPP, but we do need to
reinitialize some of its values to the default ones.
Therefore, move those lines out of the OPP constructor and
into init_hw.

Also reset the hubp power gated flag, since nothing is
power gated at init_hw.

Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:14 -05:00
Tony Cheng
a2c7f9e893 drm/amd/display: dal 3.1.19
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:13 -05:00
Anthony Koo
404dfe1c56 drm/amd/display: DMCU and ABM maintenance and refactor
Remove some globals that should really be per block state.

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:13 -05:00
Yongqiang Sun
8980aa3c9e drm/amd/display: Only program watermark for full update.
For scaling and position change, it isn't necessary to program
watermark and check P-State as well.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:13 -05:00
Tony Cheng
f97da580cf drm/amd/display: dal 3.1.18
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:12 -05:00
Andrew Jiang
7260d1187e drm/amd/display: Set full update flag in dcn_validate_bandwidth
Doing bandwidth validation implies that this is a full update. Set the
flag inside the function in case whatever is calling
dcn_validate_bandwidth doesn't set it.

Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:12 -05:00
Leo (Sunpeng) Li
27b3f4fc91 drm/amd/display: Do not program front-end twice
The sequence of front-end > back-end > front-end programming will
program the front-end more than once. Add a mode_changed flag, and use
it to determine whether the front-end should be programmed before, or
after back-end.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:11 -05:00
Leo (Sunpeng) Li
000b59ea9f drm/amd/display: Trigger full update on plane change
With the optimized DCN10 frontend programming code, things are
programmed only when requested. For now, trigger a full update on all
plane changes.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:11 -05:00
Dmytro Laktyushkin
69cff5a4e3 drm/amd/display: Rename output_bpc to opp_input_bpc
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:11 -05:00
Dmytro Laktyushkin
fb7ae8505e drm/amd/display: fix refclk conversion from khz int to mhz float
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:10 -05:00
Dmytro Laktyushkin
26247e7779 drm/amd/display: fix mpo validation failure
There was an error in translation of mode support check.
"N/A" is a failure condition while "" was a special case.
This change will differentiate between the two by using a
define.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:10 -05:00
Yue Hin Lau
e56dc89b3c drm/amd/display: move csc matrix to hw_shared
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:10 -05:00
Tony Cheng
c1f103fc20 drm/amd/display: dal 3.1.17
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:09 -05:00
Yue Hin Lau
4a43586bac drm/amd/display: update output csc matrix values
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:09 -05:00
Yongqiang Sun
675634c5ab drm/amd/display: Only update output transfer function for full type.
dcn10_translate_regamma_to_hw_format costs 750us to run, it cannot be
called within isr, check update flag before calling, only do it for
full update.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:09 -05:00
Tony Cheng
dce46c5320 drm/amd/display: performance profiling instrumentation
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:08 -05:00
Harry Wentland
a9beb6c741 drm/amd/display: Remove unnecessary dc_link vtable
None of this needs to be a function table or dynamic in any way.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:08 -05:00
Yue Hin Lau
125d10a233 drm/amd/display: fix opp header register define
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:07 -05:00
Yongqiang Sun
480bd0cf45 drm/amd/display: Update dchub and dpp as per update flags.
Check update flags and update dchub and dpp as per flags,
reduce reg access from 347 to 200, duration time reduce
to 170us.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:07 -05:00
Yongqiang Sun
4f804817d5 drm/amd/display: Move update_plane_addr to apply_ctx_for_surface for dce.
Move update_plane_addr to apply_ctx_for_surface, address update will
just be called once, not twice for updat type is full and medium.
This will reduce some reg access and duration time.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:07 -05:00
Yue Hin Lau
afbeb2638b drm/amd/display: call set_mpc_output_csc from hwsequencer
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:06 -05:00
Michel Dänzer
96b8af6eb4 drm/amd/display: Fix description of module parameter dc_log
It was incorrectly referencing the dc parameter, resulting in an empty
description of the dc_log parameter.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:06 -05:00
Michel Dänzer
43fbcde020 drm/amdgpu: Downgrade DRM_ERROR to DRM_DEBUG in amdgpu_queue_mgr_map
Prevent buggy userspace from spamming dmesg.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:06 -05:00
Christian König
5b565e0e5a drm/amdgpu: expose the VA above the hole to userspace
Let userspace know how much area we have above the 48bit VA hole on
Vega10.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:05 -05:00
Christian König
4b7f0848c4 drm/amdgpu: use dev_dbg instead of dev_err in the VA IOCTL
Userspace buggy userspace can spam the logs.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:05 -05:00
Christian König
bb7939b203 drm/amdgpu: fix VA hole handling on Vega10 v3
Similar to the CPU address space the VA on Vega10 has a hole in it.

v2: use dev_dbg instead of dev_err
v3: add some more comments to explain how the hw works

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
CC: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:05 -05:00
Christian König
6af046d26f drm/amdgpu: use the new TTM bytes moved counter v2
Instead of the global statistics use the per context bytes moved counter.

v2: rebased

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:04 -05:00
Christian König
dfb8fa9828 drm/amdgpu: forward operation context to ttm_bo_mem_space
This way we can finally use some more stats.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:04 -05:00
Christian König
2823f4f019 drm/ttm: add context to driver move callback as well
Instead of passing the parameters manually.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:03 -05:00
Christian König
c13c55d611 drm/ttm: use an operation context for ttm_bo_mem_space v2
Instead of specifying interruptible and no_wait_gpu manually.

v2: rebase

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:02 -05:00
Christian König
6fead44a4c drm/ttm: use an operation ctx for ttm_bo_init_reserved
Instead of specifying if sleeping should be interruptible.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:02 -05:00
Christian König
19be557010 drm/ttm: add operation ctx to ttm_bo_validate v2
Give moving a BO into place an operation context to work with.

v2: rebased

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:01 -05:00
Ernst Sjöstrand
8cdbad98c5 drm/amd/powerplay: Followup fixes to mc_reg_address
This is a followup to:
drm/amd/powerplay: Fix buffer overflows with mc_reg_address

Rework *_set_mc_special_registers for the other architectures to
use the same logic as the first patch. This allows the last entry
of the array to be filled without an error message for example.
This doesn't fix any known problems, perhaps avoided by luck.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:00 -05:00
Ernst Sjöstrand
47e8788b49 drm/amd/powerplay: Fix buffer overflows with mc_reg_address
Smatch warned about the following lines:
ci_set_mc_special_registers() error: buffer overflow 'table->mc_reg_address' 16 <= 16
tonga_set_mc_special_registers() error: buffer overflow 'table->mc_reg_address' 16 <= 16

Change the logic to check before access instead of after incrementing.
It's fine if j reaches max after we're done. This allows the last entry
of the array to be filled without an error message for example.
Changed some whitespace to clarify grouping.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:48:00 -05:00
Ernst Sjöstrand
7d0331007a drm/amd/amdgpu: Fix missing null check in atombios_i2c.c
Reported by smatch:
amdgpu_atombios_i2c_process_i2c_ch() error: we previously assumed 'buf' could be null

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:59 -05:00
Ernst Sjöstrand
e9c227b253 drm/amd/powerplay: Fix missing newlines at end of file
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:59 -05:00
Ernst Sjöstrand
19fef71cd1 drm/amd/powerplay: Minor fixes in processpptables.c (v2)
Reported by smatch:
init_overdrive_limits() error: uninitialized symbol 'result'.
get_clock_voltage_dependency_table() warn: inconsistent indenting

v2: set result to 0 (Alex)

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:59 -05:00
Christian König
235943189d drm/amdgpu: fix VCE buffer placement restrictions v2
Turned out that VCE still has a placement restriction that BOs can't
cross a 4GB boundary.

Fix this by adding a command submission parser prepass to correctly
place the buffers.

v2: add function description

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:58 -05:00
Christian König
b98f1b9e5e drm/amdgpu: align GTT start to 4GB v2
For VCE to work properly the start of the GTT space must be aligned to a
4GB boundary.

v2: add comment why we do this

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:58 -05:00
Christian König
3d647c8f93 drm/amdgpu: remove VRAM size reduction v2
Remove some outdated comments and all code which tries to reduce the VRAM size
mapped into the MC.

This is superfluous and misleading since we never actually program the size.

v2: handle gmc_v6_0.c as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:58 -05:00
Joe Perches
4f42a2dd3d drm: amd: Fix line continuation formats
Line continuations with excess spacing causes unexpected output.

Miscellanea:

o Added missing '\n' to a few of the coalesced pr_<level> formats

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:57 -05:00
Gustavo A. R. Silva
8aa111e34d drm/amd/display/dc/dce110/dce110_mem_input_v: use swap macro in program_size_and_rotation
Make use of the swap macro instead of _manually_ swapping values
and remove unnecessary variable swap.

This makes the code easier to read and maintain.

This code was detected with the help of Coccinelle.

Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:57 -05:00
Gustavo A. R. Silva
99676f20dc drm/amd/display/dc/core/dc_resource: use swap macro in rect_swap_helper
Make use of the swap macro instead of _manually_ swapping values
and remove unnecessary variable temp.

This makes the code easier to read and maintain.

This code was detected with the help of Coccinelle.

Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:56 -05:00
Alex Deucher
5a16008f53 drm/amdgpu/gmc9: make some ECC messages debug only
To avoid spamming the logs on non-ECC boards.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:56 -05:00
Christian König
b3cce46575 drm/amdgpu: always make gart.table_addr 64bit
Fixing warning/compile errors on 32bit kernels.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:56 -05:00
Colin Ian King
e778c1319b drm/amd/display: remove unnecessary cast and use kcalloc instead of kzalloc
Use kcalloc instead of kzalloc and the cast on the return from kzalloc is
unnecessary and can be removed.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:55 -05:00
Christian König
31b8adab32 drm/amdgpu: require a root bus window above 4GB for BAR resize
Don't even try to resize the BAR when there is no window above 4GB.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:53 -05:00
Shirish S
35888630cb drm/amd/display: fix static checker warning
This patch fixes static checker warning of
"warn: cast after binop" introduced by
56087b31 drm/amd/display: fix high part address in dm_plane_helper_prepare_fb()

Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:53 -05:00
Monk Liu
1719efc232 drm/amdgpu:cancel timer of virtual DCE(v2)
virtual DCE Timer structure is already released
after its sw_fini(), so we need to cancel the
its Timer in hw_fini() otherwise the Timer canceling
is missed.

v2:
use for loop and num_crtc to replace original code

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:52 -05:00
Monk Liu
129d65c18e drm/amdgpu:fix virtual dce bug
this fix the issue that access memory after freed
after driver unloaded.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:52 -05:00
Monk Liu
2413613506 drm/amdgpu:show error message if fail on event4
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:52 -05:00
Monk Liu
a95b0275ff drm/amdgpu:cleanup firmware.fw_buf alloc/free
use bo_create/free_kernel instead of manually doing it

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:51 -05:00
Monk Liu
84e5b5161e drm/amdgpu:free CSA in unified place
instead of doing it in each GFX ip's sw_fini

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:51 -05:00
Monk Liu
9921167d90 drm/amdgpu:cleanup unused stack var
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:50 -05:00
Monk Liu
f59548c882 drm/amdgpu:fix NULL pointer access during drv remove
NULL pointer is because original logic will step into
set_pde_pte() even after the gart.ptr is freed due to
there are twice gart_unbind() on all gart area.

also, there are other minor fixes:
1,since gart_init only create dummy page, the corresponding
gart_fini shouldn't do more like unbinding all GART, this is
unnecessary because in driver fini stage all GART unbinding
had already been done during each IP's SW_FINI (GMC's
SW_FINI is the last one called), so remove the step
for the GART unbinding in gart_fini().

2,gart_fini() is already invoked during each GMC IP's gart_fini
routine,e.g. gmc_vx_0_gart_fini(), so no need to manually
call it during ttm_fini().

3,amdgpu_gem_force_release() should be put ahead of
amdgpu_vm_manager_fini()

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:50 -05:00
Monk Liu
c79ee7d8c6 drm/amdgpu:cleanup GMC & gart garbage function
for gart_ram_alloc/free, they are never used in driver thus
ripe them out totally.

for gart_vram_pin/unpin, they are not needed becuase we can
use bo_creat_kernel/free to replace the original manual way
in the gart_vram_alloc/free, thus gart_vram_pin/unpin can
also be riped out.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:50 -05:00
Monk Liu
11c6b82afb drm/amdgpu:cleanup stolen vga memory finish
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:49 -05:00
Michel Dänzer
299c776ceb amdgpu: Don't use DRM_ERROR when failing to allocate a BO
This can be triggered by userspace, e.g. trying to allocate too large a
BO, so it shouldn't log anything by default.

Callers need to handle failure anyway.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:49 -05:00
Roger He
424e2c8580 drm/amd/amdgpu: not allow gtt size exceed 75%*system memory size
keep consistency with threshold of swapout

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:49 -05:00
David Panariti
02bab92328 drm/amdgpu: Add ability to determine and report if board supports ECC.
Make initialization code check the ECC related registers, which are initialized
by the VBIOS, to see if ECC is present and initialized and DRM_INFO() the
result.

Signed-off-by: David Panariti <David.Panariti@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:48 -05:00
David Panariti
26f1108525 drm/amdgpu: New header for fields needed to determine state of ECC.
Add header files with ECC related definitions
(MASKs, SHIFTs, DEFAULTs and OFFSETS).

Signed-off-by: David Panariti <David.Panariti@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:48 -05:00
Alex Deucher
56f3df448c drm/amdgpu/gfx6: use cached values for raster config in clear state
Use the cached values rather than hardcoding it.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:47 -05:00
Alex Deucher
adfb81659c drm/amdgpu/gfx7: use cached values for raster config in clear state
Use the cached values rather than hardcoding it.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:47 -05:00
Alex Deucher
93442184c0 drm/amdgpu/gfx8: use cached values for raster config in clear state
Use the cached values rather than hardcoding it.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:46 -05:00
Leo (Sunpeng) Li
671b00e26c drm/amd/display: Fix use before initialize warning
on stream_for_cursor. Initialize to NULL.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:46 -05:00
Harry Wentland
db65d4ad91 drm/amd/display: Fix Linux after optimize frontend programming
We still require the update_plane_addr call in commit_planes_for_stream.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:46 -05:00
Tony Cheng
0084e7fc0f drm/amd/display: remove stream_func vtable
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Sun peng Li <Sunpeng.Li@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:45 -05:00
Harry Wentland
2a06e0a5a4 drm/amd/display: Remove unnecessary dc_stream vtable
There's no need to have this as a vtable. The vtable was initially
used for stream_adjust_vmin_vmax but the condition checked here
(set_drr) is always true, hence we don't need to assign this
dynamically anymore.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:45 -05:00
Harry Wentland
2e5fa5ba50 drm/amd/display: Move dc_link interface to separate header
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:44 -05:00
Harry Wentland
7c0c967209 drm/amd/display: Move dc_stream interface to separate header
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:44 -05:00
Yongqiang Sun
a4e6d14ebe drm/amd/display: Optimize front end programming.
for video scaling changes,
Reduce reg access count from 1044 to 447, duration time
from 4.6ms to 3ms.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:44 -05:00
Leo (Sunpeng) Li
105f6ab86c drm/amd/display: Fix unused variable warning
'struct mpc *mpc' is not used.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:43 -05:00
Andrew Jiang
27b8931327 drm/amd/display: Add check update surfaces for stream wrapper
This allows us to properly clear and set the update flags for all cases.

Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:43 -05:00
Andrew Jiang
746673c79d drm/amd/display: Rename pitch_alignment to linear_pitch_alignment
Also initialize this to 64 for all ASICs.

Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:42 -05:00
Arun Pandey
e994340bfa drm/amd/display: Added Opp and Diags Interface for P to I
Signed-off-by: Arun Pandey <Arun.Pandey@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:42 -05:00
Tony Cheng
949785b5d1 drm/amd/display: fix plane update prior to stream enablement
plane update prior to stream enablement is there to recombine pipe
in case we need free pipe for new display.  need to pass in new state
or we will just re-applyingwhat we already have

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:42 -05:00
Andrew Jiang
19ec320e82 drm/amd/display: Add update flags in to determine surface update type
This way, we can know exactly what triggered the update type we're
looking at, and we can simplify the logic for determining what exactly
needs to be updated in the future.

Also allow a dst rect size increase to go through a medium update,
since that does not require us to increase clock or bandwidth.

Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:41 -05:00
Andrew Jiang
9f89df7d9b drm/amd/display: Remove legacy unused workaround
We shouldn't be able to get a non-visible plane into DC anymore.

Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:41 -05:00
Leo (Sunpeng) Li
e7f93e9067 drm/amd/display: Early return on stream programming failure
The fail goto is incorrect. It will incorrectly release the dc_states on
stream programming failure.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:41 -05:00
Leo (Sunpeng) Li
b674f1edc9 drm/amd/display: Change frontend/backend programming sequence
This is a follow-up to the following change:

Yongqiang Sun: Program front end first when set mode.

Due to pipe-splitting features, how we handle stream enabling and
disabling needs to change.

In the case of pipe split disable, two planes need to be combined back
into the same stream. This needs to be done before any stream
programming happens.

The previous patch addresses this, but breaks cross-platform
compatibility. It's not guaranteed that a dc commit will be called
separately to program planes and streams.

Therefore, we handle the combined commit case by doing plane programming
both before and after stream programming, to handle pipe split disable
and plane enable respectively.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:40 -05:00
Leo (Sunpeng) Li
4faf6eddfb drm/amd/display: Remove dangling planes on dc commit state
When disabling pipe splitting, we need to make sure we disable both
planes used.

This should be done for Linux as well.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:40 -05:00
Yongqiang Sun
b8fce2c9d7 drm/amd/display: Optimize programming front end
In case of update type is medium, optimize squence,
reduce programing time.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:40 -05:00
Roman Li
2194e3ae90 drm/amd/display: Fix unbalanced locking in surface apply
also simplifying syntax and removing unused variable in
dce110_apply_ctx_for_surface()

Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:39 -05:00
Yongqiang Sun
7f914a62c9 drm/amd/display: Apply work around for stutter.
Power on one plane after disable all the planes, for
a hw bug work around to resolve stutter efficiency issue.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:39 -05:00
Dmytro Laktyushkin
950d9265b0 drm/amd/display: remove dcn10 wait on tg unlock
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:38 -05:00
Andrew Jiang
5fd9f8a10f drm/amd/display: Loosen plane_info and scaling_info checks
Make it so that differing dcc and plane size fields don't necessarily
result in a full update, along with upscaling modes. This allows us to
save some unnecessary full updates.

Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:38 -05:00
Andrew Jiang
2a875c41cd drm/amd/display: Report pitch_alignment for DCN
Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:38 -05:00
Eric Yang
e14ca95779 drm/amd/display: combine output signal and signal
output signal used to be a public member to be used by DM to override
the stream signal. Now since there is no longer separation between
public and private part of stream, they are combined. The overriding
was not working properly as well, which is addressed by this change

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:37 -05:00
Harry Wentland
bd1be8e894 drm/amd/display: A few more color indentation changes
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:37 -05:00
Harry Wentland
a696dc208f drm/amd/display: Remove unused register read in program_pwl
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:37 -05:00
Harry Wentland
b310b081ad drm/amd/display: Bunch more color indentation cleanups
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:36 -05:00
Harry Wentland
97110c98a0 drm/amd/display: Remove extra arr_points element
arr_points[1] and [2] were duplicated. Remove the extra
one. If we ever need more points we can add them but the
current state of affairs is confusing.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:36 -05:00
Tony Cheng
733a3d2d41 drm/amd/display: dal 3.1.16
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:36 -05:00
Eric Yang
35b71a3f6e drm/amd/display: always call set output tf
Temporary solution to fix gamma adjustment not
working.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:35 -05:00
Yongqiang Sun
e58d866e8d drm/amd/display: Fixed not set scaler bug.
New scaler parameter assign to dpp is after early return,
cause next flip scaler not program.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-06 12:47:35 -05:00