Commit Graph

5 Commits

Author SHA1 Message Date
Shawn Guo
a010bc2b9e ARM: ux500: use machine specific hook for late init
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-08 20:36:38 +08:00
Ola Lilja
25cb3b4cf0 ARM: ux500: Add placeholder for clk_set_parent
Calling clk_set_parent (e.g. from Ux500 ASoC-driver) generates
build-errors.

Signed-off-by: Ola Lilja <ola.o.lilja@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-29 16:32:34 +01:00
Vincent Guittot
763eef8b5b ux500: add debugfs support for powerdebug
Signed-off-by: Vincent Guittot <vincent.guittot@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-20 13:32:45 +01:00
Linus Walleij
ba327b1e52 ARM: 6145/1: ux500 MTU clockrate correction
This adjusts the clockrate for the MTU timer. On the different
UX500 variants this rate is different. The platform can also have
been set up at hardware initialization, bootloader or early init
for different clock speeds. To have the clock framework available
early so the timers can use them, the clock initialization for
Nomadik and ux500 is moved to IRQ init time. A custom per-clock
callback is added to handle special cases like this.

This solves a user-visible bug: without this patch the current
UX500 platforms will not be synchronized to wall-clock time and
the platform will drift in time.

Acked-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-05-27 10:36:08 +01:00
Rabin Vincent
1df20afce5 ARM: 5964/1: ux500: support clock gating
Implement clock gating support for the u8500 clocks.

Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-19 18:29:45 +00:00