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1766 Commits
Author | SHA1 | Message | Date | |
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Paul Walmsley
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6ec4bae178
|
dt-bindings: clock: sifive: add FU540-C000 PRCI clock constants
Add preprocessor macros for the important PRCI output clocks that are needed by both the FU540 PRCI driver and DT data. Details are available in the FU540 manual in Chapter 7 of https://static.dev.sifive.com/FU540-C000-v1.0.pdf Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Palmer Dabbelt <palmer@sifive.com> |
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Neil Armstrong
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a6256b3a92 |
dt-bindings: reset: meson-g12a: Add missing USB2 PHY resets
The G12A Documentation lacked these 2 reset lines, but they are present and
used for each USB 2 PHYs.
Add them to the dt-bindings for the upcoming USB support.
Fixes:
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Linus Torvalds
|
dc2535be1f |
We have a fairly balanced mix of clk driver updates and clk framework
updates this time around. It's the usual pile of new drivers for new hardware out there and the normal small fixes and updates, but then we have some core framework changes too. In the core framework, we introduce support for a clk_get_optional() API to get clks that may not always be populated and a way to devm manage clkdev lookups registered by provider drivers. We also do some refactoring to simplify the interface between clkdev and the common clk framework so we can reuse the DT parsing and clk_get() path in provider drivers in the future. This work will continue in the next few cycles while we convert how providers specify clk parents. On the driver side, the biggest part of the dirstat is the Amlogic clk driver that got support for the G12A SoC. It dominates with almost half the overall diff, while the second largest part of the diff is in the i.MX clk driver that gained support for imx8mm SoCs. After that, we have the Actions Semiconductor and Qualcomm drivers rounding out the big part of the dirstat because they both got new hardware support for SoCs. The rest is just various updates and non-critical fixes for existing drivers. Core: - Convert a few clk bindings to JSON schema format - Add a {devm_}clk_get_optional() API - Add devm_clk_hw_register_clkdev() API to manage clkdev lookups - Start rewriting clk parent registration and supporting device links by moving around code that supports clk_get() and DT parsing of the 'clocks' property New Drivers: - Add Qualcomm MSM8998 RPM managed clks - IPA clk support on Qualcomm RPMh clk controllers - Actions Semi S500 SoC clk support - Support for fixed rate clks populated from an MMIO register - Add RPC (QSPI/HyperFLASH) clocks on Renesas R-Car V3H - Add TMU (timer) clocks on Renesas RZ/G2E - Add Amlogic G12A Always-On Clock Controller - Add 32k clock generation for Amlogic AXG - Add support for the Mali GPU clocks on Amlogic Meson8 - Add Amlogic G12A EE clock controller driver - Add missing CANFD clocks on Renesas RZ/G2M and RZ/G2E - Add i.MX8MM SoC clk driver support Removed Drivers: - Remove clps711x driver as the board support is gone Updates: - 3rd ECO fix for Mediatek MT2712 SoCs - Updates for Qualcomm MSM8998 GCC clks - Random static analysis fixes for clk drivers - Support for sleeping gpios in the clk-gpio type - Minor fixes for STM32MP1 clk driver (parents, critical flag, etc.) - Split LCDC into two clks on the Marvell MMP2 SoC - Various DT of_node refcount fixes - Get rid of CLK_IS_BASIC from TI code (yay!) - TI Autoidle clk support - Fix Amlogic Meson8 APB clock ID name - Claim input clocks through DT for Amlogic AXG and GXBB - Correct the DU (display unit) parent clock on Renesas RZ/G2E - Exynos5433 IMEM CMU crypto clk support (SlimSS) - Fix for the PLL-MIPI on the Allwinner A23 - Fix Rockchip rk3328 PLL rate calculation - Add SET_RATE_PARENT flag on display clk of Rockhip rk3066 - i.MX SCU clk driver clk_set_parent() and cpufreq support -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAlyIK9URHHNib3lkQGtl cm5lbC5vcmcACgkQrQKIl8bklSUtIA//SRHcUJBuF7bgLs0GWDL/C0WwQf90bgLn 83jMUX9MCIS+/RBEUi/Xf9psGVaW3YPEAiRcYUeI1YIZhCrdZHp2YGClKOpXaXth vgM7Je+6Say+7ru6J9eHqhbEgx2e+HqT4shxK5I5J0SqMFgdugim4pthk+Lr/WL0 bMdNHTERZUFrIId10RxuCH7D72nhkwiRkwNDfWjASKoH3spXLKC1vl/wbS5QDE1O eXA9OwkonSyrBKX7zMeQiks6f7HWoJO7ei05Twv4CD9UEeS17KmB6mkbmT3GPAuq dWbLOnt7I80fMnthKLIR0IWtJuCvPv3jXgP+Fin+e4wutNCnuduHIVc2XeQYmDaX rbo/20q4DarL2AaakuowXA7UJ75zYfxPkwgpwcYZ/QW9yzT6QMfynAYekjJGTdt3 6VootYAwYIsh1VMGZIQLs23AaNYayDy0QWx/prxnEi95lK/+zjqVySPYC/rWe7XQ rUrO6YY0YxRdf5uVHneIfIJGs5F/Q8DgdLXp4tf2Ud2YF1bZ0UQOUKehxwM0rxRX F9P6iP6mHUuUPMa9rDlwSmgQXDdqH7E5IbXdSPjEFBogBfmhJfVKAo1EyaZgUytZ Y42qG/P3fGGfegfWTRAoaDRJn/+HfEmtREdgQ8JO14xlZwRDb/M43IEiQP4zGwlc f/OuWu3O9xA= =D4Bv -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk subsystem updates from Stephen Boyd: "We have a fairly balanced mix of clk driver updates and clk framework updates this time around. It's the usual pile of new drivers for new hardware out there and the normal small fixes and updates, but then we have some core framework changes too. In the core framework, we introduce support for a clk_get_optional() API to get clks that may not always be populated and a way to devm manage clkdev lookups registered by provider drivers. We also do some refactoring to simplify the interface between clkdev and the common clk framework so we can reuse the DT parsing and clk_get() path in provider drivers in the future. This work will continue in the next few cycles while we convert how providers specify clk parents. On the driver side, the biggest part of the dirstat is the Amlogic clk driver that got support for the G12A SoC. It dominates with almost half the overall diff, while the second largest part of the diff is in the i.MX clk driver that gained support for imx8mm SoCs. After that, we have the Actions Semiconductor and Qualcomm drivers rounding out the big part of the dirstat because they both got new hardware support for SoCs. The rest is just various updates and non-critical fixes for existing drivers. Core: - Convert a few clk bindings to JSON schema format - Add a {devm_}clk_get_optional() API - Add devm_clk_hw_register_clkdev() API to manage clkdev lookups - Start rewriting clk parent registration and supporting device links by moving around code that supports clk_get() and DT parsing of the 'clocks' property New Drivers: - Add Qualcomm MSM8998 RPM managed clks - IPA clk support on Qualcomm RPMh clk controllers - Actions Semi S500 SoC clk support - Support for fixed rate clks populated from an MMIO register - Add RPC (QSPI/HyperFLASH) clocks on Renesas R-Car V3H - Add TMU (timer) clocks on Renesas RZ/G2E - Add Amlogic G12A Always-On Clock Controller - Add 32k clock generation for Amlogic AXG - Add support for the Mali GPU clocks on Amlogic Meson8 - Add Amlogic G12A EE clock controller driver - Add missing CANFD clocks on Renesas RZ/G2M and RZ/G2E - Add i.MX8MM SoC clk driver support Removed Drivers: - Remove clps711x driver as the board support is gone Updates: - 3rd ECO fix for Mediatek MT2712 SoCs - Updates for Qualcomm MSM8998 GCC clks - Random static analysis fixes for clk drivers - Support for sleeping gpios in the clk-gpio type - Minor fixes for STM32MP1 clk driver (parents, critical flag, etc.) - Split LCDC into two clks on the Marvell MMP2 SoC - Various DT of_node refcount fixes - Get rid of CLK_IS_BASIC from TI code (yay!) - TI Autoidle clk support - Fix Amlogic Meson8 APB clock ID name - Claim input clocks through DT for Amlogic AXG and GXBB - Correct the DU (display unit) parent clock on Renesas RZ/G2E - Exynos5433 IMEM CMU crypto clk support (SlimSS) - Fix for the PLL-MIPI on the Allwinner A23 - Fix Rockchip rk3328 PLL rate calculation - Add SET_RATE_PARENT flag on display clk of Rockhip rk3066 - i.MX SCU clk driver clk_set_parent() and cpufreq support" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (150 commits) dt-bindings: clock: imx8mq: Fix numbering overlaps and gaps clk: ti: clkctrl: Fix clkdm_name regression for TI_CLK_CLKCTRL_COMPAT clk: fixup default index for of_clk_get_by_name() clk: Move of_clk_*() APIs into clk.c from clkdev.c clk: Inform the core about consumer devices clk: Introduce of_clk_get_hw_from_clkspec() clk: core: clarify the check for runtime PM clk: Combine __clk_get() and __clk_create_clk() clk: imx8mq: add GPIO clocks to clock tree clk: mediatek: correct cpu clock name for MT8173 SoC clk: imx: Refactor entire sccg pll clk clk: imx: scu: add cpu frequency scaling support clk: mediatek: Mark bus and DRAM related clocks as critical clk: mediatek: Add flags to mtk_gate clk: mediatek: Add MUX_FLAGS macro clk: qcom: gcc-sdm845: Define parent of PCIe PIPE clocks clk: ingenic: Remove set but not used variable 'enable' clk: at91: programmable: remove unneeded register read clk: mediatek: using CLK_MUX_ROUND_CLOSEST for the clock of dpi1_sel clk: mediatek: add MUX_GATE_FLAGS_2 ... |
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Abel Vesa
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010d5166bb |
dt-bindings: clock: imx8mq: Fix numbering overlaps and gaps
IMX8MQ_CLK_USB_PHY_REF changes from 163 to 153, this way removing the gap.
All the following clock ids are now decreased by 10 to keep the numbering
right. Doing this, the IMX8MQ_CLK_CSI2_CORE is not overlapped with
IMX8MQ_CLK_GPT1 anymore. IMX8MQ_CLK_GPT1_ROOT changes from 193 to 183 and
all the following ids are updated accordingly.
Reported-by: Patrick Wildt <patrick@blueri.se>
Fixes:
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Linus Torvalds
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cf0240a755 |
This is the bulk of pin control changes for the v5.1 kernel cycle.
No core changes. New drivers: - NXP (ex Freescale) i.MX 8QM driver. - NXP (ex Freescale) i.MX 8MM driver. - AT91 SAM9X60 subdriver. Improvements: - Support for external interrups (EINT) on Mediatek virtual GPIOs. - Make BCM2835 pin config fully generic. - Lots of Renesas SH-PFC incremental improvements. -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJchil8AAoJEEEQszewGV1zTCcP/AurT3InBO4nVdN9UMuoDL7P gx3SALULapc4+M1NUoRw+w+z5fvjd0gGdPXZeyhX1E9kXxLmWBmBf6tl0MO2YYPC UWbSnBaWIOOli0f4k+GKVF8LKqD0z0e/YqX4mG7UI3OLJzcJgm7OL9uXN3Gh7tIP Pa6CGbv0aRDkZpWUD2ZTpSPCRYGT57roVq//d7V7s+0lveS97pQuMv43YlS5L2my JOOhHNG33bgi4lS/ZOP81G16oOrVaoupXuX7E+AvgG6vxr5965Fi+qoGLkxIuYOm jtrzuNY98eL2m9b505VYdNmD7ouBhG6CKFb4njpOvjkkqNUXOaGV53wlEuEYRUNz bsp0596+dlOcW7wl11r6YI4Kyn2wQJFql1AwS8A4dEtbuboGrDy16N3adr1SkIGZ 4ESN8xydcC7CAgUGXks+AgDj9vYwOs4apylJDW5tMk4K0LIsEYsDkbNeS9hwDYIH ZlbQe9N2loB6qQbX3c3D3/sIhKj2VB4elONSwOW10M8OJdJwp8h44UyMZ3TIEHIT 7Gu9pw5vobXbccKCSjqkYYflaHMmjwZUtLqDZws818sbe/xgDxONbRqloZCLV39Y kmwRGbbE5WtNAM0X+ABwMG3Lm77wxCFKCjJwLHH79qqt4kSBynEKXQ4D/coG/Hln 6idanzKEPiIBJ+6QLdbQ =EfXK -----END PGP SIGNATURE----- Merge tag 'pinctrl-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "This is a calm cycle, not much happened this time around: not even much incremental development. Some three new drivers, that is all. No core changes. New drivers: - NXP (ex Freescale) i.MX 8QM driver. - NXP (ex Freescale) i.MX 8MM driver. - AT91 SAM9X60 subdriver. Improvements: - Support for external interrups (EINT) on Mediatek virtual GPIOs. - Make BCM2835 pin config fully generic. - Lots of Renesas SH-PFC incremental improvements" * tag 'pinctrl-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (70 commits) pinctrl: imx: fix scu link errors dt-bindings: pinctrl: Document the i.MX50 IOMUXC binding pinctrl: qcom: spmi-gpio: Reorder debug print pinctrl: nomadik: fix possible object reference leak pinctrl: stm32: return error upon hwspinlock failure pinctrl: stm32: fix memory leak issue pinctrl: sh-pfc: r8a77965: Add DRIF pins, groups and functions pinctrl: sh-pfc: r8a77965: Add TMU pins, groups and functions pinctrl: sh-pfc: Validate fixed-size field widths at build time pinctrl: sh-pfc: sh73a0: Fix fsic_spdif pin groups pinctrl: sh-pfc: r8a7792: Fix vin1_data18_b pin group pinctrl: sh-pfc: r8a7791: Fix scifb2_data_c pin group pinctrl: sh-pfc: emev2: Add missing pinmux functions pinctrl: sunxi: Support I/O bias voltage setting on A80 pinctrl: ingenic: Add LCD pins for the JZ4725B SoC pinctrl: samsung: Remove legacy API for handling external wakeup interrupts mask pinctrl: bcm2835: Direct GPIO config changes to generic pinctrl pinctrl: bcm2835: declare pin config as generic pinctrl: qcom: qcs404: Drop unused UFS_RESET macro dt-bindings: add documentation for slew rate ... |
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Stephen Boyd
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fea0b0850a |
Merge branches 'clk-typo', 'clk-json-schema', 'clk-mtk-2712-eco' and 'clk-rockchip' into clk-next
- Convert a few clk bindings to JSON schema format - 3rd ECO fix for Mediatek MT2712 SoCs * clk-typo: clk: samsung: fix typo * clk-json-schema: dt-bindings: clock: Convert fixed-factor-clock to json-schema dt-bindings: clock: Convert fixed-clock binding to json-schema * clk-mtk-2712-eco: clk: mediatek: update clock driver of MT2712 dt-bindings: clock: add clock for MT2712 * clk-rockchip: clk: rockchip: add CLK_SET_RATE_PARENT for rk3066 lcdc dclks clk: rockchip: fix frac settings of GPLL clock for rk3328 |
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Stephen Boyd
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efb1e0b071 |
Merge branches 'clk-ingenic', 'clk-mtk-mux', 'clk-qcom-sdm845-pcie', 'clk-mtk-crit' and 'clk-mtk' into clk-next
* clk-ingenic: clk: ingenic: Remove set but not used variable 'enable' clk: ingenic: Fix doc of ingenic_cgu_div_info clk: ingenic: Fix round_rate misbehaving with non-integer dividers clk: ingenic: jz4740: Fix gating of UDC clock * clk-mtk-mux: clk: mediatek: using CLK_MUX_ROUND_CLOSEST for the clock of dpi1_sel clk: mediatek: add MUX_GATE_FLAGS_2 * clk-qcom-sdm845-pcie: clk: qcom: gcc-sdm845: Define parent of PCIe PIPE clocks * clk-mtk-crit: clk: mediatek: Mark bus and DRAM related clocks as critical clk: mediatek: Add flags to mtk_gate clk: mediatek: Add MUX_FLAGS macro * clk-mtk: clk: mediatek: correct cpu clock name for MT8173 SoC |
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Stephen Boyd
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75f486c015 |
Merge branches 'clk-qcom-msm8998', 'clk-fractional-parent', 'clk-x86-mv' and 'clk-SA-fixes' into clk-next
- Updates for qcom MSM8998 GCC clks - qcom MSM8998 RPM managed clks - Random static analysis fixes for clk drivers * clk-qcom-msm8998: clk: qcom: Make common clk_hw registrations clk: qcom: smd: Add support for MSM8998 rpm clocks clk: qcom: Skip halt checks on gcc_usb3_phy_pipe_clk for 8998 clk: qcom: Add missing freq for usb30_master_clk on 8998 clk: qcom: Add CLK_SET_RATE_PARENT for 8998 branch clocks * clk-fractional-parent: clk: fractional-divider: check parent rate only if flag is set * clk-x86-mv: clk: x86: Move clk-lpss.h to platform_data/x86 * clk-SA-fixes: clk: mediatek: fix platform_no_drv_owner.cocci warnings clk: tegra: dfll: Fix debugfs_simple_attr.cocci warnings clk: qoriq: Improve an error message |
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Stephen Boyd
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461ea6ab2c |
Merge branches 'clk-qcom-rpmh', 'clk-gpio-sleep', 'clk-stm32mp1', 'clk-qcom-qcs404' and 'clk-actions-s500' into clk-next
- IPA clk support on Qualcomm RPMh clk controllers - Support sleeping gpios in clk-gpio type - Minor fixes for STM32MP1 clk driver (parents, critical flag, etc.) - Actions Semi S500 SoC clk support * clk-qcom-rpmh: clk: qcom: clk-rpmh: Add IPA clock support * clk-gpio-sleep: clk: clk-gpio: add support for sleeping GPIOs in gpio-gate-clk * clk-stm32mp1: dt-bindings: clock: remove unused definition for stm32mp1 clk: stm32mp1: fix bit width of hse_rtc divider clk: stm32mp1: remove unnecessary CLK_DIVIDER_ALLOW_ZERO flag clk: stm32mp1: fix HSI divider flag clk: stm32mp1: fix mcu divider table clk: stm32mp1: set ck_csi as critical clock clk: stm32mp1: add CLK_SET_RATE_NO_REPARENT to Kernel clocks clk: stm32mp1: parent clocks update * clk-qcom-qcs404: clk: qcom: gcc-qcs404: Add cfg_offset for blsp1_uart3 clock clk: qcom: clk-rcg2: Introduce a cfg offset for RCGs clk: qcom: remove empty lines in clk-rcg.h * clk-actions-s500: clk: actions: Add clock driver for S500 SoC dt-bindings: clock: Add DT bindings for Actions Semi S500 CMU clk: actions: Add configurable PLL delay |
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Stephen Boyd
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e7faa095cb |
Merge branches 'clk-imx', 'clk-samsung', 'clk-ti', 'clk-uniphier-gear' and 'clk-mmp2-lcdc' into clk-next
- Split LCDC into two clks on the Marvell MMP2 SoC * clk-imx: clk: imx8mq: add GPIO clocks to clock tree clk: imx: Refactor entire sccg pll clk clk: imx: scu: add cpu frequency scaling support clk: imx: imx8mm: Mark init function __init clk: imx8mq: Add the missing ARM clock dt-bindings: imx8mq-clock: Add the missing ARM clock clk: imx: imx8mq: Fix the rate propagation for arm pll clk: imx8mq: Add support for the CLKO1 clock clk: imx8mq: Fix the CLKO2 source select list clk: imx8mq: Add missing M4 clocks clk: imx: Add clock driver support for imx8mm dt-bindings: imx: Add clock binding doc for imx8mm clk: imx: Add PLLs driver for imx8mm soc clk: imx5: add imx5_SCC2_IPG_GATE clk: imx: scu: add set parent support clk: imx: scu: add fallback compatible string support clk: imx8mq: Make parent names arrays const pointers clk: imx: Make parents const pointer in mux wrappers clk: imx: Make parent_names const pointer in composite-8m * clk-samsung: clk: samsung: s3c2443: Mark expected switch fall-through clk: samsung: exynos5: Fix kfree() of const memory on setting driver_override clk: samsung: exynos5: Fix possible NULL pointer exception on platform_device_alloc() failure clk: samsung: exynos5433: Add selected IMEM clocks clk: samsung: dt-bindings: Document Exynos5433 IMEM CMU clk: samsung: exynos5433: Fix name typo in sssx clk: samsung: exynos5433: Fix definition of CLK_ACLK_IMEM_{200, 266} clocks clk: samsung: dt-bindings: Add Exynos5433 IMEM CMU clock IDs * clk-ti: clk: clk-twl6040: Fix imprecise external abort for pdmclk ARM: OMAP2+: hwmod: disable ick autoidling when a hwmod requires that clk: ti: check clock type before doing autoidle ops clk: ti: add a usecount for autoidle clk: ti: generalize the init sequence of clk_hw_omap clocks clk: ti: remove usage of CLK_IS_BASIC clk: ti: add new API for checking if a provided clock is an OMAP clock clk: ti: move clk_hw_omap list handling under generic part of the driver * clk-uniphier-gear: clk: uniphier: Fix update register for CPU-gear * clk-mmp2-lcdc: clk: mmp2: separate LCDC peripheral clk form the display clock dt-bindings: marvell,mmp2: Add clock id for the LCDC clock |
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Stephen Boyd
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3f8e7e7247 |
Merge branches 'clk-optional', 'clk-devm-clkdev-register', 'clk-allwinner', 'clk-meson' and 'clk-renesas' into clk-next
- Add a {devm_}clk_get_optional() API - Add devm_clk_hw_register_clkdev() API to manage clkdev lookups * clk-optional: clk: Add (devm_)clk_get_optional() functions clk: Add comment about __of_clk_get_by_name() error values * clk-devm-clkdev-register: clk: clk-st: avoid clkdev lookup leak at remove clk: clk-max77686: Clean clkdev lookup leak and use devm clkdev: add managed clkdev lookup registration * clk-allwinner: clk: sunxi-ng: sun8i-a23: Enable PLL-MIPI LDOs when ungating it * clk-meson: (22 commits) clk: meson: meson8b: fix the naming of the APB clocks dt-bindings: clock: meson8b: add APB clock definition clk: meson: Add G12A AO Clock + Reset Controller dt-bindings: clk: add G12A AO Clock and Reset Bindings clk: meson: factorise meson64 peripheral clock controller drivers clk: meson: g12a: add peripheral clock controller dt-bindings: clk: meson: add g12a periph clock controller bindings clk: meson: pll: update driver for the g12a clk: meson: rework and clean drivers dependencies clk: meson: axg-audio does not require syscon clk: meson: use CONFIG_ARCH_MESON to enter meson clk directory clk: export some clk_hw function symbols for module drivers clk: meson: ao-clkc: claim clock controller input clocks from DT clk: meson: axg: claim clock controller input clock from DT clk: meson: gxbb: claim clock controller input clock from DT clk: meson: meson8b: add the GPU clock tree clk: meson: meson8b: use a separate clock table for Meson8 clk: meson: axg-ao: add 32k generation subtree clk: meson: gxbb-ao: replace cec-32k with the dual divider clk: meson: add dual divider clock driver ... * clk-renesas: clk: renesas: r8a774a1: Fix LAST_DT_CORE_CLK clk: renesas: r8a774c0: Fix LAST_DT_CORE_CLK clk: renesas: r8a774c0: Add TMU clock clk: renesas: r8a77980: Add RPC clocks clk: renesas: rcar-gen3: Add RPC clocks clk: renesas: rcar-gen3: Add spinlock clk: renesas: rcar-gen3: Factor out cpg_reg_modify() clk: renesas: r8a774c0: Correct parent clock of DU clk: renesas: r8a774a1: Add missing CANFD clock clk: renesas: r8a774c0: Add missing CANFD clock |
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Linus Torvalds
|
3601fe43e8 |
This is the bulk of GPIO changes for the v5.1 cycle:
Core changes: - The big change this time around is the irqchip handling in the qualcomm pin controllers, closely coupled with the gpiochip. This rework, in a classic fall-between-the-chairs fashion has been sidestepped for too long. The Qualcomm IRQchips using the SPMI and SSBI transport mechanisms have been rewritten to use hierarchical irqchip. This creates the base from which I intend to gradually pull support for hierarchical irqchips into the gpiolib irqchip helpers to cut down on duplicate code. We have too many hacks in the kernel because people have been working around the missing hierarchical irqchip for years, and once it was there, noone understood it for a while. We are now slowly adapting to using it. This is why this pull requests include changes to MFD, SPMI, IRQchip core and some ARM Device Trees pertaining to the Qualcomm chip family. Since Qualcomm have so many chips and such large deployments it is paramount that this platform gets this right, and now it (hopefully) does. - Core support for pull-up and pull-down configuration, also from the device tree. When a simple GPIO chip support a "off or on" pull-up or pull-down resistor, we provide a way to set this up using machine descriptors or device tree. If more elaborate control of pull up/down (such as resistance shunt setting) is required, drivers should be phased over to use pin control. We do not yet provide a userspace ABI for this pull up-down setting but I suspect the makers are going to ask for it soon enough. PCA953x is the first user of this new API. - The GPIO mockup driver has been revamped after some discussion improving the IRQ simulator in the process. The idea is to make it possible to use the mockup for both testing and virtual prototyping, e.g. when you do not yet have a GPIO expander to play with but really want to get something to develop code around before hardware is available. It's neat. The blackbox testing usecase is currently making its way into kernelci. - ACPI GPIO core preserves non direction flags when updating flags. - A new device core helper for devm_platform_ioremap_resource() is funneled through the GPIO tree with Greg's ACK. New drivers: - TQ-Systems QTMX86 GPIO controllers (using port-mapped I/O) - Gateworks PLD GPIO driver (vaccumed up from OpenWrt) - AMD G-Series PCH (Platform Controller Hub) GPIO driver. - Fintek F81804 & F81966 subvariants. - PCA953x now supports NXP PCAL6416. Driver improvements: - IRQ support on the Nintendo Wii (Hollywood) GPIO. - get_direction() support for the MVEBU driver. - Set the right output level on SAMA5D2. - Drop the unused irq trigger setting on the Spreadtrum driver. - Wakeup support for PCA953x. - A slew of cleanups in the various Intel drivers. -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJcgoLEAAoJEEEQszewGV1zjBAP/3OmTFGv49PFmJwSx+PlLiYf V6/UPaQzq81CGSMtHxbS51TyP9Id7PCfsacbuFYutzn0D1efvl7jrkb8qJ6fVvCM bl/i6q8ipRTPzAf1hD3QCgCe3BXCA064/OcPrz987oIvI3bJQXsmBjBSXHWr4Cwa WfB5DX/afn9TK3XHhMQGfw5f0d+TtnKAs90RTTVKiz9Ow8eFYZJOhgPkvhCR3Gi9 YJIzIAiwhHZ7/zauo4JAYFU/O/Z3YEC5zeLne2ItebzNooRkSxdz0c9Hs7HlCZmU 930Uv9jNN89N3vPqpZzAHtPvwDOmAILMWvKy9xRSp+eoIukarRJgF7ALPk7QWxK1 yy+tGj4dXBQ6tI8W3wUN1WgjNpii3K1HbJ+1LQVQL2/q9o+3YXXqmjdjuw7C8YYV 5ystNrUppkgfIIciHL4lhqw3wKJJhVEAns2V245hIitoShT+RvIg8GQbGZmWlQFd YsHbynqHL9iwfRNv26kEqZXZOo/4D1t6Scw+OPVyba2Wyttf+qbmg+XaYMqFaxYW mfydvdtymeCOUIPJMzw58KGPUTXJ4UPLENyayXNUHokr1a8VO8OIthY7zwi0CpvJ IcsAY9zoGxvfbRV922mlIsw3oOBcM2IN2lC9sY469ZVnjBrdC3rsQpIBZr+Vzz8i YlUfXLSGSyuUZUz//2eG =VoVC -----END PGP SIGNATURE----- Merge tag 'gpio-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO updates from Linus Walleij: "This is the bulk of GPIO changes for the v5.1 cycle: Core changes: - The big change this time around is the irqchip handling in the qualcomm pin controllers, closely coupled with the gpiochip. This rework, in a classic fall-between-the-chairs fashion has been sidestepped for too long. The Qualcomm IRQchips using the SPMI and SSBI transport mechanisms have been rewritten to use hierarchical irqchip. This creates the base from which I intend to gradually pull support for hierarchical irqchips into the gpiolib irqchip helpers to cut down on duplicate code. We have too many hacks in the kernel because people have been working around the missing hierarchical irqchip for years, and once it was there, noone understood it for a while. We are now slowly adapting to using it. This is why this pull requests include changes to MFD, SPMI, IRQchip core and some ARM Device Trees pertaining to the Qualcomm chip family. Since Qualcomm have so many chips and such large deployments it is paramount that this platform gets this right, and now it (hopefully) does. - Core support for pull-up and pull-down configuration, also from the device tree. When a simple GPIO chip supports an "off or on" pull-up or pull-down resistor, we provide a way to set this up using machine descriptors or device tree. If more elaborate control of pull up/down (such as resistance shunt setting) is required, drivers should be phased over to use pin control. We do not yet provide a userspace ABI for this pull up-down setting but I suspect the makers are going to ask for it soon enough. PCA953x is the first user of this new API. - The GPIO mockup driver has been revamped after some discussion improving the IRQ simulator in the process. The idea is to make it possible to use the mockup for both testing and virtual prototyping, e.g. when you do not yet have a GPIO expander to play with but really want to get something to develop code around before hardware is available. It's neat. The blackbox testing usecase is currently making its way into kernelci. - ACPI GPIO core preserves non direction flags when updating flags. - A new device core helper for devm_platform_ioremap_resource() is funneled through the GPIO tree with Greg's ACK. New drivers: - TQ-Systems QTMX86 GPIO controllers (using port-mapped I/O) - Gateworks PLD GPIO driver (vaccumed up from OpenWrt) - AMD G-Series PCH (Platform Controller Hub) GPIO driver. - Fintek F81804 & F81966 subvariants. - PCA953x now supports NXP PCAL6416. Driver improvements: - IRQ support on the Nintendo Wii (Hollywood) GPIO. - get_direction() support for the MVEBU driver. - Set the right output level on SAMA5D2. - Drop the unused irq trigger setting on the Spreadtrum driver. - Wakeup support for PCA953x. - A slew of cleanups in the various Intel drivers" * tag 'gpio-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (110 commits) gpio: gpio-omap: fix level interrupt idling gpio: amd-fch: Set proper output level for direction_output x86: apuv2: remove unused variable gpio: pca953x: Use PCA_LATCH_INT platform/x86: fix PCENGINES_APU2 Kconfig warning gpio: pca953x: Fix dereference of irq data in shutdown gpio: amd-fch: Fix type error found by sparse gpio: amd-fch: Drop const from resource gpio: mxc: add check to return defer probe if clock tree NOT ready gpio: ftgpio: Register per-instance irqchip gpio: ixp4xx: Add DT bindings x86: pcengines apuv2 gpio/leds/keys platform driver gpio: AMD G-Series PCH gpio driver drivers: depend on HAS_IOMEM for devm_platform_ioremap_resource() gpio: tqmx86: Set proper output level for direction_output gpio: sprd: Change to use SoC compatible string gpio: sprd: Use SoC compatible string instead of wildcard string gpio: of: Handle both enable-gpio{,s} gpio: of: Restrict enable-gpio quirk to regulator-gpio gpio: davinci: use devm_platform_ioremap_resource() ... |
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Linus Torvalds
|
cf2e8c544c |
- New Drivers
- Add STMPE ADC Input driver - Add STMicroelectronics STPMIC1 Parent driver - Add STMicroelectronics STPMIC1 OnKey Misc driver - Add STMicroelectronics STPMIC1 Watchdog driver - Add Cirrus Logic Lochnagar Parent driver - Add TQ-Systems TQMX86 Parent driver - New Device Support - Add support for ADC to STMPE - New (or moved) Functionality - Move Lightbar functionality to its own driver; cros_ec_lightbar - Move VBC functionality to its own driver; cros_ec_vbc - Move VBC functionality to its own driver; cros_ec_vbc - Move DebugFS functionality to its own driver; cros_ec_debugfs - Move SYSFS functionality to its own driver; cros_ec_sysfs - Add support for input voltage options; tps65218 - Fix-ups - Use devm_* managed resources; cros_ec - Device Tree documentation; stmpe, aspeed-lpc, lochnagar - Trivial Clean-ups; stmpe - Rip out broken modular code; aat2870-core, adp5520, as3711, db8500-prcmu, htc-i2cpld, max8925-core, rc5t583, sta2x11-mfd, syscon, tps65090, tps65910, tps68470 tps80031, wm831x-spi, wm831x-i2c, wm831x-core, wm8350-i2c, wm8350-core, wm8400-core - Kconfig fixups; INTEL_SOC_PMIC - Improve error path; sm501, sec-core - Use struct_size() helper; sm501 - Constify; at91-usart - Use pointers instead of copying data; at91-usart - Deliver proper return value; cros_ec_dev - Trivial formatting/whitespace; sec-core -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEdrbJNaO+IJqU8IdIUa+KL4f8d2EFAlyA5j4ACgkQUa+KL4f8 d2EAyw/+N7N77ex5Ryxmyn61SWvgTL221tj+olw6RqC92Vfw6S2ZFP1CsM/E7tZb qCLYkkJSgBLKoOCI5OLiXsvWCPjyLU33nG/oS0SSiMJ1Fp9M0h7uRnOtOio3z31i w9MJAvEY3RN8I1bRGMO6aWUtT0q3AzHNtdl+7BqAkjjeXiUE0lGd5eARRS1zRWSa ki0OzUkJeszPk+6E6N0K+BQZxcL3cBEsR8ZAif903cMEbqsJIv4nmif4b5D63BKH PtOLn+6HVMG4bzqRRytVhcO/z2uj2jlLCHH9wBnyd4b7SoLFuz15yN5DhD4bKLt7 0UMqiBlC2MeaTv3wyKjeNPQtaMY7zJNUpdFly1PHAYR4oy5kbqk2IAv30N/zRfPK zLmWWq7DYdazBxSSGKmpGEW63Dkr/MQY2oj4nUlcank/X0K7LvmXv7kIxp9jJhA5 bE76f77uHneHvq5OTc5CZtaYNqZbE6tO8rqZ2QlfCqa0M8VxbcrYiym0fQFJBdsH eFtaTG162ssZq1npV759c4/2E3zQ3EW+rj89/AWp8ViJULQLyPY2nUYddx+w04Se kSdgYCvMI5byvF+Tuq/CbUWz7kyca3D+EFiYTkzIfrZr+4yiG2VO8wEO1knkEUVo 9X/wnAD5hQJePEM8CyPZrnirndB0W6SAvSmRZlF/OAbuCBz1DkQ= =tUge -----END PGP SIGNATURE----- Merge tag 'mfd-next-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd Pull MFD updates from Lee Jones: "New Drivers: - Add STMPE ADC Input driver - Add STMicroelectronics STPMIC1 Parent driver - Add STMicroelectronics STPMIC1 OnKey Misc driver - Add STMicroelectronics STPMIC1 Watchdog driver - Add Cirrus Logic Lochnagar Parent driver - Add TQ-Systems TQMX86 Parent driver New Device Support: - Add support for ADC to STMPE New (or moved) Functionality: - Move Lightbar functionality to its own driver; cros_ec_lightbar - Move VBC functionality to its own driver; cros_ec_vbc - Move VBC functionality to its own driver; cros_ec_vbc - Move DebugFS functionality to its own driver; cros_ec_debugfs - Move SYSFS functionality to its own driver; cros_ec_sysfs - Add support for input voltage options; tps65218 Fixes: - Use devm_* managed resources; cros_ec - Device Tree documentation; stmpe, aspeed-lpc, lochnagar - Trivial Clean-ups; stmpe - Rip out broken modular code; aat2870-core, adp5520, as3711, db8500-prcmu, htc-i2cpld, max8925-core, rc5t583, sta2x11-mfd, syscon, tps65090, tps65910, tps68470 tps80031, wm831x-spi, wm831x-i2c, wm831x-core, wm8350-i2c, wm8350-core, wm8400-core - Kconfig fixups; INTEL_SOC_PMIC - Improve error path; sm501, sec-core - Use struct_size() helper; sm501 - Constify; at91-usart - Use pointers instead of copying data; at91-usart - Deliver proper return value; cros_ec_dev - Trivial formatting/whitespace; sec-core" * tag 'mfd-next-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (53 commits) mfd: mxs-lradc: Mark expected switch fall-through mfd: sec-core: Cleanup formatting to a consistent style mfd: tqmx86: IO controller with I2C, Wachdog and GPIO mfd: intel-lpss: Move linux/pm.h to the local header mfd: cros_ec_dev: Return number of bytes read with CROS_EC_DEV_IOCRDMEM mfd: tps68470: Drop unused MODULE_DEVICE_TABLE mfd: at91-usart: No need to copy mfd_cell in probe mfd: at91-usart: Constify at91_usart_spi_subdev and at91_usart_serial_subdev mfd: lochnagar: Add support for the Cirrus Logic Lochnagar mfd: lochnagar: Add initial binding documentation dt-bindings: mfd: aspeed-lpc: Make parameter optional mfd: sec-core: Return gracefully instead of BUG() if device cannot match mfd: sm501: Use struct_size() in devm_kzalloc() mfd: sm501: Fix potential NULL pointer dereference mfd: Kconfig: Fix I2C_DESIGNWARE_PLATFORM dependencies mfd: tps65218.c: Add input voltage options mfd: wm8400-core: Make it explicitly non-modular mfd: wm8350-core: Drop unused module infrastructure from non-modular code mfd: wm8350-i2c: Make it explicitly non-modular mfd: wm831x-core: Drop unused module infrastructure from non-modular code ... |
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Linus Torvalds
|
e266ca36da |
Staging/IIO patches for 5.1-rc1
Here is the big staging/iio driver pull request for 5.1-rc1. Lots of good IIO driver updates and cleanups in here as always. Combined with the removal of the xgifb driver, we have a net "loss" of over 9000 lines in the pull request, always a nice thing. As the outreachy application process is currently happening, there are loads of tiny checkpatch cleanup fixes all over the staging tree, which accounts for the majority of the fixups. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCXH+gLQ8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ymBiQCeJpoBhG+W3r+kP8w65ZY8qU+/liIAn0Tkl4/k IX1dQzCsEpO1jA8AHj6n =7wCH -----END PGP SIGNATURE----- Merge tag 'staging-5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging Pull staging/IIO updates from Greg KH: "Here is the big staging/iio driver pull request for 5.1-rc1. Lots of good IIO driver updates and cleanups in here as always. Combined with the removal of the xgifb driver, we have a net "loss" of over 9000 lines in the pull request, always a nice thing. As the outreachy application process is currently happening, there are loads of tiny checkpatch cleanup fixes all over the staging tree, which accounts for the majority of the fixups" * tag 'staging-5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (341 commits) staging: mt7621-dma: remove license boilerplate text staging: mt7621-dma: add SPDX GPL-2.0+ license identifier Staging: ks7010: Replace typecast to int Staging: vt6655: Align a static function declaration staging: speakup: fix line over 80 characters. staging: mt7621-eth: Remove license boilerplate text staging: mt7621-eth: Add SPDX license identifier staging: ks7010: removed custom Michael MIC implementation. staging: rtl8192e: Fix space and suspect issue Staging: vt6655: Modify comment style of SPDX License Identifier Staging: vt6655: Modify comment style for SPDX-License-Identifier Staging: vt6655: Align a function declaration Staging: vt6655: Alignment of function declaration staging: rtl8712: Fix indentation issue staging: wilc1000: fix incorrent type in initializer staging: rtl8188eu: remove unused P2P_PRIVATE_IOCTL_SET_LEN staging: rtl8188eu: remove unused enum P2P_PROTO_WK_ID staging: rtl8723bs: Remove duplicated include from drv_types.h Staging: vt6655: Alignment should match open parenthesis staging: erofs: fix mis-acted TAIL merging behavior ... |
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Linus Torvalds
|
45763bf4bc |
Char/Misc driver patches for 5.1-rc1
Here is the big char/misc driver patch pull request for 5.1-rc1. The largest thing by far is the new habanalabs driver for their AI accelerator chip. For now it is in the drivers/misc directory but will probably move to a new directory soon along with other drivers of this type. Other than that, just the usual set of individual driver updates and fixes. There's an "odd" merge in here from the DRM tree that they asked me to do as the MEI driver is starting to interact with the i915 driver, and it needed some coordination. All of those patches have been properly acked by the relevant subsystem maintainers. All of these have been in linux-next with no reported issues, most for quite some time. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCXH+dPQ8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ym1fACgvpZAxjNzoRQJ6f06tc8ujtPk9rUAnR+tCtrZ 9e3l7H76oe33o96Qjhor =8A2k -----END PGP SIGNATURE----- Merge tag 'char-misc-5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc driver updates from Greg KH: "Here is the big char/misc driver patch pull request for 5.1-rc1. The largest thing by far is the new habanalabs driver for their AI accelerator chip. For now it is in the drivers/misc directory but will probably move to a new directory soon along with other drivers of this type. Other than that, just the usual set of individual driver updates and fixes. There's an "odd" merge in here from the DRM tree that they asked me to do as the MEI driver is starting to interact with the i915 driver, and it needed some coordination. All of those patches have been properly acked by the relevant subsystem maintainers. All of these have been in linux-next with no reported issues, most for quite some time" * tag 'char-misc-5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (219 commits) habanalabs: adjust Kconfig to fix build errors habanalabs: use %px instead of %p in error print habanalabs: use do_div for 64-bit divisions intel_th: gth: Fix an off-by-one in output unassigning habanalabs: fix little-endian<->cpu conversion warnings habanalabs: use NULL to initialize array of pointers habanalabs: fix little-endian<->cpu conversion warnings habanalabs: soft-reset device if context-switch fails habanalabs: print pointer using %p habanalabs: fix memory leak with CBs with unaligned size habanalabs: return correct error code on MMU mapping failure habanalabs: add comments in uapi/misc/habanalabs.h habanalabs: extend QMAN0 job timeout habanalabs: set DMA0 completion to SOB 1007 habanalabs: fix validation of WREG32 to DMA completion habanalabs: fix mmu cache registers init habanalabs: disable CPU access on timeouts habanalabs: add MMU DRAM default page mapping habanalabs: Dissociate RAZWI info from event types misc/habanalabs: adjust Kconfig to fix build errors ... |
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Linus Torvalds
|
384d11fa0e |
ARM: SoC driver updates for 5.1
As usual, the drivers/tee and drivers/reset subsystems get merged here, with the expected set of smaller updates and some new hardware support. The tee subsystem now supports device drivers to be attached to a tee, the first example here is a random number driver with its implementation in the secure world. Three new power domain drivers get added for specific chip families: - Broadcom BCM283x chips (used in Raspberry Pi) - Qualcomm Snapdragon phone chips - Xilinx ZynqMP FPGA SoCs One new driver is added to talk to the BPMP firmware on NVIDIA Tegra210 Existing drivers are extended for new SoC variants from NXP, NVIDIA, Amlogic and Qualcomm. Signed-off-by: Arnd Bergmann <arnd@arndb.de> -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJcfpKpAAoJEGCrR//JCVInMpYQANwKKWOTm5NHqtf7/ZKBzx6/ Yk7Jj8QLGKrHScnuBZSBvTwv5Cc5O5Ye+tAuGVArOoD2ktXlLZmHZ/ZPFAudT3di aFYbA44RNhv+O/xOmToDCCjSHm176hwUY0Cs5bFnfx6TcMsdOYIQIG+XQKx/a9zg 3ZBEv7wZqcBArLc0X2Z2/uiVrEIh3wWwXytvw+8TG8ifUfpbDxRUxDlj1JRDpjMu yX4q8JDhdQvi2FTXbXcEHTdQ6RT11svPM/YxQDxfULRK9aNKf4GZJ4QlwZy+SO7N cEFxDd4ML/iJ1LjalvtXGkR0xrw9/gOlO3vbB9Uw3EngBDUSQfHmqJet10a14l8q KcToe3teIB+Z1R+plrt+h5UDJTbVibgZXhU6wIdkDgtF6oTyg1moIbTqNKHgcA3b HLJv4gFejeluQzJ/3dZHBnkvJo1XFAvGFmFXle0bmJRFtDx73CKnf6MA9N82l2/x nTn4LTxXIJVKWTWAs1qkrFyIx1gOrpGhiHPQ2JiOPMZLstz3Sr6tiJuWOr+1Ex4/ UlZsD/CrRb+SbPBonpkD+bvzSR+j0M72A7hGmfZcDzainciWgunyXglUlzO/MT24 C6p4R9MZ2Fffoe8pESppabRNUItp8gNsNGI7CY1IK8pgpxLrujw8OnqykpV0VETo As+6dZrHfPNSuI7udJi5 =+DOl -----END PGP SIGNATURE----- Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "As usual, the drivers/tee and drivers/reset subsystems get merged here, with the expected set of smaller updates and some new hardware support. The tee subsystem now supports device drivers to be attached to a tee, the first example here is a random number driver with its implementation in the secure world. Three new power domain drivers get added for specific chip families: - Broadcom BCM283x chips (used in Raspberry Pi) - Qualcomm Snapdragon phone chips - Xilinx ZynqMP FPGA SoCs One new driver is added to talk to the BPMP firmware on NVIDIA Tegra210 Existing drivers are extended for new SoC variants from NXP, NVIDIA, Amlogic and Qualcomm" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (113 commits) tee: optee: update optee_msg.h and optee_smc.h to dual license tee: add cancellation support to client interface dpaa2-eth: configure the cache stashing amount on a queue soc: fsl: dpio: configure cache stashing destination soc: fsl: dpio: enable frame data cache stashing per software portal soc: fsl: guts: make fsl_guts_get_svr() static hwrng: make symbol 'optee_rng_id_table' static tee: optee: Fix unsigned comparison with less than zero hwrng: Fix unsigned comparison with less than zero tee: fix possible error pointer ctx dereferencing hwrng: optee: Initialize some structs using memset instead of braces tee: optee: Initialize some structs using memset instead of braces soc: fsl: dpio: fix memory leak of a struct qbman on error exit path clk: tegra: dfll: Make symbol 'tegra210_cpu_cvb_tables' static soc: qcom: llcc-slice: Fix typos qcom: soc: llcc-slice: Consolidate some code qcom: soc: llcc-slice: Clear the global drv_data pointer on error drivers: soc: xilinx: Add ZynqMP power domain driver firmware: xilinx: Add APIs to control node status/power dt-bindings: power: Add ZynqMP power domain bindings ... |
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Linus Torvalds
|
6ad63dec9c |
ARM: SoC device tree updates for 5.1
This is a smaller update than the past few times, but with just over 500 non-merge changesets still dwarfes the rest of the SoC tree. Three new SoC platforms get added, each one a follow-up to an existing product, and added here in combination with a reference platform: - Renesas RZ/A2M (R7S9210) 32-bit Cortex-A9 Real-time imaging processor https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rza/rza2m.html - Renesas RZ/G2E (r8a774c0) 64-bit Cortex-A53 SoC "for Rich Graphics Applications". https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rzg/rzg2e.html - NXP i.MX8QuadXPlus 64-bit Cortex-A35 SoC https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/i.mx-applications-processors/i.mx-8-processors/i.mx-8x-family-arm-cortex-a35-3d-graphics-4k-video-dsp-error-correcting-code-on-ddr:i.MX8X These are actual commercial products we now support with an in-kernel device tree source file: - Bosch Guardian is a product made by Bosch Power Tools GmbH, based on the Texas Instruments AM335x chip - Winterland IceBoard is a Texas Instruments AM3874 based machine used in telescopes at the south pole and elsewhere, see commit |
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Linus Torvalds
|
aebbfafc74 |
ARM: SoC platform updates for 5.1
The APM X-Gene platform is now maintained by folks from Ampere computing that took over the product line a while ago, this gets reflected in the MAINTAINERS file. Cleanups continue on the older mach-davinci and mach-pxa platform, to get them to be more like the modern ones. For pxa, we now remove the Raumfeld platform code as it now works with device tree based booting. i.MX adds a couple new features for the i.MX7ULP SoC Mediatek gains support for a new SoC: MT7629 is a new wireless router platform, following MT7623. Aside from those, there are the usual minor cleanups and bugfixes across several platforms. Signed-off-by: Arnd Bergmann <arnd@arndb.de> -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJcf+c8AAoJEGCrR//JCVInuUsQAK+F+7hrfkwCSLXzqVIPMYC1 hFV11s7bgbHfzkSa6ZyFC0uuT737dZjJrOdvZOXFJ2VxDscxI62mj56jCrF8tr1x BQqIiDLGU55mLTkPiVtmVi8p79IXz2G/1dBeYrfyj/xec6DsjVkO1Cm2itQ3vg5Q ZM8DRmIxsKsUv6YSGRfwVNXso9jOh+LPxlfrGL5ijdHgzDxRr7gO+B+jxgx9Sf6s DNLj6M8L8DFo528eHp2pJNBL21pMywAaIrDELUJyg5P3XnDX18F8CjbSRgm7OG1+ hkdmML9qQlpOjokPJ9eeitX2e+tvKoXLn+N9kq12Pn4fkvJpKlOVnZmU+Le/3By+ agX7hE2A21nsZuoHQjq16QoO4X9mDee7tcDMzGwTrSq1M18m2dEJW57vivda0qKN wNJC3qwLmh2/wfxNpO2wS29hQni7cIrFgRvUPsB/u8KvzITbQ/PMGApNV+Kf7BiO mZjH8X+0IkX0veS11KLsFUCbq4ezpPCNxbul2mMIVcTIV0Oz6mQXNHAecNxCCqMk GAgi48+9KYNszG01Xqx++x79BFnIoUJp3+gIGIa8rTvdSSsF8DlQlSzXufD9Sb2h CS+M8kvgfymUrjaKZNyR5ouI1ae1Q16pbapkpS4B6ucoc4Qbqz2POiSVhex+eU/N IrEAFEhRg7iQ9NHUaWlx =vxwd -----END PGP SIGNATURE----- Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC platform updates from Arnd Bergmann: "The APM X-Gene platform is now maintained by folks from Ampere computing that took over the product line a while ago, this gets reflected in the MAINTAINERS file. Cleanups continue on the older mach-davinci and mach-pxa platform, to get them to be more like the modern ones. For pxa, we now remove the Raumfeld platform code as it now works with device tree based booting. i.MX adds a couple new features for the i.MX7ULP SoC Mediatek gains support for a new SoC: MT7629 is a new wireless router platform, following MT7623. Aside from those, there are the usual minor cleanups and bugfixes across several platforms" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (49 commits) MAINTAINERS: Update Ampere email address usb: ohci-da8xx: remove unused callbacks from platform data ARM: davinci: da830-evm: remove legacy usb helpers ARM: davinci: omapl138-hawk: remove legacy usb helpers usb: ohci-da8xx: add vbus and overcurrent gpios ARM: davinci: da830-evm: use gpio lookup entries for usb gpios ARM: davinci: omapl138-hawk: use gpio lookup entries for usb gpios usb: ohci-da8xx: add a helper pointer to &pdev->dev usb: ohci-da8xx: add a new line after local variables arm64: meson: enable g12a clock controller MAINTAINERS: Add entry for uDPU board ARM: davinci: da850-evm: use GPIO hogs instead of the legacy API arm: mediatek: add MT7629 smp bring up code Revert "ARM: mediatek: add MT7623a smp bringup code" dt-bindings: soc: fix typo of MT8173 power dt-bindings ARM: meson: remove COMMON_CLK_AMLOGIC selection arm64: meson: remove COMMON_CLK_AMLOGIC selection ARM: lpc32xx: remove platform data of ARM PL111 LCD controller ARM: lpc32xx: remove platform data of ARM PL180 SD/MMC controller ARM: lpc32xx: Use kmemdup to replace duplicating its implementation ... |
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Linus Torvalds
|
d9862cfbe2 |
Here's the main MIPS pull request for v5.1:
- Support for the MIPSr6 MemoryMapID register & Global INValidate TLB (GINVT) instructions, allowing for more efficient TLB maintenance when running on a CPU such as the I6500 that supports these. - Enable huge page support for MIPS64r6. - Optimize post-DMA cache sync by removing that code entirely for kernel configurations in which we know it won't be needed. - The number of pages allocated for interrupt stacks is now calculated correctly, where before we would wastefully allocate too much memory in some configurations. - The ath79 platform migrates to devicetree. - The bcm47xx platform sees fixes for the Buffalo WHR-G54S board. - The ingenic/jz4740 platform gains support for appended devicetrees. - The cavium_octeon, lantiq, loongson32 & sgi-ip27 platforms all see cleanups as do various pieces of core architecture code. -----BEGIN PGP SIGNATURE----- iIsEABYIADMWIQRgLjeFAZEXQzy86/s+p5+stXUA3QUCXH3BQxUccGF1bC5idXJ0 b25AbWlwcy5jb20ACgkQPqefrLV1AN1+4wD+Oh4JTfZN/NEOQMlrSkXxjEHqjX3u 1Y6CiiPCs+q2UnYBANb+ic+ZH5MnvJxxmcvlYI2q3rIh4b8TDriip4KMUTUP =Sw9X -----END PGP SIGNATURE----- Merge tag 'mips_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS updates from Paul Burton: - Support for the MIPSr6 MemoryMapID register & Global INValidate TLB (GINVT) instructions, allowing for more efficient TLB maintenance when running on a CPU such as the I6500 that supports these. - Enable huge page support for MIPS64r6. - Optimize post-DMA cache sync by removing that code entirely for kernel configurations in which we know it won't be needed. - The number of pages allocated for interrupt stacks is now calculated correctly, where before we would wastefully allocate too much memory in some configurations. - The ath79 platform migrates to devicetree. - The bcm47xx platform sees fixes for the Buffalo WHR-G54S board. - The ingenic/jz4740 platform gains support for appended devicetrees. - The cavium_octeon, lantiq, loongson32 & sgi-ip27 platforms all see cleanups as do various pieces of core architecture code. * tag 'mips_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (66 commits) MIPS: lantiq: Remove separate GPHY Firmware loader MIPS: ingenic: Add support for appended devicetree MIPS: SGI-IP27: rework HUB interrupts MIPS: SGI-IP27: do boot CPU init later MIPS: SGI-IP27: do xtalk scanning later MIPS: SGI-IP27: use pr_info/pr_emerg and pr_cont to fix output MIPS: SGI-IP27: clean up bridge access and header files MIPS: SGI-IP27: get rid of volatile and hubreg_t MIPS: irq: Allocate accurate order pages for irq stack MIPS: dma-noncoherent: Remove bogus condition in dma_sync_phys() MIPS: eBPF: Remove REG_32BIT_ZERO_EX MIPS: eBPF: Always return sign extended 32b values MIPS: CM: Fix indentation MIPS: BCM47XX: Fix/improve Buffalo WHR-G54S support MIPS: OCTEON: program rx/tx-delay always from DT MIPS: OCTEON: delete board-specific link status MIPS: OCTEON: don't lie about interface type of CN3005 board MIPS: OCTEON: warn if deprecated link status is being used MIPS: OCTEON: add fixed-link nodes to in-kernel device tree MIPS: Delete unused flush_cache_sigtramp() ... |
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Anson Huang
|
0c91c11c7d |
clk: imx8mq: add GPIO clocks to clock tree
i.MX8MQ has clock gate for each GPIO bank, add them into clock tree for GPIO driver to manage. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Seiya Wang
|
64f4466c88 |
clk: mediatek: correct cpu clock name for MT8173 SoC
Correct cpu clock name from ca57 to ca72 since MT8173 does use cortex-a72. Signed-off-by: Seiya Wang <seiya.wang@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Edgar Bernardi Righi
|
0c8c53e033 |
dt-bindings: clock: Add DT bindings for Actions Semi S500 CMU
Add devicetree bindings for Actions Semi S500 Clock Management Unit. Signed-off-by: Edgar Bernardi Righi <edgar.righi@lsitec.org.br> [Mani: Documented S500 CMU compatible] Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> [sboyd@kernel.org: Fix SPDX comment style in header file] Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Gabriel Fernandez
|
585fc46bd4 |
dt-bindings: clock: remove unused definition for stm32mp1
A copy of LTDC_PX and ETHCK_K (LTDC_K and ETHMAC_K) was introduced in stm32mp1 dt-bindings file by mistake. These bindings are not used and shouldn't be use to be conform with convention name of the stm32mp1 clock IP. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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David Dai
|
04053f4d23 |
clk: qcom: clk-rpmh: Add IPA clock support
The clk-rpmh driver only supports on and off RPMh clock resources. Let's extend the driver by adding support for clocks that are managed by a different type of RPMh resource known as Bus Clock Manager(BCM). The BCM is a configurable shared resource aggregator that scales performance based on a set of frequency points. The Qualcomm IP Accelerator (IPA) clock is an example of a resource that is managed by the BCM and this a requirement from the IPA driver in order to scale its core clock. Signed-off-by: David Dai <daidavid1@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Lubomir Rintel
|
ed11aff3ee |
dt-bindings: marvell,mmp2: Add clock id for the LCDC clock
The peripheral clock is required for access the the LCDC registers. It is in fact separate from the "AXI clock" that is optionally used to generate the pixel clock and as such requires a separate clock id. Link: https://lists.freedesktop.org/archives/dri-devel/2019-January/203975.html Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Abel Vesa
|
45a359e80d |
dt-bindings: imx8mq-clock: Add the missing ARM clock
Add the missing ARM clock which will be used by cpufreq Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> [sboyd@kernel.org: Fixed numbering in dt header] Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Fabio Estevam
|
202ce5afe5 |
clk: imx8mq: Add support for the CLKO1 clock
Add the entry for the CLKO1 clock. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Bai Ping
|
037a474f61 |
dt-bindings: imx: Add clock binding doc for imx8mm
Add the clock binding doc for i.MX8MM. Signed-off-by: Bai Ping <ping.bai@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Michael Grzeschik
|
9b15cffbf2 |
clk: imx5: add imx5_SCC2_IPG_GATE
This adds the missing clock for the SCC2 peripheral unit. Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Linus Walleij
|
8fab3d713c |
gpio updates for v5.1
- support for a new variant of pca953x - documentation fix from Wolfram - some tegra186 name changes - two minor fixes for madera and altera-a10sr -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEFp3rbAvDxGAT0sefEacuoBRx13IFAlxleLcACgkQEacuoBRx 13I45Q//YMGUYzkMjOL+lp2DYnnVhVNqrF4hoLjinWVrnhZ6gqu88RgV2Cea4Pta oxVxnSsE8LK7kY8VZ8tcBmIqLLkQAJdSVtqkeSoZF2vhWBAbE9ZaSOYb17SIkSXK Ok16lZgZ+ZWOM5EjEvuRpB/qYGjX2glD5/Y2Kl7+wsX1W6U2pXasP0IjhcvDU8mJ NXNgfkr6kluMUqHJyqKo8eT/P3Hdv0CK9GsN2vGyfJenCdTSd7EC6KuhWAivi+fG /lf1bVuc2cCiXjxdSOXx+Yz7SjNe56viTaqnn/K6OlfLgErjKnRW+AxPkTZXNtDi pfMMpPXiwPcbQR2wrXG/7OMmJ1kUsfWoIUCx5RDwhF1KbEQVqgaSITLylk+4Yp/3 eM0fYsQ+KvOdAnWKSgfxBhaaiO7z5XDdrnkSHBDoiBrm07BqBgK/v3Rivzf2GMEv QvM4OBfThS9I8skV5BaOBRDfHZs4N0EU/vhsW9gt50urtlSM0vSYx6kdMq/8R0k4 NkJT43u+1vi5koMljBAsZYZiyXOQ2B+PlfpTMfMu+93QH8wlu9mOt1r3YTQyA1Xf jiOK8M2yQKP5g7RuPM6MtMsqlZKDM5nAlSf7S280Z3+vBd+LaELbXvT2/JL5ViGU hfH/gaNwUGUYd8EsWvfhHVdPAAecDCwxfKyKEnFGhMrtunTgwfI= =nV64 -----END PGP SIGNATURE----- Merge tag 'gpio-v5.1-updates-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into devel gpio updates for v5.1 - support for a new variant of pca953x - documentation fix from Wolfram - some tegra186 name changes - two minor fixes for madera and altera-a10sr |
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Arnd Bergmann
|
d0e1f79ad3 |
Merge tag 'v5.0-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/fixes
mt8173: minor typo in scpsys header file mt7629: add smp bringup code mt7623a: delete unused smp bringup code * tag 'v5.0-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: arm: mediatek: add MT7629 smp bring up code Revert "ARM: mediatek: add MT7623a smp bringup code" dt-bindings: soc: fix typo of MT8173 power dt-bindings Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
|
187b4ac7df |
This pull request contains Broadcom ARM/ARM64/MIPS based SoCs changes
for 5.1, please pull the following: - Stefan updates the BCM2835 SoC driver with downstream properties and uses that to implement a reboot notifier to tell the VC4 firmware when Linux on the ARM CPU is rebooting - Eric adds a proper power domain driver for the BCM283x SoCs and updates a bunch of drivers to have a better and clearer Device Tree definition to support power domains/breaking up of functionality. This requires converting the existing watchdog driver into a MFD and then breaking up the functionality into separate drivers and finally updating the DTS files to leverage the power domains information. - Wei provides a fix for making a symbol static -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAlxV0IYACgkQh9CWnEQH BwQIHA//TL12EfHws6C64EKspqsg9NE5/+K3HRRJbgwtuBQ/n6oYBMyJx+6x6Nwc 7QjuCkZ/VWKxy0Fn+ToGnX0JgrQL5kND3Cm0d8cyZ0VJ6juppizyAa1YkFplShSr l0XlYaJo1HrB3hBd/+YbGZnLp9flbii5d3MIcy8ZoWmN7zLeHnQbHaf8jcbJC+Iw Mal8ojk2ru0rMimMQieTiPzWwiec08wtSIYs2590rOVWFyhGIn/KmHqpG6iYjdwj oQbr86R0jMPCb/g3SXRttxW8wFbtYdmILdkzhOaEd4JyJEwUCNDciM3E04OyE9VN fNMc1l0zh7dfyo9bFRpgS6AAxYQVj3led+B1NGtpnjDPybVWU10gipGdgFt9UPRE pJnS1LcPbAJ1FdbcYFU0TsiViWLZehm2cbc4rPYvqKp1Y+82FJZTYyu0GmBOUwB6 jpM5ZVvET8k3nw6ImeE3jjT3kBfF31u552+iO4RQvKHRm/GBMtyTDrFZVUwgqMFE NEKnj3/VLSCxP3dnQImw1ro2493piZNdlBEs6mAugFUGqcb+40KOtOOpWiGMFH7h BZN0kj128ryG/YCVKDOnZSbYRLhpxc1VcVYJ3rYJgn8mrFFmNo/fjDgaRogrJN/s LmCiSIqsmuy8f36/IWd+aHk6ex5yskJe7x5M/7tlmz03oXg1viQ= =t5+u -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-5.1/drivers' of https://github.com/Broadcom/stblinux into arm/drivers This pull request contains Broadcom ARM/ARM64/MIPS based SoCs changes for 5.1, please pull the following: - Stefan updates the BCM2835 SoC driver with downstream properties and uses that to implement a reboot notifier to tell the VC4 firmware when Linux on the ARM CPU is rebooting - Eric adds a proper power domain driver for the BCM283x SoCs and updates a bunch of drivers to have a better and clearer Device Tree definition to support power domains/breaking up of functionality. This requires converting the existing watchdog driver into a MFD and then breaking up the functionality into separate drivers and finally updating the DTS files to leverage the power domains information. - Wei provides a fix for making a symbol static * tag 'arm-soc/for-5.1/drivers' of https://github.com/Broadcom/stblinux: ARM: bcm283x: Switch V3D over to using the PM driver instead of firmware. ARM: bcm283x: Extend the WDT DT node out to cover the whole PM block. (v4) soc: bcm: bcm2835-pm: Make local symbol static soc: bcm: Make PM driver default for BCM2835 soc: bcm: bcm2835-pm: Add support for power domains under a new binding. bcm2835-pm: Move bcm2835-watchdog's DT probe to an MFD. dt-bindings: soc: Add a new binding for the BCM2835 PM node. (v4) firmware: raspberrypi: notify VC4 firmware of a reboot soc: bcm2835: sync firmware properties with downstream Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
|
405bcfff17 |
Qualcomm ARM Based Driver Updates for v5.1
* Add Qualcomm RPMh power domain driver and related changes * Fix issues with sleep/wake sets and batch API in RPMh * Update MAINTAINERS Qualcomm entry * Fixup RMTFS-mem sysfs and uevents * Fix error handling in GSBI * Add SMD-RPM compatible entry for SDM660 -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJcV75tAAoJEFKiBbHx2RXV3ZcQAJ4xdmg0eVXrzu4ltl/ZbF7m walu7pGtLF7lIXJoJZWgpzS6SAmDQAMG++pp6zP6+3t6fB8heSNVBImgo2l6fHzr KEHoH1PFhrdZwyOhswE/5n5CZBOb4xrL+m94NufDh7Yv8h5ukC8DH3xE9PFsoh4A GnDc6qkHByNJKuNxlKKASq6VRMqzpnys2Ibzs6G5/6UDzvnEAYj5VoHLLCjsh6r+ +bKusJPUZKujyLU85rbtpEjO1HxHiOq7TJI5FZ8dta+iXSyIc/2nM9InTgr68ATq VN7mOtclMEiVN8uQaXN0D/FWK3JYBIY5Mvd8zYzzkE+NDj0tnZDZoLjK2VnTX9o+ nORX7vQc/JmBayLcMaBZ/ZB+i2lsg37ziFCZaZiP9GYR1DAvm3yLfaxbWmkVKbGq lhf/dR7qyXKjIP8rPO2qp4sCKww2RbkDa2p+xnQ2/psjvpgkmy4lcfIhw5HWonQR eJ1UgoLsdQf/Xi6cKKmuzbdQsmZGr95sTHh06Gw1yeMRGuoXTHSNYx5epLdwJmD5 OWcIwh+sfZdmKUhMB/895EFpRuK/+L07N+n48DYaaU4CHXcowp80Ng5V6FnEnEWm tI9oKt3N2kAYQAPlgpb3azTtAmB+yAcaYGrNQXzd7nYLnLma40qCR0Nx8bMXCjeq sgRdF06ATCQDbBruztw3 =CcrU -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into arm/drivers Qualcomm ARM Based Driver Updates for v5.1 * Add Qualcomm RPMh power domain driver and related changes * Fix issues with sleep/wake sets and batch API in RPMh * Update MAINTAINERS Qualcomm entry * Fixup RMTFS-mem sysfs and uevents * Fix error handling in GSBI * Add SMD-RPM compatible entry for SDM660 * tag 'qcom-drivers-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: soc: qcom: smd-rpm: Add sdm660 compatible soc: qcom: gsbi: Fix error handling in gsbi_probe() soc: qcom: rpmh: Avoid accessing freed memory from batch API drivers: qcom: rpmh: avoid sending sleep/wake sets immediately soc: qcom: rmtfs-mem: Make sysfs attributes world-readable soc: qcom: rmtfs-mem: Add class to enable uevents soc: qcom: update config dependencies for QCOM_RPMPD soc: qcom: rpmpd: Drop family A RPM dependency MAINTAINERS: update list of qcom drivers soc: qcom: rpmhpd: Mark mx as a parent for cx soc: qcom: rpmhpd: Add RPMh power domain driver soc: qcom: rpmpd: Add support for get/set performance state soc: qcom: rpmpd: Add a Power domain driver to model corners dt-bindings: power: Add qcom rpm power domain driver bindings OPP: Add support for parsing the 'opp-level' property dt-bindings: opp: Introduce opp-level bindings Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
|
6f2185f8e3 |
Reset controller changes for v5.1
This adds the include/linux/reset directory to MAINTAINERS for reset specific headers and adds headers for sunxi and socfpga in there to get rid of a few extern function declarations. There is a new reset driver for the Broadcom STB reset controller and the i.MX7 system reset controller driver is extended to support i.MX8MQ as well. Finally, there is a new header with reset id constants for the Meson G12A SoC, which has a reset controller identical to Meson AXG and thus can reuse its driver and DT bindings. -----BEGIN PGP SIGNATURE----- iI0EABYIADUWIQRRO6F6WdpH1R0vGibVhaclGDdiwAUCXF2yeRcccC56YWJlbEBw ZW5ndXRyb25peC5kZQAKCRDVhaclGDdiwH8jAP9OQaMl5llVXuHSFOwiqkJ2I09p oROxu3dI/A4q7d5T8QD/Xuo4piSAdoT5YZyHp16NUafW3L1//wqTvxk0ubeTsgA= =EIyo -----END PGP SIGNATURE----- Merge tag 'reset-for-5.1' of git://git.pengutronix.de/git/pza/linux into arm/drivers Reset controller changes for v5.1 This adds the include/linux/reset directory to MAINTAINERS for reset specific headers and adds headers for sunxi and socfpga in there to get rid of a few extern function declarations. There is a new reset driver for the Broadcom STB reset controller and the i.MX7 system reset controller driver is extended to support i.MX8MQ as well. Finally, there is a new header with reset id constants for the Meson G12A SoC, which has a reset controller identical to Meson AXG and thus can reuse its driver and DT bindings. * tag 'reset-for-5.1' of git://git.pengutronix.de/git/pza/linux: dt-bindings: reset: meson: add g12a bindings reset: imx7: Add support for i.MX8MQ IP block variant reset: imx7: Add plubming to support multiple IP variants reset: Add Broadcom STB SW_INIT reset controller driver dt-bindings: reset: Add document for Broadcom STB reset controller reset: socfpga: declare socfpga_reset_init in a header file reset: sunxi: declare sun6i_reset_init in a header file MAINTAINERS: use include/linux/reset for reset controller related headers dt-bindings: reset: imx7: Document usage on i.MX8MQ SoCs Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
|
59f527dd7a |
arm64: zynqmp: SoC changes for v5.1
- Extend firmware interface with reset, nvmem, power management and power domain support - Add reset, nvmem driver, power management and power domain drivers - -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEABECAAYFAlxixLEACgkQykllyylKDCEduwCeLkIFr48uJ/5Fv1X16gitcrOk F38An2wbsk21xkWQpfzCFdUrpPbT0u4t =GOP8 -----END PGP SIGNATURE----- Merge tag 'zynqmp-soc-for-v5.1' of https://github.com/Xilinx/linux-xlnx into arm/drivers arm64: zynqmp: SoC changes for v5.1 - Extend firmware interface with reset, nvmem, power management and power domain support - Add reset, nvmem driver, power management and power domain drivers - * tag 'zynqmp-soc-for-v5.1' of https://github.com/Xilinx/linux-xlnx: drivers: soc: xilinx: Add ZynqMP power domain driver firmware: xilinx: Add APIs to control node status/power dt-bindings: power: Add ZynqMP power domain bindings drivers: soc: xilinx: Add ZynqMP PM driver firmware: xilinx: Implement ZynqMP power management APIs dt-bindings: soc: Add ZynqMP PM bindings nvmem: zynqmp: Added zynqmp nvmem firmware driver dt-bindings: nvmem: Add bindings for ZynqMP nvmem driver firmware: xilinx: Add zynqmp_pm_get_chipid() API reset: reset-zynqmp: Adding support for Xilinx zynqmp reset controller. dt-bindings: reset: Add bindings for ZynqMP reset driver firmware: xilinx: Add reset API's Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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550a43b310 |
Renesas ARM Based SoC DT Updates for v5.1
* R-Car H2 (r8a7790) based Stout board - Convert to new LVDS DT bindings * R-Car H1 (r8a7779) and M1A (r8a7778) SoCs - Describe HSCIF0/1 devices in DT * RZ/G1M (r8a7743) SoC - Correct sort order of the RWDT node - Remove aliases: should be defined in board rather than SoC DT if needed - Remove generic compatible string from iic3: it is not compatible * RZ/G1N (r8a7744) SoC - Describe LVDS and DU devices in DT - Correct sort order of VSP and MSIOF noces * RZ/G1C (r8a7747) based iWave SBC - Enable RTC * RZ/A2M (r7s9210) SoC and EVB - Initial support -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAlxdXz4ACgkQ189kaWo3 T75wbBAAqOyXvMCt7lGsov4i0e/lqSFl13uHv83Mk+PVvvT48H2g/ItitGDq4GYr ItAYBRF66XcAKJbA30e4OvAk+yB0Y3iMT8KIR4Nca5ls9rn6NwbyBugZ65mizKEk vIoA1sGpsWUrK0yxmGoIx9C6aX9qsh82ivdMpvwb1Kzy5oO59GCgJ9d/d+Q2KwvG rycEPQwHLFIIijoNr0IH3ZiXhyfeEabGHg/EK/FVxJJNgQLjFW0ZogsZ/a49ptoZ YZqEc2w13a+rWFTg7059UbzPNjJCq0/2lYRPthWTz9KzUyFgSZ+2GvawdoFSvBZ5 cf+6+qZkgkVvs00yajd6Q2t9IcyjeVmU+GBHFSO65wDRJknDN8sE1v/qHaAr0+Bm My8Th55Tzak/d+6Zb6xP95kTiaUDpWQrjntMvg3AewiAcjDJasBSsU9EDBlEDh3W VaQVkyyHtWwfiS0qFf4u0Rfgb2DIBYLvXzslipyZnsKih14+rC/S6N3j8rykrOoE DTjh7Hi4k4xYwqwNFrg9lvGCoAG4aZddyat9SYfgTs65OmG7huyTH5vqtsmB3kN0 0a33nQ8xt24TH6wSHGB17GXeR9JEluqHC0Do9bbis1B6QiSBvcY+Ne1LtFN8O5sH RNEcoqU1cCLVHvbRJL/3Y5bwYF22f0GvbMxO/vgdmcz2DSxbuL0= =q0l0 -----END PGP SIGNATURE----- Merge tag 'renesas-arm-dt-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into arm/dt Renesas ARM Based SoC DT Updates for v5.1 * R-Car H2 (r8a7790) based Stout board - Convert to new LVDS DT bindings * R-Car H1 (r8a7779) and M1A (r8a7778) SoCs - Describe HSCIF0/1 devices in DT * RZ/G1M (r8a7743) SoC - Correct sort order of the RWDT node - Remove aliases: should be defined in board rather than SoC DT if needed - Remove generic compatible string from iic3: it is not compatible * RZ/G1N (r8a7744) SoC - Describe LVDS and DU devices in DT - Correct sort order of VSP and MSIOF noces * RZ/G1C (r8a7747) based iWave SBC - Enable RTC * RZ/A2M (r7s9210) SoC and EVB - Initial support * tag 'renesas-arm-dt-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: dts: r8a7744: Add LVDS support ARM: dts: r8a7744: Add DU support ARM: dts: r7s9210-rza2mevb: Add support for RZ/A2M EVB ARM: dts: r7s9210: Initial SoC device tree ARM: dts: r8a7779: Add HSCIF0/1 device nodes ARM: dts: r8a7778: Add HSCIF0/1 support ARM: dts: r8a7743: Fix sorting of rwdt node ARM: dts: r8a7743: Remove aliases from SoC dtsi ARM: dts: r8a7743: Remove generic compatible string from iic3 ARM: dts: r8a7744: Fix sorting of vsp and msiof nodes ARM: dts: iwg23s-sbc: Enable RTC ARM: dts: stout: Convert to new LVDS DT bindings Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Martin Blumenstingl
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40d08f774c |
dt-bindings: clock: meson8b: add APB clock definition
Commit |
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Neil Armstrong
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be3d960b0a |
dt-bindings: clk: add G12A AO Clock and Reset Bindings
Add bindings for the Amlogic G12A AO Clock and Reset controllers. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lkml.kernel.org/r/20190212162859.20743-2-narmstrong@baylibre.com |
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Thomas Petazzoni
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ede033e1e8 |
dt-bindings: gpio: document the new pull-up/pull-down flags
This commit extends the flags that can be used in GPIO specifiers to indicate if a pull-up resistor or pull-down resistor should be enabled. While some pinctrl DT bindings already offer the capability of configuring pull-up/pull-down resistors at the pin level, a number of simple GPIO controllers don't have any pinmuxing capability, and therefore do not rely on the pinctrl DT bindings. Such simple GPIO controllers however sometimes allow to configure pull-up and pull-down resistors on a per-pin basis, and whether such resistors should be enabled or not is a highly board-specific HW characteristic. By using two additional bits of the GPIO flag specifier, we can easily allow the Device Tree to describe which GPIOs should have their pull-up or pull-down resistors enabled. Even though the two options are mutually exclusive, we still need two bits to encode at least three states: no pull-up/pull-down, pull-up, pull-down. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Greg Kroah-Hartman
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277c8e8b81 |
Second set of new device support, features and cleanup for IIO in the 5.1 cycle.
There are a few late breaking fixes in here that weren't worth trying to rush into 5.0 as they have been with us for quite a while. New device support * ad7476 - add support for TI ADS786X parts that are compatible with this Analog Devices driver. Good to see some simple devices are so similar. * Ingenic jz47xx SoC ADCs - new driver and bindings * Plantower PMS7003 partical sensor - new driver and bindings including vendor prefix. * TI DAC7612 - new driver and bindings for this dual DAC. New features * ad7768-1 - Sampling frequency control * bmi160 - Data ready trigger support, including open-drain dt binding. Cleanup / minor fixes. * Analog Device DACs - Fix some inconsistent licenses. These are only ones where there were two different license marked in the same file, and hence were previously unclear. * ads124s08 - Spelling fix. * adxl345 - Parameter alignement tidy up. * bmi160 - SPDX - correct a note on the types of supported interrupts which was too strict. - use iio_pollfunc_store_time to grab an earlier timestamp. - use if (ret) instead of if (ret < 0) to be consistent whilst simplifying some handling where ret was effectively getting written to 0 even though it was always already 0. * exynos_adc - Fix a null pointer dereference on unbind. - Fix number of channels on Exynos4x12 devices to be 4 rather than 8. * lpc32xx-adc - Move DT bindings doc out of staging. Oops, I missed this one when moving the driver. - SPDX. * npcm-adc - drop documentation of reset node as going to be done differently. It's a new driver this cycle so no need to support the previous binding going forwards. * sps30 - Fix an issue with a loop timeout test that meant it would never identify a timeout. - Mark deliberate switch fall throughs. -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEbilms4eEBlKRJoGxVIU0mcT0FogFAlxjNmgRHGppYzIzQGtl cm5lbC5vcmcACgkQVIU0mcT0FogooQ/9HDDuw4hrYJqH2cdUtKV29+a+kvMtrC1i X9+VstbMQNLo4DM3lYKi4VOeh6P5htRrD9ZJ4I2lh6PfnABjr3lb1AequlxwWNQZ 9EHEY3BA0G33757LQEkqxl7h8Cqvo2y6Wl6OcUund0jP+h3F3EYkI4XWNcq5Yht4 uWTkyTRYVZqFnlXGvfPz+53tEZ6p5RijbhOdYcL8R/0yWYzZzgzut7eYZn8Qn+mR LzSCBoEyAOUELYyRoczY2EkEO+u8H7lcU43i5TPPKji/c+w4OXu2ktuGVucXaHBs E1NLp0psLdqR2ef8fNYTs3FO2kxI7jV5qMlR91Sa2lDRyPhYeMF+JYBQlpqm5H2U xp8WwFrfT4KZ1yvioNeW+aNlPOd6ljDMg1z/iLWpAcUqx65QArmogL64m/Fc5GQD jrYzw68FO6fqKh3ik7VdPKIUS0p3Dz8BdWOqvI68+C/Mr/TgML51frf1NVbdd36L qgzMN6N53bykwN2w51O0Af4U3ZednN7BDDFkUbucutoglU+K8yRjFj583wM8QYsG GOZ3sPVZm+ItWCGc7nTJowe6+EQNgo/md3IEmmZNPrfWPHoMEebqnNcOuqcYvIlj wXgsJBNlWyQp5bqE9LmgClwAaWkXIoUvjUHt0cK5043ueLrYaGJ698sg0N/UO0JC T0/PJEMjLPE= =Se+F -----END PGP SIGNATURE----- Merge tag 'iio-for-5.1b' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next Jonathan writes: Second set of new device support, features and cleanup for IIO in the 5.1 cycle. There are a few late breaking fixes in here that weren't worth trying to rush into 5.0 as they have been with us for quite a while. New device support * ad7476 - add support for TI ADS786X parts that are compatible with this Analog Devices driver. Good to see some simple devices are so similar. * Ingenic jz47xx SoC ADCs - new driver and bindings * Plantower PMS7003 partical sensor - new driver and bindings including vendor prefix. * TI DAC7612 - new driver and bindings for this dual DAC. New features * ad7768-1 - Sampling frequency control * bmi160 - Data ready trigger support, including open-drain dt binding. Cleanup / minor fixes. * Analog Device DACs - Fix some inconsistent licenses. These are only ones where there were two different license marked in the same file, and hence were previously unclear. * ads124s08 - Spelling fix. * adxl345 - Parameter alignement tidy up. * bmi160 - SPDX - correct a note on the types of supported interrupts which was too strict. - use iio_pollfunc_store_time to grab an earlier timestamp. - use if (ret) instead of if (ret < 0) to be consistent whilst simplifying some handling where ret was effectively getting written to 0 even though it was always already 0. * exynos_adc - Fix a null pointer dereference on unbind. - Fix number of channels on Exynos4x12 devices to be 4 rather than 8. * lpc32xx-adc - Move DT bindings doc out of staging. Oops, I missed this one when moving the driver. - SPDX. * npcm-adc - drop documentation of reset node as going to be done differently. It's a new driver this cycle so no need to support the previous binding going forwards. * sps30 - Fix an issue with a loop timeout test that meant it would never identify a timeout. - Mark deliberate switch fall throughs. * tag 'iio-for-5.1b' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (26 commits) iio: adc: exynos-adc: Use proper number of channels for Exynos4x12 dt-binding: iio: remove rst node from NPCM ADC document dt-bindings: iio: chemical: pms7003: add device tree support dt-bindings: add Plantower to the vendor prefixes iio: chemical: add support for Plantower PMS7003 sensor iio:chemical:sps30 Supress some switch fallthrough warnings. iio:adc:lpc32xx use SPDX-License-Identifier dt-bindings: iio: adc: move lpc32xx-adc out of staging iio: adc: ads124s08: fix spelling mistake "converions" -> "conversions" iio: adc: exynos-adc: Fix NULL pointer exception on unbind iio: chemical: sps30: fix a loop timeout test iio:accel:adxl345: Change alignment to match paranthesis iio:dac:dac7612: device tree bindings iio:dac:ti-dac7612: Add driver for Texas Instruments DAC7612 iio: adc: ad7476: Add support for TI ADS786X ADCs iio: adc: ad7768-1: Add support for setting the sampling frequency drivers: iio: dac: Fix wrong license for ADI drivers IIO: add Ingenic JZ47xx ADC driver. dt-bindings: iio/adc: Add bindings for Ingenic JZ47xx SoCs ADC. dt-bindings: iio/adc: Add docs for Ingenic JZ47xx SoCs ADC. ... |
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Rajan Vaja
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8fd27fb4cf |
dt-bindings: power: Add ZynqMP power domain bindings
Add documentation to describe ZynqMP power domain bindings. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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Linus Walleij
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e65372124c |
Linux 5.0-rc6
-----BEGIN PGP SIGNATURE----- iQFRBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAlxgqNUeHHRvcnZhbGRz QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiGwsoH+OVXu0NQofwTvVru 8lgF3BSDG2mhf7mxbBBlBizGVy9jnjRNGCFMC+Jq8IwiFLwprja/G27kaDTkpuF1 PHC3yfjKvjTeUP5aNdHlmxv6j1sSJfZl0y46DQal4UeTG/Giq8TFTi+Tbz7Wb/WV yCx4Lr8okAwTuNhnL8ojUCVIpd3c8QsyR9v6nEQ14Mj+MvEbokyTkMJV0bzOrM38 JOB+/X1XY4JPZ6o3MoXrBca3bxbAJzMneq+9CWw1U5eiIG3msg4a+Ua3++RQMDNr 8BP0yCZ6wo32S8uu0PI6HrZaBnLYi5g9Wh7Q7yc0mn1Uh1zWFykA6TtqK90agJeR A6Ktjw== =scY4 -----END PGP SIGNATURE----- Merge tag 'v5.0-rc6' into devel Linux 5.0-rc6 |
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Greg Kroah-Hartman
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5c07488d99 |
Merge 5.0-rc6 into char-misc-next
We need the char-misc fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
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Artur Rojek
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7cf74d515b |
dt-bindings: iio/adc: Add bindings for Ingenic JZ47xx SoCs ADC.
Add device tree bindings for the ADC controller on JZ47xx SoCs, used by the ingenic-adc driver. Signed-off-by: Artur Rojek <contact@artur-rojek.eu> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> |
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Linus Torvalds
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46c291e277 |
ARM: SoC fixes for linux-5.0
This is a bit larger than normal, as we had not managed to send out a pull request before traveling for a week without my signing key. There are multiple code fixes for older bugs, all of which should get backported into stable kernels: - tango: one fix for multiplatform configurations broken on other platforms when tango is enabled - arm_scmi: device unregistration fix - iop32x: fix kernel oops from extraneous __init annotation - pxa: remove a double kfree - fsl qbman: close an interrupt clearing race The rest is the usual collection of smaller fixes for device tree files, on the renesas, allwinner, meson, omap, davinci, qualcomm and imx platforms. Some of these are for compile-time warnings, most are for board specific functionality that fails to work because of incorrect settings. Signed-off-by: Arnd Bergmann <arnd@arndb.de> -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJcXg9kAAoJEGCrR//JCVInM/UP/1ikwMujrB33oT41l21KFvlw yrP3ji9Cyr6Ag8WCtgFYDXWw6uNW1eFYov8E4y8UKc16TSWWSvGmmIFM5K3OOtLe qAJrXTXCTBV2lGiWLIMlYQLAFav7H2CBgMLkRVLek1q7s6rV+hqV5hxfcAs6l2w7 G5Qe8pwuGuZ2qINTs7OdLizd+JAmMeIuPQHGhrZnEupiy+44hHgbrIacXPhwX4Ff s5MwGON4H3pL1PtVIXlWo5nQwHyF+mkbSzn1RwmKpsQ4wK0vP3LgUURlvc945JNo zA5C/eCO6xFv7LCvBsuw515eEfI74K/9PDPr7txDz8TePjusPMv5zrYkb+jUhFhm dELhd8dmh50chXXgHVggRbIjYCpOJeVqm9aeYVvHyKOTNmVohGDc06To/0hFHljw 1kgX4r2hUduTex0wwFks22TfcXr/cQzarXqyV6lRP5K/4IoU8MJCp4QLYXQK7HYY K9644aSaCTRGfRMbvVXYeykRgilEWT1wG8oREAH+PTWNIb47rqi/ByXitIrLkIWh Lnefj6bB863E0lPson03sBksylDRaluSeT5lVyjHzJsHwVLt2haqtaI892SZhUy1 /oR60CMkGuRhmwi4ASCCbr20E+sa/LDNUVC6+d/xs9+Bc/54GEKxS11ffthMUoO0 3EpgCZDHno+PMSIRkzPN =koHS -----END PGP SIGNATURE----- Merge tag 'armsoc-fixes-5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC fixes from Arnd Bergmann: "This is a bit larger than normal, as we had not managed to send out a pull request before traveling for a week without my signing key. There are multiple code fixes for older bugs, all of which should get backported into stable kernels: - tango: one fix for multiplatform configurations broken on other platforms when tango is enabled - arm_scmi: device unregistration fix - iop32x: fix kernel oops from extraneous __init annotation - pxa: remove a double kfree - fsl qbman: close an interrupt clearing race The rest is the usual collection of smaller fixes for device tree files, on the renesas, allwinner, meson, omap, davinci, qualcomm and imx platforms. Some of these are for compile-time warnings, most are for board specific functionality that fails to work because of incorrect settings" * tag 'armsoc-fixes-5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (30 commits) ARM: tango: Improve ARCH_MULTIPLATFORM compatibility firmware: arm_scmi: provide the mandatory device release callback ARM: iop32x/n2100: fix PCI IRQ mapping arm64: dts: add msm8996 compatible to gicv3 ARM: dts: am335x-shc.dts: fix wrong cd pin level ARM: dts: n900: fix mmc1 card detect gpio polarity ARM: dts: omap3-gta04: Fix graph_port warning ARM: pxa: ssp: unneeded to free devm_ allocated data ARM: dts: r8a7743: Convert to new LVDS DT bindings soc: fsl: qbman: avoid race in clearing QMan interrupt arm64: dts: renesas: r8a77965: Enable DMA for SCIF2 arm64: dts: renesas: r8a7796: Enable DMA for SCIF2 arm64: dts: renesas: r8a774a1: Enable DMA for SCIF2 ARM: dts: da850: fix interrupt numbers for clocksource dt-bindings: imx8mq: Number clocks consecutively arm64: dts: meson: Fix mmc cd-gpios polarity ARM: dts: imx6sx: correct backward compatible of gpt ARM: dts: imx: replace gpio-key,wakeup with wakeup-source property ARM: dts: vf610-bk4: fix incorrect #address-cells for dspi3 ARM: dts: meson8m2: mxiii-plus: mark the SD card detection GPIO active-low ... |
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Jerome Brunet
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dbfc54534d |
dt-bindings: reset: meson: add g12a bindings
Add device tree bindings for the reset controller of g12a SoC family. Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> |
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Claudiu Beznea
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64e21add8c |
pinctrl: at91: add slewrate support for SAM9X60
Add slew rate support for SAM9X60 pin controller. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Weiyi Lu
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cd10b9343d |
dt-bindings: soc: fix typo of MT8173 power dt-bindings
fix incorrect IC name that will affect the MT8183 power dt-bindings Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
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Charles Keepax
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fdc98f070b |
mfd: lochnagar: Add initial binding documentation
Lochnagar is an evaluation and development board for Cirrus Logic Smart CODEC and Amp devices. It allows the connection of most Cirrus Logic devices on mini-cards, as well as allowing connection of various application processor systems to provide a full evaluation platform. This driver supports the board controller chip on the Lochnagar board. Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> |
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Weiyi Lu
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c3424f59a0 |
dt-bindings: clock: add clock for MT2712
Add new clock according to 3rd ECO design change. It's the parent clock of audio clock mux. Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |