Commit Graph

5 Commits

Author SHA1 Message Date
Rafał Miłecki
265dfbd9ae mtd: bcm47xxsflash: implement ChipCommon R/W ops
They are needed for erasing/writing. Use a magic pointers and small
functions to prepare code for adding other buses support in the future
(like SSB).

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-08-05 18:20:32 +01:00
Rafał Miłecki
a6fb35d379 mtd: bcm47xxsflash: define opcodes
We need them to add erase/write support. This may duplicate some defines
with bcma and/or ssb code, but it makes more sense to keep that in
bcm47xxsflash which is supposed to work with both buses.
Duplicated defines will be removed from ssb/bcma.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-04-05 13:14:17 +01:00
Rafał Miłecki
1f816bc729 mtd: bcm47xxsflash: store info about flash type
It's going to be needed for erase and write operations, they differ
between Atmel and ST flashes.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-04-05 13:14:14 +01:00
Rafał Miłecki
41c81536ea mtd: bcm47xxsflash: keep a reference to the BCMA
To implement erase and write support we need to "talk" with ChipCommon
BCMA core which serial flash it attached to.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-04-05 13:14:05 +01:00
Rafał Miłecki
a2f74a7dac mtd: bcm47xxsflash: add own struct for abstrating bus type
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
2013-02-04 09:26:30 +02:00