Commit Graph

27859 Commits

Author SHA1 Message Date
Christian König
8d76001e00 drm/amdgpu: reuse VMIDs assigned to a VM only if there is also a free one
This fixes a fairness problem with the GPU scheduler. VM having lot of
jobs could previously starve VM with less jobs.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:23 -04:00
Christian König
36fd7c5c3c drm/amdgpu: prefer VMIDs idle on the current ring
Prefer to use a VMIDs which are idle on the ring we want to submit to. This
also removes bubbling idle VMIDs up on the LRU, which is actually not
beneficial.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:22 -04:00
Christian König
3542023896 drm/amdgpu: add optional ring to amdgpu_sync_is_idle
Check if the sync object is idle depending on the ring a submission works with.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:21 -04:00
Christian König
a7e7a93e57 drm/amdgpu: remove amdgpu_sync_wait
Stop hiding bugs, instead print a proper error when the scheduler
doesn't handle all dependencies.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:21 -04:00
Christian König
6fc1367582 drm/amdgpu: generalize the scheduler fence
Make it two events, one for the job being scheduled and one when it is finished.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:20 -04:00
Christian König
0e9d239b8d drm/amdgpu: document amdgpu_sync_get_fence
It's not obvious what it should do.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:19 -04:00
Tom St Denis
78f73bf03c drm/amdgpu/gfx80: Add QUICK_PG bit to GFX header and use it.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:19 -04:00
Tom St Denis
dad4acc896 drm/amdgpu/gfx8: Tidy up various PG helpers
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:18 -04:00
Tom St Denis
216cde6008 drm/amdgpu/gfx8: Enable PG on Stoney
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:18 -04:00
Tom St Denis
413cf60073 drm/amdgpu/gfx8: Enable CG on Stoney
Enable all relevant CG flags for Stoney parts.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:17 -04:00
Tom St Denis
6ab3886c2c drm/amdgpu/gfx8: Switch Stoney to share CZ's RLC functions
According to the bringup code ST/CZ share the RLC
ENTER/EXIT logic.

Tested on my ST board.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:16 -04:00
Nicolai Hähnle
395d1fb948 drm/amdgpu: add amdgpu.cg_mask and amdgpu.pg_mask parameters
They allow disabling clock and power gating from the kernel command line,
which hopefully helps with diagnosing problems in the field.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Nicolai Hähnle <Nicolai.Haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:16 -04:00
Tom St Denis
f4b373f41c drm/amdgpu/trace: Add tracepoints to MMIO read/writes
Add tracepoints to the MMIO read/write so we can log
MMIO traffic.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:15 -04:00
yanyang1
c66875b1ee drm/amdgpu: print smc fw info in CGS.
The non-powerplay code handles this directly.  Do
it in cgs for powerplay.

Signed-off-by: yanyang1 <Young.Yang@amd.com>
Reviewed-by:  Rex Zhu Rex.Zhu@amd.com
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:15 -04:00
Alex Deucher
83ba126a9b drm/amdgpu: properly clean up runtime pm
Was missing the calls to fini.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:14 -04:00
Alex Deucher
bdfb760400 drm/radeon: work around lack of upstream ACPI support for D3cold
Until Dave's patch to support the new hybrid gfx ACPI method goes
upstream, we can fallback to the old ATPX method which seems to
still work.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:13 -04:00
Alex Deucher
c63695cc5e drm/amdgpu: work around lack of upstream ACPI support for D3cold
Until Dave's patch to support the new hybrid gfx ACPI method goes
upstream, we can fallback to the old ATPX method which seems to
still work.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:13 -04:00
Chunming Zhou
1974e30eb1 drm/amdgpu: add gpu reset to timeout handler
so that we could actually reset the GPU when it hangs.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:12 -04:00
Monk Liu
a909c6bd9f drm/amdgpu: fix ring debugfs bug
debugfs file added but not released after driver unloaded

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:12 -04:00
Tom St Denis
c71dbd93eb drm/amd/amdgpu: ring debugfs is read in increments of 4 bytes
If a user tries to read a non-multiple of 4 bytes it would have
read until the end of the ring potentially crashing the user
task.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:11 -04:00
Tom St Denis
4f4824b556 drm/amd/amdgpu: Convert ring debugfs entries to binary
They now emit ring data in binary which will be read/written by
the userspace tool umr shortly.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:10 -04:00
Alex Deucher
8491999285 drm/radeon: drop explicit pci D3/D0 setting for ATPX power control
The ATPX power control method does this for you.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:10 -04:00
Alex Deucher
31764c1e3b drm/radeon/atpx: hybrid platforms use d3cold
The platform d3 cold is used to power down the dGPU.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:09 -04:00
Alex Deucher
b8c9fd5ad4 drm/radeon/atpx: track whether if this is a hybrid graphics platform
hybrid graphics in this case refers to systems which use the new
platform d3 cold ACPI methods as opposed to ATPX for dGPU power
control.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:09 -04:00
Alex Deucher
522761cbc8 drm/amdgpu: drop explicit pci D3/D0 setting for ATPX power control
The ATPX power control method does this for you.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:08 -04:00
Alex Deucher
1167097576 drm/amdgpu/atpx: hybrid platforms use d3cold
The platform d3 cold is used to power down the dGPU.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:07 -04:00
Alex Deucher
2f5af82eea drm/amdgpu/atpx: track whether if this is a hybrid graphics platform
hybrid graphics in this case refers to systems which use the new
platform d3 cold ACPI methods as opposed to ATPX for dGPU power
control.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:07 -04:00
Alex Deucher
410ca8d13b drm/radeon/atpx: drop forcing of dGPU power control
Now that we handle this correctly, there is no need to force
it.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:06 -04:00
Alex Deucher
f7ea418972 drm/radeon: use PCI_D3hot for PX systems without dGPU power control
On PX systems without dGPU power control, use PCI_D3hot.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:05 -04:00
Alex Deucher
e1052b35f4 drm/radeon/atpx: add a query for ATPX dGPU power control
The runtime pm sequence is different depending on whether or
not the platform supports ATPX dGPU power control.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:05 -04:00
Alex Deucher
d814b24fb7 drm/radeon: add a delay after ATPX dGPU power off
ATPX dGPU power control requires a 200ms delay between
power off and on.  This should fix dGPU failures on
resume from power off.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-07-07 14:51:04 -04:00
Alex Deucher
305e12d0e2 drm/radeon: clean up atpx power control handling
The presence of the power control method should be determined
via the presence of the method in function 0.  However, some
sbioses only set the appropriate bits in function 1 so use
then to override a missing power control function.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:04 -04:00
Alex Deucher
cf26f9081f drm/radeon: disable power control on hybrid laptops
Windows 10 (and some 8.1) systems use standardized
ACPI calls for hybrid laptops to control dGPU power.
Detect those cases and disable the AMD specific ATPX
power control.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:03 -04:00
Alex Deucher
d85555f885 drm/amdgpu/atpx: drop forcing of dGPU power control
Now that we handle this correctly, there is no need to force
it.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:02 -04:00
Alex Deucher
7e32aa611b drm/amdgpu: use PCI_D3hot for PX systems without dGPU power control
On PX systems without dGPU power control, use PCI_D3hot.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:02 -04:00
Alex Deucher
a78fe13389 drm/amdgpu/atpx: add a query for ATPX dGPU power control
The runtime pm sequence is different depending on whether or
not the platform supports ATPX dGPU power control.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:01 -04:00
Alex Deucher
f81eb1a349 drm/amdgpu: add a delay after ATPX dGPU power off
ATPX dGPU power control requires a 200ms delay between
power off and on.  This should fix dGPU failures on
resume from power off.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-07-07 14:51:01 -04:00
Alex Deucher
8d45f80ed0 drm/amdgpu: clean up atpx power control handling
The presence of the power control method should be determined
via the presence of the method in function 0.  However, some
sbioses only set the appropriate bits in function 1 so use
then to override a missing power control function.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:00 -04:00
Alex Deucher
5c61479247 drm/amdgpu: disable power control on hybrid laptops
Windows 10 (and some 8.1) systems use standardized
ACPI calls for hybrid laptops to control dGPU power.
Detect those cases and disable the AMD specific ATPX
power control.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:59 -04:00
Edmondo Tommasina
662ce7bce7 drm/radeon: allow PACKET3_PFP_SYNC_ME on evergreen
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:59 -04:00
Tom St Denis
7894745abb drm/amdgpu/gfx8: Add serdes wait for idle in CGCG en/disable
Must wait for SERDES idle before exiting RLC SAFEMODE

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:58 -04:00
Eric Huang
0c9e20055d drm/amd/powerplay: add mclk OD(overdrive) support for Polaris10
The maximum OD percentage is 20.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:58 -04:00
Eric Huang
391be5307a drm/amd/powerplay: add mclk OD(overdrive) support for Fiji
The maximum OD percentage is 20.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:57 -04:00
Eric Huang
f715d5b357 drm/amd/powerplay: add mclk OD(overdrive) support for Tonga
The maximum OD percentage is 20.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:56 -04:00
Eric Huang
40899d5529 drm/amdgpu: add mclk OD(overdrive) support for CI
The maximum OD percentage is 20.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:56 -04:00
Eric Huang
f2bdc05f77 drm/amdgpu: add the common code to support mclk OD
This implements mclk OverDrive(OD) through sysfs.
The new entry pp_mclk_od is read/write. The value of input/output
is an integer of the overclocking percentage.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:55 -04:00
Huang Rui
6bb6b2972d drm/amdgpu: add powercontainment module parameter
This patch makes powercontainment feature configurable. Currently, the
powercontainment is not very stable, so add a module parameter to
enable/disable it via user mode.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:55 -04:00
Christian König
c5f74f7802 drm/amdgpu: fix and cleanup job destruction
Remove the job reference counting and just properly destroy it from a
work item which blocks on any potential running timeout handler.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:54 -04:00
Christian König
f42d20a942 drm/amdgpu: move locking into the functions who need it
Otherwise the locking becomes rather confusing.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:53 -04:00
Christian König
0e51a772e2 drm/amdgpu: properly abstract scheduler timeout handling
The driver shouldn't mess with the scheduler internals.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:53 -04:00