drivers/clocksource based driver for timer. This leads to removal
of machine specific timer driver.
There are two patches adding missing fixed regulators for audio codecs
on DM365 and DM644x EVMs.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJeHgPjAAoJEGFBu2jqvgRN8NkP/Rf6HDaFX/LAq8NQNz0PanFW
Dgd3pWtyY2w+TyXJZX9aUsYwU6xyTB79C9z6mOPo31H1oNRkKK+DeaDC2NSGj1Nt
CtFKefaPATUzFUO/xB4GK8LHint9gPI+wolo7QTxXDhZTssf6/lUCkcgMUC5gzCj
0ilIZvNt4Ud0Nz3C46GyqDUqlBwnI/WAkGc5HLahzTi4eYz0WX/5Beu5ffbG1pnc
ID0hfxQA28PDJ/1abs9EOLJvpezPK8gyUuSe16b99PIeoL4sP9PurBM40RAd9pxq
h/ljHsSt8+VmPbqTQd393vybASebOx4JiLnPMKXCFupwz1PJ+R8D83TkG9FMPwxX
8XwUvayB72n2oJKiC1BgVGywX4cwqhJCskoKAgCM0t0OuAuqFilMBFQCvDL9yg1C
11M+umd6xtsqK1b9E5qTXMK3wWZ5y/XstsW3Uwdc0S2a53MIy4uXIuDK8tyL/i84
x2nnW/ZAtMmikPtCtM0EXuvVJ6PU4ayMYba7uzVBT6Xe4aKXudsjj68inC+Jnqh4
qHtSHq1IW5P1Ru5k1jPgJNjSuv57G41zcqmx4tOwwEjEyw7XGwUA00aAmoD5enTs
lz2O25l3A102POmKaFEfzPL4P2p4JDlHA8cP/vvNLB1BxnXdqIGzrRiJqF2RkItM
hJoKADfRHL5AoP7F8rx/
=02go
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v5.6/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into arm/late
DaVinci SoC updates for v5.6 include migrating DM365 SoC to use
drivers/clocksource based driver for timer. This leads to removal
of machine specific timer driver.
There are two patches adding missing fixed regulators for audio codecs
on DM365 and DM644x EVMs.
* tag 'davinci-for-v5.6/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: dm644x-evm: Add Fixed regulators needed for tlv320aic33
ARM: davinci: dm365-evm: Add Fixed regulators needed for tlv320aic3101
ARM: davinci: remove legacy timer support
ARM: davinci: dm365: switch to using the clocksource driver
clocksource: davinci: only enable clockevents once tim34 is initialized
Link: https://lore.kernel.org/r/043eb5b2-a302-4de6-a3e8-8238e49483b1@ti.com/
Signed-off-by: Olof Johansson <olof@lixom.net>
This builds the BCM2711 thermal driver as module for the Raspberry Pi 4.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Tested-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/1578941778-23321-5-git-send-email-stefan.wahren@i2se.com
This enables thermal for the BCM2711 (used on Raspberry Pi 4) by adding
the AVS monitor and a subnode for the thermal part.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Tested-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/1578941778-23321-4-git-send-email-stefan.wahren@i2se.com
A couple of fixes have come in that would be good to include in this
release:
- A fix for amount of memory on Beaglebone Black. Surfaced now since
GRUB2 doesn't update memory size in the booted kernel.
- A fix to make SPI interfaces work on am43x-epos-evm.
- Small Kconfig fix for OPTEE (adds a depend on MMU) to avoid build
failures.
-----BEGIN PGP SIGNATURE-----
iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAl4stI8PHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3AtAP/1Z8PYhL6nXlCvXZLi0SttwZagKl6ZYL+VkW
5a+8vu0gQXTNCmfux0S0gLKPJUe7nVc7vJswz5KAtDKCYFdjppPch22GrvjFXFJM
+kGmb9jgyPhpAu4Ja4TEM8Ovqcg+n+mcFfzQQkxpg+OjXTQ8PNX3i18220KScc32
2bmezmxMh/b54tC9mtXZeihFghWeVmApGYmcsp/fuxKo3Q/v/DxceEqyT6lNGVS2
Z1gpp7TWi8eh1etsT/++jdX7IJCDfcJv3kYt72NqJ9yUk4gAkY/c8ezc2UW+JAfa
VsxFfQw9jQ3pzTgnoxrTk2g53XnxKUGK/PKuhg5h6+ZH1dz+oc0BoKHIZciwboi0
djfD6Gv5v0yQMClmSThDbLaocXsHtvv1dDnm9i1AK68WnDnd5hVYxBiwVKMUO/UL
FiXMKqB5npSLShs2YuFBOEB8W2DA1HtFylr5EGz4+OtITmkv7G4rKYlsdhwyeBIF
rm27zwiN0wI7ft1uKezw0tsuxZbl8dxcDkinjAuYfJFJZSgKTkwUrfeiztW9m9M7
ifDO0SYc/w1W/DWYoWJYd0OY7ZwPMRXqgVcPGOckGVYQj/TuavV96gV81IsUlh+t
QQVnmAqxvYV4AwoaCMKo1WKg3hLlFNvC5NOGSgALG77ZmJpF7kKhR25THzJStt8a
ATUgh1An
=xQ63
-----END PGP SIGNATURE-----
Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC fixes from Olof Johansson:
"A couple of fixes have come in that would be good to include in this
release:
- A fix for amount of memory on Beaglebone Black. Surfaced now since
GRUB2 doesn't update memory size in the booted kernel.
- A fix to make SPI interfaces work on am43x-epos-evm.
- Small Kconfig fix for OPTEE (adds a depend on MMU) to avoid build
failures"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
ARM: dts: am43x-epos-evm: set data pin directions for spi0 and spi1
tee: optee: Fix compilation issue with nommu
ARM: dts: am335x-boneblack-common: fix memory size
This series of changes mostly configures the cameras for dra7 and
am437x that have been pending for few months now because of waiting
for clock dependencies to clear. So these changes are based on earlier
dts changes with with Tero Kristo's for-5.6-ti-clk branch merged in.
Then there's a series of changes to configure powervr sgx target module
for am335x, am437x and dra7 that have been waiting to have the rstctrl
reset driver dependencies to clear.
Also included are few minor patches to configure 1-wire and coulomb
counter calibration interrupt for droid4.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAl4rTjIRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXNPIxAAsx6cR/yzoEvUv1fGFi44Y/VZEhfI/8yT
5esGWql/UINkyTLBTsME6liDTt7rAVxcHH1JQj04hYH/w/PQU8S4iu8ZVwxoAb9R
Mmnfn8Py26scney0zseJc6tTTDbtXF+mxDBYUqAJNKjDyoRkJKxWtMMOHUC7WjVW
P5E4uWgi2ydEFgn6hOzLORgHPtNnOWPdXYzKvmum7VZdRny7KHcuOk4kVFnj3dzG
RwGrsOQcs2EyHd08n+U3tZqk34JqhOWi2VAKPZTHVlsZOdDKU9hm45ZSDh/j7Xoy
74x2ux81guKBAtgpKSJR5TUottgPM5IdnnyCmKkDgF7AWySByeJYPOVWyxwZuSQD
tCmCi9fFSXCogoijMvSFPbcsKI/u6UKHYIOS9zvJo70FxNVTckhzjTH+DRQpjrTB
oEAfpCS56bHUUYvPomDvxRT87kLlcs/A6g8+puRKd2xa3dmsXkTKeppuEBIC6WKE
JtZYGsvWSe0gSVscsrE3Ecf17jS2O7Yhy3/4eOHJzUgsIGn8xcjuJJO3Av+bFj87
kDF66tRKR6LcKD1S6v5a87hmKD3rxkj23LUEvS0bWsOVLmgqIQYeZYpR5ujkRLxC
1NlzWFVqBtCMe6qPRz7FaitrdZlTaMURRD0GXSQmZCsTrSVrghUTJBZw92ep2kWD
rIwSzpB1p08=
=u4PK
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.6/dt-late-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/late
Late omap dts changes for v5.6 merge window
This series of changes mostly configures the cameras for dra7 and
am437x that have been pending for few months now because of waiting
for clock dependencies to clear. So these changes are based on earlier
dts changes with with Tero Kristo's for-5.6-ti-clk branch merged in.
Then there's a series of changes to configure powervr sgx target module
for am335x, am437x and dra7 that have been waiting to have the rstctrl
reset driver dependencies to clear.
Also included are few minor patches to configure 1-wire and coulomb
counter calibration interrupt for droid4.
* tag 'omap-for-v5.6/dt-late-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (25 commits)
ARM: dts: omap4-droid4: Enable hdq for droid4 ds250x 1-wire battery nvmem
ARM: dts: motorola-cpcap-mapphone: Configure calibration interrupt
ARM: dts: Configure interconnect target module for am437x sgx
ARM: dts: Configure sgx for dra7
ARM: dts: Configure rstctrl reset for am335x SGX
ARM: dts: dra7: Add ti-sysc node for VPE
ARM: dts: dra7: add vpe clkctrl node
ARM: dts: am43x-epos-evm: Add VPFE and OV2659 entries
ARM: dts: am437x-sk-evm: Add VPFE and OV2659 entries
ARM: dts: am43xx: add support for clkout1 clock
arm: dts: dra76-evm: Add CAL and OV5640 nodes
arm: dtsi: dra76x: Add CAL dtsi node
arm: dts: dra72-evm-common: Add entries for the CSI2 cameras
ARM: dts: DRA72: Add CAL dtsi node
ARM: dts: dra7-l4: Add ti-sysc node for CAM
ARM: OMAP: DRA7xx: Make CAM clock domain SWSUP only
ARM: dts: dra7: add cam clkctrl node
ARM: dts: Add omap3-echo
ARM: dts: Add dtsi files for AM3703, AM3715 and DM3725
ARM: dts: am335x-icev2: Add support for OSD9616P0899-10 at i2c0
...
Link: https://lore.kernel.org/r/pull-1579896427-50330@atomide.com-3
Signed-off-by: Olof Johansson <olof@lixom.net>
A series of changes to configure secure accelerators for omap4 & 5
to finally get hardware random number generator working.
Apologies on a late pull request on these changes, but this pull
request could not be sent out earlier because of a dependency to
recent clock changes. This is based on earlier changes to drop omap
legacy platform data with Tero Kristo's for-5.6-ti-clk branch merged
in.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAl4rS9oRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXMxxxAAzAi5t+/pEpoXakNYaDSGYieOVuZyFxjb
KIsE8/AbJlD8uRBjlauFYV79EyS9ruhjRYxM8KCHP9jWZZ5LZ2mB2m5xWJ3KMo5f
XazWYszmw4RtApktVbgtVHwSBfhsNZ0BVgLf3GvL3XAPf1pF3YE7f9y3B/Kt4YUT
UMhY3LEYaqV7ZaLcthGyl8h819MM6MAAqgGeOnSjBpNeDz7Fg/LTy0JTkjpm3ISL
XrGljIn4csXNCDLYjZrla07GJmH4sFK+yC5eEcKrunbJ4HC9a0mf1mpHvmn42By6
xFoRHFzyKsRq4BR+Vx6SOcBHrO+wGYPO1z3Mx4PHj4XDOq8vpDo8KY1/5Gbe4HmH
LS7rxjCd7kX0zc1Q3UNJKN0A1jduh0pxu9xQIFKs5OMqxZGW/Y0UHJpmzB8qBEMb
GyfoYOWwiiy0BAggAB5HNA4fe9zR1n2OgF0+htI9nWqaHVznIWdyApJ0IGgf1XLo
4pC0+fngJoT5Se97/0xIl/UREcdCnavEmGTWskhOmS84pXpyNtJb/F4tcoAzFMhP
sydxi5UZHeT21RIA2r8xgNduywI8sMiUCMYxgc5iKYZXk1T8lTGAktMBSFAgAzhu
IFvhJyIzamQXkUZKfHEMZ/t07aByz/95uhrvZhxzQhAwCS7je3/diqx0T93VFqVq
2OJYPb7i1nw=
=QQkw
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.6/ti-sysc-drop-pdata-crypto-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/late
Late changes for omap secure accelerators for v5.6 merge window
A series of changes to configure secure accelerators for omap4 & 5
to finally get hardware random number generator working.
Apologies on a late pull request on these changes, but this pull
request could not be sent out earlier because of a dependency to
recent clock changes. This is based on earlier changes to drop omap
legacy platform data with Tero Kristo's for-5.6-ti-clk branch merged
in.
* tag 'omap-for-v5.6/ti-sysc-drop-pdata-crypto-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (98 commits)
ARM: OMAP2+: Drop legacy platform data for omap4 des
ARM: OMAP2+: Drop legacy platform data for omap4 sham
ARM: OMAP2+: Drop legacy platform data for omap4 aes
ARM: dts: Configure interconnect target module for omap4 des
ARM: dts: Configure interconnect target module for omap4 aes
ARM: dts: Configure interconnect target module for omap4 sham
ARM: dts: Configure omap5 rng to probe with ti-sysc
ARM: dts: Configure omap4 rng to probe with ti-sysc
ARM: dts: Add missing omap5 secure clocks
ARM: dts: Add missing omap4 secure clocks
clk: ti: clkctrl: Fix hidden dependency to node name
clk: ti: add clkctrl data dra7 sgx
clk: ti: omap5: Add missing AESS clock
clk: ti: dra7: fix parent for gmac_clkctrl
clk: ti: dra7: add vpe clkctrl data
clk: ti: dra7: add cam clkctrl data
dt-bindings: clock: Move ti-dra7-atl.h to dt-bindings/clock
dmaengine: ti: omap-dma: don't allow a null od->plat pointer to be dereferenced
ARM: OMAP2+: Drop legacy platform data for sdma
ARM: OMAP2+: Drop legacy init for sdma
...
Link: https://lore.kernel.org/r/pull-1579896427-50330@atomide.com-2
Signed-off-by: Olof Johansson <olof@lixom.net>
We can get build failures if let's say if only am335x SoC is selected.
Let's fix this by always building secure-common.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAl4rSiERHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXNyChAAnThNkBUJIACXwhKGzTIzhtgAiKHc+VLa
qRec72Qd/Z6mZNHZa/qMd3xTw535Doaz0vc2Yul5YwvgBiwtMTazuDPtqwYIwOma
TqBdbnqh0yL8PU6FhfuOUD/6n9eSEpJy2r079wBYvwJ5oSX/WtnCPNt+qtWFU1pM
fiQmS1vYAvyiQxOaXSfvU3OULMJwJd9Zk7m6AYbMkA2898krBAfcwdEQwJJK1A+3
tT8ED96hXYJZkwbodFJxof9jdytxWKdTBrKWvfrmxdutlGMxYvPN9G9k5LYwo+eu
31HxeVLDXtSBRU9FV7I4CD7vUhM0lk/PXTk0Fxv95uGy6jZUxbo30f/gLHSOvwTD
b4yviF/bkeM7JhYqoSQaCSKxiuDqRKAfQTXE6zNDYk3P97N4bht/yKyPfjTHPXof
IPOVmrzxvqlGqS+DrfA/Drr22AS17Lzv3pXmhyeD1Pr4fKttYzuS06XLXdC/mUlZ
kyntEbLbiHE18ii9NBza0mhmYZUmKnGPkHnQj3gICztfp3mkILhnUY19YoQOkrPP
cpLRDtS9rBdV+z6dlgAp/zk9XAla02DwYsUMCGlT+OKYSHjTR83TdPzGKvbNrLt9
AqRt/Cv6qpPP3xBHCb17zBYKY3RQP7JPgoBEJ6YiGczTHmt5Kw+L8S2nL56Sf46b
gjCeR6zWSZk=
=hKrK
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.6/soc-build-fix-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc
Randconfig build fix for recent SoC changes for v5.6
We can get build failures if let's say if only am335x SoC is selected.
Let's fix this by always building secure-common.
* tag 'omap-for-v5.6/soc-build-fix-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Fix undefined reference to omap_secure_init
Link: https://lore.kernel.org/r/pull-1579896427-50330@atomide.com
Signed-off-by: Olof Johansson <olof@lixom.net>
Stubs for swapops are not required after 9b98fa2294 (mm: stub out
all of swapops.h for !CONFIG_MMU)
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Kmemleak relies on specific symbols to register the read only data
during init (e.g. __start_ro_after_init).
Trying to build an XIP kernel on arm results in the linking error
reported below because when this option is selected read only data
after init are not allowed since .data is read only (.rodata).
arm-linux-gnueabihf-ld: mm/kmemleak.o: in function `kmemleak_init':
kmemleak.c:(.init.text+0x148): undefined reference to `__end_ro_after_init'
arm-linux-gnueabihf-ld: kmemleak.c:(.init.text+0x14c):
undefined reference to `__end_ro_after_init'
arm-linux-gnueabihf-ld: kmemleak.c:(.init.text+0x150):
undefined reference to `__start_ro_after_init'
arm-linux-gnueabihf-ld: kmemleak.c:(.init.text+0x156):
undefined reference to `__start_ro_after_init'
arm-linux-gnueabihf-ld: kmemleak.c:(.init.text+0x162):
undefined reference to `__start_ro_after_init'
arm-linux-gnueabihf-ld: kmemleak.c:(.init.text+0x16a):
undefined reference to `__start_ro_after_init'
linux/Makefile:1078: recipe for target 'vmlinux' failed
Fix the issue enabling kmemleak only on non XIP kernels.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
To perform the reserve_crashkernel() operation kexec uses SECTION_SIZE to
find a memblock in a range.
SECTION_SIZE is not defined for nommu systems. Trying to compile kexec in
these conditions results in a build error:
linux/arch/arm/kernel/setup.c: In function ‘reserve_crashkernel’:
linux/arch/arm/kernel/setup.c:1016:25: error: ‘SECTION_SIZE’ undeclared
(first use in this function); did you mean ‘SECTIONS_WIDTH’?
crash_size, SECTION_SIZE);
^~~~~~~~~~~~
SECTIONS_WIDTH
linux/arch/arm/kernel/setup.c:1016:25: note: each undeclared identifier
is reported only once for each function it appears in
linux/scripts/Makefile.build:265: recipe for target 'arch/arm/kernel/setup.o'
failed
Make KEXEC depend on MMU to fix the compilation issue.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
As of commit ac7c3e4ff4 ("compiler: enable CONFIG_OPTIMIZE_INLINING
forcibly"), free_memmap() might not always be inlined, and thus is
triggering a section warning:
WARNING: vmlinux.o(.text.unlikely+0x904): Section mismatch in reference from the function free_memmap() to the function .meminit.text:memblock_free()
Mark it as __init, since the faller (free_unused_memmap) already is.
Fixes: ac7c3e4ff4 ("compiler: enable CONFIG_OPTIMIZE_INLINING forcibly")
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The stacktrace code can read beyond the stack size, when it attempts to
read pt_regs from exception frames.
This can happen on normal, non-corrupt stacks. Since the unwind
information in the extable is not correct for function prologues, the
unwinding code can return data from the stack which is not actually the
caller function address, and if in_entry_text() happens to succeed on
this value, we can end up reading data from outside the task's stack
when attempting to read pt_regs, since there is no bounds check.
Example:
[<8010e729>] (unwind_backtrace) from [<8010a9c9>] (show_stack+0x11/0x14)
[<8010a9c9>] (show_stack) from [<8057d8d7>] (dump_stack+0x87/0xac)
[<8057d8d7>] (dump_stack) from [<8012271d>] (tasklet_action_common.constprop.4+0xa5/0xa8)
[<8012271d>] (tasklet_action_common.constprop.4) from [<80102333>] (__do_softirq+0x11b/0x31c)
[<80102333>] (__do_softirq) from [<80122485>] (irq_exit+0xad/0xd8)
[<80122485>] (irq_exit) from [<8015f3d7>] (__handle_domain_irq+0x47/0x84)
[<8015f3d7>] (__handle_domain_irq) from [<8036a523>] (gic_handle_irq+0x43/0x78)
[<8036a523>] (gic_handle_irq) from [<80101a49>] (__irq_svc+0x69/0xb4)
Exception stack(0xeb491f58 to 0xeb491fa0)
1f40: 7eb14794 00000000
1f60: ffffffff 008dd32c 008dd324 ffffffff 008dd314 0000002a 801011e4 eb490000
1f80: 0000002a 7eb1478c 50c5387d eb491fa8 80101001 8023d09c 40080033 ffffffff
[<80101a49>] (__irq_svc) from [<8023d09c>] (do_pipe2+0x0/0xac)
[<8023d09c>] (do_pipe2) from [<ffffffff>] (0xffffffff)
Exception stack(0xeb491fc8 to 0xeb492010)
1fc0: 008dd314 0000002a 00511ad8 008de4c8 7eb14790 7eb1478c
1fe0: 00511e34 7eb14774 004c8557 76f44098 60080030 7eb14794 00000000 00000000
2000: 00000001 00000000 ea846c00 ea847cc0
In this example, the stack limit is 0xeb492000, but 16 bytes outside the
stack have been read.
Fix it by adding bounds checks.
Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The Kconfig stage (arch/Kconfig) has already evaluated whether the
compiler supports -fno-stack-protector.
You can use CONFIG_CC_HAS_STACKPROTECTOR_NONE instead of invoking
the compiler to check the flag here.
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
This reverts commit e17b1af96b, which is
no longer necessary now that the v7 specific routines take care not to
issue CP15 barrier instructions before they are enabled in SCTLR.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Commit e17b1af96b
"ARM: 8857/1: efi: enable CP15 DMB instructions before cleaning the cache"
added some explicit handling of the CP15BEN bit in the SCTLR system
register, to ensure that CP15 barrier instructions are enabled, even
if we enter the decompressor via the EFI stub.
However, as it turns out, there are other ways in which we may end up
using CP15 barrier instructions without them being enabled. I.e., when
the decompressor startup code skips the cache_on() initially, we end
up calling cache_clean_flush() with the caches and MMU off, in which
case the CP15BEN bit in SCTLR may not be programmed either. And in
fact, cache_on() itself issues CP15 barrier instructions before actually
enabling them by programming the new SCTLR value (and issuing an ISB)
Since these routines are shared between v7 CPUs and older ones that
implement the CPUID extension as well, using the ordinary v7 barrier
instructions in this code is not possible, and so we should enable the
CP15 ones explicitly before issuing them. Note that a v7 ISB is still
required between programming the SCTLR register and using the CP15 barrier
instructions, and we should take care to branch over it if the CP15BEN
bit is already set, given that in that case, the CPU may not support it.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Looks like we have wrong default memory size for beaglebone black,
it has at least 512 MB of RAM and not 256 MB. This causes an issue
when booted with GRUB2 that does not seem to pass memory info to
the kernel.
And for am43x-epos-evm the SPI pin directions need to be configured
for SPI to work.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAl4rSQkRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXMSeg//f607jg+6RqkJ6dMczxBSHpkAYSdGBjpB
nwa8O7jNbHfjtUGXTm+9Xx7sKXTR+600lobgMYguRlitTYNtC2jQG5ux92/6sTU/
5qB6m0qkhMqOKDOI2AZ1wIcc6PP067M7x+il0Rs9/PRdIaDNUMHsNZ6+sxEWUR7N
1vcYMz3PL8KW/ucAWxBO4NeMDwg5vi6dIILBl63sBlrH6AgYTVT8LqNhSysZWmXY
Gj5JNIt+FjvhKGYNnD1jeFYX/+TQH10B8Ouepj6ixdcXaA4v0553S7S7R3HYR+l8
+AFcWB1TMuvlNv5vbnVd+PUXhhyByVDQv15/92i+rKMXUxxdLZDuKeqa3/GbL/vI
oU5ShNXWQ7C7g+SrxYfHT0OQz38j7TUOKrRJKBxFYykneoC33uwpSaAUTSN0PuXT
MA7RJVBtjHe8tfbkII3UqqvHxmVB1TAkj9TE9y21Dznlq2fyq7w/13UNS67VCZ57
4vO722ULOHVLnTmwH6gA+e1Cjhiz17fJJq3wpDTqqn0As4cuLOAio7PmHgNcm2YG
Qg9MVQV2Rj3YGdxGVDKCfTOLt4tQzJ8qbN0o7XIp0CgyK7Sg2djcjzUMtJDx++Ez
6tRmyfcY/GD5ykPfEUXvJcDWw0tIFSRUQMtXMi3vnuNh5mYFQ2ciQB5KkPBhyTST
CaAAg8vCvek=
=XXZc
-----END PGP SIGNATURE-----
Merge tag 'omap-for-fixes-whenever-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes
Few minor fixes for omaps
Looks like we have wrong default memory size for beaglebone black,
it has at least 512 MB of RAM and not 256 MB. This causes an issue
when booted with GRUB2 that does not seem to pass memory info to
the kernel.
And for am43x-epos-evm the SPI pin directions need to be configured
for SPI to work.
* tag 'omap-for-fixes-whenever-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am43x-epos-evm: set data pin directions for spi0 and spi1
ARM: dts: am335x-boneblack-common: fix memory size
Link: https://lore.kernel.org/r/pull-1579895109-287828@atomide.com
Signed-off-by: Olof Johansson <olof@lixom.net>
Instead of using the legacy GPIO API and keeping track on
polarity inversion semantics in the driver, switch to use
GPIO descriptors for this driver and change all consumers
in the process.
This makes it possible to retire platform data completely:
the only remaining platform data member was "wakeup" which
was intended to make the vbus interrupt wakeup capable,
but was not set by any users and thus remained unused. VBUS
was not waking any devices up. Leave a comment about it so
later developers using the platform can consider setting it
to always enabled so plugging in USB wakes up the platform.
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Felipe Balbi <balbi@kernel.org>
Acked-by: Sylwester Nawrocki <snawrocki@kernel.org>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20200123155013.93249-1-linus.walleij@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
With "[PATCHv3] w1: omap-hdq: Simplify driver with PM runtime autosuspend"
we can read the droid4 battery information over 1-wire with this patch
with something like:
# modprobe omap_hdq
# hd /sys/bus/w1/devices/89-*/89-*/nvmem
...
Unfortunately the format of the battery data seems to be Motorola specific
and is currently unusable for battery charger unless somebody figures out
what it means.
Note that currently keeping omap_hdq module loaded will cause extra power
consumption as it seems to scan devices periodically.
Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Pavel Machek <pavel@ucw.cz>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We added coulomb counter calibration support With commit 0cb90f071f
("power: supply: cpcap-battery: Add basic coulomb counter calibrate
support"), but we also need to configure the related interrupt.
Without the interrupt calibration happens based on a timeout after two
seconds, with the interrupt the calibration just gets done a bit faster.
Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Pavel Machek <pavel@ucw.cz>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This seems to be similar to what we have for am335x. The following can be
tested via sysfs with the to ensure the SGX module gets enabled and disabled
properly:
# echo on > /sys/bus/platform/devices/5600fe00.target-module/power/control
# rwmem 0x5600fe00 # revision register
0x5600fe00 = 0x40000000
# echo auto > /sys/bus/platform/devices/5600fe00.target-module/power/control
# rwmem 0x5000fe00
Bus error
Note that this patch depends on the PRM rstctrl driver that has
been recently posted. If the child device driver(s) need to prevent
rstctrl reset on PM runtime suspend, the drivers need to increase
the usecount for the shared rstctrl reset that can be mapped also
for the child device(s) or accessed via dev->parent.
Cc: Adam Ford <aford173@gmail.com>
Cc: Filip Matijević <filip.matijevic.pz@gmail.com>
Cc: "H. Nikolaus Schaller" <hns@goldelico.com>
Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Cc: moaz korena <moaz@korena.xyz>
Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Cc: Philipp Rossak <embed3d@gmail.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
I've tested that the interconnect target module enables and idles
just fine when probed with ti-sysc with PM runtime control via sys:
# echo on > $(find /sys -name control | grep \/5600)
# rwmem 0x5600fe00 # OCP Revision
0x5600fe00 = 0x40000000
# echo auto > $(find /sys -name control | grep \/5600)
Cc: "H. Nikolaus Schaller" <hns@goldelico.com>
Cc: Robert Nelson <robertcnelson@gmail.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The following can be tested via sysfs with the following to ensure the SGX
module gets enabled and disabled properly:
# echo on > /sys/bus/platform/devices/5600fe00.target-module/power/control
# rwmem 0x5600fe00 # revision register
0x5600fe00 = 0x40000000
# echo auto > /sys/bus/platform/devices/5600fe00.target-module/power/control
# rwmem 0x5000fe00
Bus error
Note that this patch depends on the PRM rstctrl driver that has
been recently posted. If the child device driver(s) need to prevent
rstctrl reset on PM runtime suspend, the drivers need to increase
the usecount for the shared rstctrl reset that can be mapped also
for the child device(s) or accessed via dev->parent.
Cc: Adam Ford <aford173@gmail.com>
Cc: Filip Matijević <filip.matijevic.pz@gmail.com>
Cc: "H. Nikolaus Schaller" <hns@goldelico.com>
Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Cc: moaz korena <moaz@korena.xyz>
Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Cc: Philipp Rossak <embed3d@gmail.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add VPE node as a child of l4 interconnect in order for it to probe
using ti-sysc.
Signed-off-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add clkctrl nodes for VPE module.
Note that because of the current dts node name dependency for mapping to
clock domain, we must still use "vpe-clkctrl@" naming instead of generic
"clock@" naming for the node. And because of this, it's probably best to
apply the dts node addition together along with the other clock changes.
Signed-off-by: Benoit Parrot <bparrot@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add VPFE device nodes entries.
Add OmniVision OV2659 sensor device nodes and linkage.
Since Rev1.2a on this board the sensor source clock (xvclk) has a
dedicated 12Mhz oscillator instead of using clkout1.
Add 'audio_mstrclk' fixed clock object to represent it.
Signed-off-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add VPFE device nodes entries.
Add OmniVision OV2659 sensor device nodes and linkage.
The sensor clock (xvclk) is sourced from clkout1.
Add clock entries to properly select clkout1 and set its parent
clock to sys_clkin_ck.
Signed-off-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
clkout1 clock node and its generation tree was missing. Add this based
on the data on TRM and PRCM functional spec.
commit 664ae1ab25 ("ARM: dts: am43xx: add clkctrl nodes") effectively
reverted this commit 8010f13a40 ("ARM: dts: am43xx: add support for
clkout1 clock") which is needed for the ov2659 camera sensor clock
definition hence it is being re-applied here.
Note that because of the current dts node name dependency for mapping to
clock domain, we must still use "clkout1-*ck" naming instead of generic
"clock@" naming for the node. And because of this, it's probably best to
apply the dts node addition together along with the other clock changes.
Fixes: 664ae1ab25 ("ARM: dts: am43xx: add clkctrl nodes")
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Benoit Parrot <bparrot@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add device nodes for CSI2 camera board OV5640.
Add the CAL port nodes with the necessary linkage to the ov5640 nodes.
Signed-off-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add the required dtsi node to support the Camera
Adaptation Layer (CAL) for the DRA76 family of devices.
Signed-off-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add device nodes for CSI2 camera board OV5640.
Add the CAL port nodes with the necessary linkage to the ov5640 nodes.
Signed-off-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch adds the required dtsi node to support the Camera
Adaptation Layer (CAL) for the DRA72 family of devices.
Signed-off-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add CAM nodes as a child of l4 interconnect in order for it to probe
using ti-sysc.
Signed-off-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Both CAL and VIP rely on this clock domain. But CAL DPHY require
LVDSRX_96M_GFCLK to be active. When this domain is set to HWSUP the
LVDSRX_96M_GFCLK is on;y active when VIP1 clock is also active. If only
CAL on DRA72x (which uses the VIP2 clkctrl) probes the CAM domain is
enabled but the LVDSRX_96M_GFCLK is left gated. Since LVDSRX_96M_GFCLK
is sourcing the input clock to the DPHY then actual frame capture cannot
start as the phy are inactive.
So we either have to also enabled VIP1 even if we don't intend on using
it or we need to set the CAM domain to use SWSUP only.
This patch implements the latter.
Signed-off-by: Benoit Parrot <bparrot@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add clkctrl nodes for CAM domain.
Note that because of the current dts node name dependency for mapping to
clock domain, we must still use "cam-clkctrl@" naming instead of generic
"clock@" naming for the node. And because of this, it's probably best to
apply the dts node addition together along with the other clock changes.
Signed-off-by: Benoit Parrot <bparrot@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This is similar to dra7 and omap4 with different clock naming
and module address.
Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add RNG interconnect data for omap4 similar to what dra7 has. The
clock is OMAP4_CM_L4SEC_RNG_CLKCTRL_OFFSET at offset address 0x01c0,
which matches what dra7 also has with DRA7_L4SEC_CLKCTRL_INDEX(0x1c0).
Note that we need to also add the related l4_secure clock entries.
I've only added RNG, the others can be added as they get tested.
They are probably very similar to what we already have for dra7
in dra7_l4sec_clkctrl_regs[].
With the clock tagged CLKF_SOC_NONSEC, clock is set disabled for secure
devices and clk_get() will fail. Additionally we disable the RNG target
module on droid4 to avoid introducing new boot time warnings.
Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The secure clocks on omap5 are similar to what we already have for dra7
with dra7_l4sec_clkctrl_regs and documented in the omap5432 TRM in
"Table 3-1044. CORE_CM_CORE Registers Mapping Summary".
The secure clocks are part of the l4per clock manager. As the l4per
clock manager has now two clock domains as children, let's also update
the l4per clockdomain node name to follow the "clock" node naming with
a domain specific compatible property.
Compared to omap4, omap5 has more clocks working in hardare autogating
mode.
Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The secure clocks on omap4 are similar to what we already have for dra7
in dra7_l4sec_clkctrl_regs and documented in the omap4460 TRM "Table
3-1346 L4PER_CM2 Registers Mapping Summary".
The secure clocks are part of the l4_per clock manager. As the l4_per
clock manager has now two clock domains as children, let's also update
the l4_per clockdomain node name to follow the "clock" node naming with
a domain specific compatible property.
Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Set d0 and d1 pin directions for spi0 and spi1 as per their pinmux.
Signed-off-by: Raag Jadav <raagjadav@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
omap_secure_init() is now called from all OMAP2+ platforms during their
init_early() call. This function is in omap-secure.o so include that
in the build for these platforms.
Fixes: db711893ea ("ARM: OMAP2+: Add omap_secure_init callback hook for secure initialization")
Reported-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Tested-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Our MMIO handling is a bit odd, in the sense that it uses an
intermediate per-vcpu structure to store the various decoded
information that describe the access.
But the same information is readily available in the HSR/ESR_EL2
field, and we actually use this field to populate the structure.
Let's simplify the whole thing by getting rid of the superfluous
structure and save a (tiny) bit of space in the vcpu structure.
[32bit fix courtesy of Olof Johansson <olof@lixom.net>]
Signed-off-by: Marc Zyngier <maz@kernel.org>
1. Switch from legacy to atomic pwm API in rx1950 (s3c24xx),
2. Cleanups of unneeded selects in Kconfig.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAl4ohVcQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD16yhD/sF39YOK3B7jNkTD1AYn7NndWELZjNpQbs+
ncSShCJFSNlGavGJFZz6Nv4lJXWBYk8Rf1NXfEs+q3bnkng4X2o41iy6zFJKKDIY
Hak2XYe/1VMWTS2RsGgd9ucR5lSOhxQtJ4eZw/RrPuWUu2i4jfjLVaLOXfHKK1sd
MF0fhuwySCv+8exRWO572qhXZI14G6rUC0MQoCEU9YTJ5Yt9dxnhk9seCQCcTytI
DnGiakIky3zmBUW97KCtUgYxNP9dlcGioqDeHi5M2OzKfsI2psdiUmpCGfCcZgfE
BgArUJNe/TEKgz/BER1mHIgFjIqV7g3w6grEzWxoaL/u8k1eJYD12+o2VRL/qTx6
YYr1sXMPI2wVa/MAODXLpsU2B/lEur5rW97BgQt+rPWB/sxO1N5PArNEFN2BIXbK
qVlFyy2DKYqiRuOsn4Y4qy0h+ACcbPgZrdKbSVfGMoIDtBfAj2Wi7w3oG4tVOu3A
yHhITLAheF1NU32h+GaGG8kKOOS3v0PqarwTDRuZ95d0bEM3uVC8AbvaDCHYiDPO
E1Q1GVFd77udfNb3rFKm5MDop+aRlxhGHvR1xTiIPitU8999ii+ztlWgcxr3B3Sc
TxfQwztCj5pmSXP8Rm+FcWHMlUeNRXvXYhOv1KFarfQ0ZiBJlDQdMBFDPimMY4lw
NPgdEH0ANQ==
=iP3T
-----END PGP SIGNATURE-----
Merge tag 'samsung-soc-5.6-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/soc
Samsung mach/soc changes for v5.6, part 2
1. Switch from legacy to atomic pwm API in rx1950 (s3c24xx),
2. Cleanups of unneeded selects in Kconfig.
* tag 'samsung-soc-5.6-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: s3c64xx: Drop unneeded select of TIMER_OF
ARM: exynos: Drop unneeded select of MIGHT_HAVE_CACHE_L2X0
ARM: s3c24xx: Switch to atomic pwm API in rx1950
Link: https://lore.kernel.org/r/20200122172649.3143-1-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
Updates to the Generic Timer architecture allow ID_PFR1.GenTimer to
have values other than 0 or 1 while still preserving backward
compatibility. At the moment, Linux is quite strict in the way it
handles this field at early boot and will not configure arch timer if
it doesn't find the value 1.
Since here use ubfx for arch timer version extraction (hyb-stub build
with -march=armv7-a, so it is safe)
To help backports (even though the code was correct at the time of writing)
Fixes: 8ec58be9f3 ("ARM: virt: arch_timers: enable access to physical timers")
Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
GICv4.1 defines a new VPE table that is potentially shared between
both the ITSs and the redistributors, following complicated affinity
rules.
To make things more confusing, the programming of this table at
the redistributor level is reusing the GICv4.0 GICR_VPROPBASER register
for something completely different.
The code flow is somewhat complexified by the need to respect the
affinities required by the HW, meaning that tables can either be
inherited from a previously discovered ITS or redistributor.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Zenghui Yu <yuzenghui@huawei.com>
Link: https://lore.kernel.org/r/20191224111055.11836-6-maz@kernel.org
When the ARM accelerated ChaCha driver is built as part of a configuration
that has kernel mode NEON disabled, we expect the compiler to propagate
the build time constant expression IS_ENABLED(CONFIG_KERNEL_MODE_NEON) in
a way that eliminates all the cross-object references to the actual NEON
routines, which allows the chacha-neon-core.o object to be omitted from
the build entirely.
Unfortunately, this fails to work as expected in some cases, and we may
end up with a build error such as
chacha-glue.c:(.text+0xc0): undefined reference to `chacha_4block_xor_neon'
caused by the fact that chacha_doneon() has not been eliminated from the
object code, even though it will never be called in practice.
Let's fix this by adding some IS_ENABLED(CONFIG_KERNEL_MODE_NEON) tests
that are not strictly needed from a logical point of view, but should
help the compiler infer that the NEON code paths are unreachable in
those cases.
Fixes: b36d8c09e7 ("crypto: arm/chacha - remove dependency on generic ...")
Reported-by: Russell King <linux@armlinux.org.uk>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Support for Samsung S3C64XX systems depends on ARCH_MULTI_V6, and thus
on ARCH_MULTIPLATFORM.
As the latter selects TIMER_OF, there is no need for MACH_S3C64XX_DT to
select TIMER_OF.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Support for Samsung Exynos SoCs depends on ARCH_MULTI_V7, which selects
ARCH_MULTI_V6_V7.
As the latter selects MIGHT_HAVE_CACHE_L2X0, there is no need for
ARCH_EXYNOS4 to select MIGHT_HAVE_CACHE_L2X0.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Stop using the legacy PWM API which only still exists because there are
some users left.
Note this change make use of the fact that the value of struct
pwm_state::duty_cycle doesn't matter for a disabled PWM and so its value
can stay constant simplifying the code a bit.
A side effect of the conversion is that the pwm isn't stopped in
rx1950_backlight_init() by the call to pwm_apply_args() just before
reenabling it when rx1950_lcd_power(1) is called.
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
1. Bring back explicitly wanted options which were removed through
`make savedefconfig`. savedefconfig removes options selected by
other symbol, however developers of this other symbol can remove
anytime 'select' statement.
2. Enable NFS v4.1 and v4.2, useful in testing/CI systems.
3. Enable thermal throttling through devfreq framework.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAl4l5+AQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD16FrEACQzSD76RPfzB5VuVVFlwlnDsan/lhKvCG5
jBHVTX5O2eTT+rS5Xo5JjTBIAlkh09hkowbvV57puoXqbVb+b3Mf8xwKrsS+J7Lz
hTQZB/tIhMmpWluLJUpK1+IkqaaozdcctqdQm/L6lu5iRzILSrsdf7Pic1zgdQ5V
0dGeEw7H5wp5Yy0OrjSCo+mE4FaxR7MNFe41AJIwe3neGSLsF1R/Kc6w5L3YkOAu
aX/g+odWpS64AWlCkdomSSs2Qoj4dd/EXIeuAck/e4hnpDSBfHHTQ2KvxqHfkG5x
G2aquZ1n2QSg4zyXN4K0gu0GfVkI/nvoS7tHblQVh+9e3lGSKJA9iJ948tWMyR4k
Ovwt5qkevR5poQlMfcivhfn/4rJFrXm8VUugywyDGdJEvUDFz355hoyoEIrVSq96
UdxHyIWKO9HiNnvlsEZrr1B1Gf9J+++oFT/lR60JzCNvFJcuEw8j51jLV1N3WKAo
ndQZfB2VOUSL0iBs4L7+7J/TuwDgRYohgJ5TvyXQJjcryBpJAVoJgKaCqLJMnrPm
5eet8vjEciHg6XiM9nMEWskhQfD2+K63gukRsPuAze47xYisd3vmHtns1LQ7A2zH
W4b1fmSQY5XzxfH79uIVcSdH2kL/DtqcSCR09czhkZTLbHtq/h59uSrv/El3shTu
4KAMvyjmnQ==
=d+tH
-----END PGP SIGNATURE-----
Merge tag 'samsung-defconfig-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/defconfig
Samsung defconfig changes for v5.6
1. Bring back explicitly wanted options which were removed through
`make savedefconfig`. savedefconfig removes options selected by
other symbol, however developers of this other symbol can remove
anytime 'select' statement.
2. Enable NFS v4.1 and v4.2, useful in testing/CI systems.
3. Enable thermal throttling through devfreq framework.
* tag 'samsung-defconfig-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: multi_v7_defconfig: Enable devfreq thermal integration
ARM: exynos_defconfig: Enable devfreq thermal integration
ARM: multi_v7_defconfig: Enable NFS v4.1 and v4.2
ARM: exynos_defconfig: Enable NFS v4.1 and v4.2
ARM: exynos_defconfig: Bring back explicitly wanted options
Link: https://lore.kernel.org/r/20200120180227.9061-1-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch is written to clean up dependency of ARCH_EXYNOS
Not all exynos device have IRQ_COMBINER, especially aarch64 EXYNOS
but it is built for all exynos devices.
Thus add the config for EXYNOS_IRQ_COMBINER
remove direct dependency between ARCH_EXYNOS and exynos-combiner.c
and only selected on the aarch32 devices
Signed-off-by: Hyunki Koo <hyunki00.koo@samsung.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20191224211108.7128-1-hyunki00.koo@gmail.com
This is similar to what we have for omap5 except the gpu_cm address is
different, the mux clocks have one more source option, and there's no
divider clock.
Note that because of the current dts node name dependency for mapping to
clock domain, we must still use "gpu-clkctrl@" naming instead of generic
"clock@" naming for the node. And because of this, it's probably best to
apply the dts node addition together along with the other clock changes.
For accessing the GPU, we also need to configure the interconnect target
module for GPU similar to what we have for omap5, I'll send that change
separately.
Cc: Benoit Parrot <bparrot@ti.com>
Cc: "H. Nikolaus Schaller" <hns@goldelico.com>
Cc: Robert Nelson <robertcnelson@gmail.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Most of the clock related dt-binding header files are located in
dt-bindings/clock folder. It would be good to keep all the similar
header files at a single location.
Suggested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
- Add pit64 and sdhci support for at91_dt
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEycoQi/giopmpPgB12wIijOdRNOUFAl4k6y0ACgkQ2wIijOdR
NOWfPg//WOy4xQxk3nMp6C78uk0KipKqmWfgHuShiapa32xGIks0DUHL57xVaDWp
0DFwQasBzxVBhSuo04isqHTMuw+NalNuYM/8hQkNctYsJnvdHXbGVxbEKCM2GSog
p9dWc3hF7o4kWMbJKY1W5l7OO9l2PIfHmsZ5Fy60tBDF/+QywSMKqY786BPjKv79
PQX0my0UaQs7xjWhMU1hS5nhP4eT+b1v9QXIqC6uGR8YSiAXoqDGYFfwWXxPMRJb
2WwfmcG7l4mSAuao2DhFss4pAMZAnisjdqyOziI09cnQhwY3Hq/E5Jx9oR8dYwuA
8ROPLq+RikNkNLY7R3GrOatZ6CWCMTT4VkYbW+omq5L14y+fGbhsYelYXS8Z68Qf
e70M5bMeNsuU6A3gMWmqn0m58hRmLC8TXGE3/M/16y5eXQ/xKhskwRJhHBKwyifC
AhZ5nSg8Poqe1pAicIH3lZeO9IAJybwbx/r3QQfUC6X8XoF92XN9ojMHM61ie7Bq
z5AsONRsMoi7WbEUo8cttEP7JnVz9VcSIXsYqyjs7nZkpi1ONpxUh8B4BZ1VyoKz
mgl5nlUYZeby3DtLLpdwmw+pCT/ZepiqjT7b1AIj9cfp+LApbYjNbzoixvymfuPb
hOrqd0vv+EguN3TuORCmOn4vC9zv/uPC5kdLmw2aoVtB84PnPIk=
=wXIy
-----END PGP SIGNATURE-----
Merge tag 'at91-5.6-defconfig-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/defconfig
AT91 defconfig for 5.6 #2
- Add pit64 and sdhci support for at91_dt
* tag 'at91-5.6-defconfig-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: configs: at91: enable MMC_SDHCI_OF_AT91 and MICROCHIP_PIT64B
Link: https://lore.kernel.org/r/20200119235223.GA92283@piout.net
Signed-off-by: Olof Johansson <olof@lixom.net>
additional cleanups.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAl4k5L4QHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgUO4B/0a8jV2uwYBAyALJYOdKVr9ywuIm/88N/P+
uDwZ54CKNS6yx3q6W1SV5w7duRLOfsCS4Wxraj/yuaDoxmh6jGmtZKwT6hXsT2sD
6PxVW/7D79dPHOO1v4EVwmDBOwVNCdmau/WrejCpdcUPAaws3fUioyLBYcIsqYyH
27dvpl0CEE4mzZsTLbhW17msbh6vSLK+6QizEm5gniUG+bibdLnI0NbuJ7dHC0Fg
+A6ZTj12PT+/XC3FEIyj5Cc2aNiA25rHNv7qm8mYYxC2DJkm+LvVAV2tok5UvUAf
Ax3Irl3s9G1lvONwi2d9FeWTcyNa0g57yF69jpxGBcFJEEHqVqN8
=zV9V
-----END PGP SIGNATURE-----
Merge tag 'v5.6-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
Removal of the simple-panel compatible and some minor
additional cleanups.
* tag 'v5.6-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: Kill off "simple-panel" compatibles
ARM: dts: rockchip: rename dwmmc node names to mmc
ARM: dts: rockchip: add reg property to brcmf sub node for rk3188-bqedison2qc
Link: https://lore.kernel.org/r/3473489.DgqFdXXe5V@phil
Signed-off-by: Olof Johansson <olof@lixom.net>
Change Rainier device tree to use UCD90320 chip and only bind driver to
port which excepts PMBus commands.
Signed-off-by: Jim Wright <wrightj@linux.vnet.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Rainier can use either version of the IBM CFFPS, so don't set the
version in the devicetree so the driver can detect it automatically.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Confusingly, there are three SPSR layouts that a kernel may need to deal
with:
(1) An AArch64 SPSR_ELx view of an AArch64 pstate
(2) An AArch64 SPSR_ELx view of an AArch32 pstate
(3) An AArch32 SPSR_* view of an AArch32 pstate
When the KVM AArch32 support code deals with SPSR_{EL2,HYP}, it's either
dealing with #2 or #3 consistently. On arm64 the PSR_AA32_* definitions
match the AArch64 SPSR_ELx view, and on arm the PSR_AA32_* definitions
match the AArch32 SPSR_* view.
However, when we inject an exception into an AArch32 guest, we have to
synthesize the AArch32 SPSR_* that the guest will see. Thus, an AArch64
host needs to synthesize layout #3 from layout #2.
This patch adds a new host_spsr_to_spsr32() helper for this, and makes
use of it in the KVM AArch32 support code. For arm64 we need to shuffle
the DIT bit around, and remove the SS bit, while for arm we can use the
value as-is.
I've open-coded the bit manipulation for now to avoid having to rework
the existing PSR_* definitions into PSR64_AA32_* and PSR32_AA32_*
definitions. I hope to perform a more thorough refactoring in future so
that we can handle pstate view manipulation more consistently across the
kernel tree.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20200108134324.46500-4-mark.rutland@arm.com
When KVM injects an exception into a guest, it generates the CPSR value
from scratch, configuring CPSR.{M,A,I,T,E}, and setting all other
bits to zero.
This isn't correct, as the architecture specifies that some CPSR bits
are (conditionally) cleared or set upon an exception, and others are
unchanged from the original context.
This patch adds logic to match the architectural behaviour. To make this
simple to follow/audit/extend, documentation references are provided,
and bits are configured in order of their layout in SPSR_EL2. This
layout can be seen in the diagram on ARM DDI 0487E.a page C5-426.
Note that this code is used by both arm and arm64, and is intended to
fuction with the SPSR_EL2 and SPSR_HYP layouts.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20200108134324.46500-3-mark.rutland@arm.com
On AArch64 you can do a sign-extended load to either a 32-bit or 64-bit
register, and we should only sign extend the register up to the width of
the register as specified in the operation (by using the 32-bit Wn or
64-bit Xn register specifier).
As it turns out, the architecture provides this decoding information in
the SF ("Sixty-Four" -- how cute...) bit.
Let's take advantage of this with the usual 32-bit/64-bit header file
dance and do the right thing on AArch64 hosts.
Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20191212195055.5541-1-christoffer.dall@arm.com
Current dts files with 'dwmmc' nodes are manually verified.
In order to automate this process rockchip-dw-mshc.txt
has to be converted to yaml. In the new setup
rockchip-dw-mshc.yaml will inherit properties from
mmc-controller.yaml and synopsys-dw-mshc-common.yaml.
'dwmmc' will no longer be a valid name for a node,
so change them all to 'mmc'
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200115185244.18149-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
/* Background. */
For a very long time, extending openat(2) with new features has been
incredibly frustrating. This stems from the fact that openat(2) is
possibly the most famous counter-example to the mantra "don't silently
accept garbage from userspace" -- it doesn't check whether unknown flags
are present[1].
This means that (generally) the addition of new flags to openat(2) has
been fraught with backwards-compatibility issues (O_TMPFILE has to be
defined as __O_TMPFILE|O_DIRECTORY|[O_RDWR or O_WRONLY] to ensure old
kernels gave errors, since it's insecure to silently ignore the
flag[2]). All new security-related flags therefore have a tough road to
being added to openat(2).
Userspace also has a hard time figuring out whether a particular flag is
supported on a particular kernel. While it is now possible with
contemporary kernels (thanks to [3]), older kernels will expose unknown
flag bits through fcntl(F_GETFL). Giving a clear -EINVAL during
openat(2) time matches modern syscall designs and is far more
fool-proof.
In addition, the newly-added path resolution restriction LOOKUP flags
(which we would like to expose to user-space) don't feel related to the
pre-existing O_* flag set -- they affect all components of path lookup.
We'd therefore like to add a new flag argument.
Adding a new syscall allows us to finally fix the flag-ignoring problem,
and we can make it extensible enough so that we will hopefully never
need an openat3(2).
/* Syscall Prototype. */
/*
* open_how is an extensible structure (similar in interface to
* clone3(2) or sched_setattr(2)). The size parameter must be set to
* sizeof(struct open_how), to allow for future extensions. All future
* extensions will be appended to open_how, with their zero value
* acting as a no-op default.
*/
struct open_how { /* ... */ };
int openat2(int dfd, const char *pathname,
struct open_how *how, size_t size);
/* Description. */
The initial version of 'struct open_how' contains the following fields:
flags
Used to specify openat(2)-style flags. However, any unknown flag
bits or otherwise incorrect flag combinations (like O_PATH|O_RDWR)
will result in -EINVAL. In addition, this field is 64-bits wide to
allow for more O_ flags than currently permitted with openat(2).
mode
The file mode for O_CREAT or O_TMPFILE.
Must be set to zero if flags does not contain O_CREAT or O_TMPFILE.
resolve
Restrict path resolution (in contrast to O_* flags they affect all
path components). The current set of flags are as follows (at the
moment, all of the RESOLVE_ flags are implemented as just passing
the corresponding LOOKUP_ flag).
RESOLVE_NO_XDEV => LOOKUP_NO_XDEV
RESOLVE_NO_SYMLINKS => LOOKUP_NO_SYMLINKS
RESOLVE_NO_MAGICLINKS => LOOKUP_NO_MAGICLINKS
RESOLVE_BENEATH => LOOKUP_BENEATH
RESOLVE_IN_ROOT => LOOKUP_IN_ROOT
open_how does not contain an embedded size field, because it is of
little benefit (userspace can figure out the kernel open_how size at
runtime fairly easily without it). It also only contains u64s (even
though ->mode arguably should be a u16) to avoid having padding fields
which are never used in the future.
Note that as a result of the new how->flags handling, O_PATH|O_TMPFILE
is no longer permitted for openat(2). As far as I can tell, this has
always been a bug and appears to not be used by userspace (and I've not
seen any problems on my machines by disallowing it). If it turns out
this breaks something, we can special-case it and only permit it for
openat(2) but not openat2(2).
After input from Florian Weimer, the new open_how and flag definitions
are inside a separate header from uapi/linux/fcntl.h, to avoid problems
that glibc has with importing that header.
/* Testing. */
In a follow-up patch there are over 200 selftests which ensure that this
syscall has the correct semantics and will correctly handle several
attack scenarios.
In addition, I've written a userspace library[4] which provides
convenient wrappers around openat2(RESOLVE_IN_ROOT) (this is necessary
because no other syscalls support RESOLVE_IN_ROOT, and thus lots of care
must be taken when using RESOLVE_IN_ROOT'd file descriptors with other
syscalls). During the development of this patch, I've run numerous
verification tests using libpathrs (showing that the API is reasonably
usable by userspace).
/* Future Work. */
Additional RESOLVE_ flags have been suggested during the review period.
These can be easily implemented separately (such as blocking auto-mount
during resolution).
Furthermore, there are some other proposed changes to the openat(2)
interface (the most obvious example is magic-link hardening[5]) which
would be a good opportunity to add a way for userspace to restrict how
O_PATH file descriptors can be re-opened.
Another possible avenue of future work would be some kind of
CHECK_FIELDS[6] flag which causes the kernel to indicate to userspace
which openat2(2) flags and fields are supported by the current kernel
(to avoid userspace having to go through several guesses to figure it
out).
[1]: https://lwn.net/Articles/588444/
[2]: https://lore.kernel.org/lkml/CA+55aFyyxJL1LyXZeBsf2ypriraj5ut1XkNDsunRBqgVjZU_6Q@mail.gmail.com
[3]: commit 629e014bb8 ("fs: completely ignore unknown open flags")
[4]: https://sourceware.org/bugzilla/show_bug.cgi?id=17523
[5]: https://lore.kernel.org/lkml/20190930183316.10190-2-cyphar@cyphar.com/
[6]: https://youtu.be/ggD-eb3yPVs
Suggested-by: Christian Brauner <christian.brauner@ubuntu.com>
Signed-off-by: Aleksa Sarai <cyphar@cyphar.com>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
please pull the following:
- Nicolas unifies the CMA reserved region declaration between all
BCM283x/BCM2711 chips in order for firmwares to easily adjust those
based on the use case needs
- Nicolas adds the Broadcom STB PCIe Root Complex Device Tree node for
the Raspberry Pi 4. The driver will go through the PCIe maintainers
pull request for 5.6.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAl4gnQgACgkQh9CWnEQH
BwRNsBAA5aAbZHLwNJCuOgroaPkODPY3dfoOtxmJVz9SNR/XD6uj2+QLsrjkDO3+
3YcDKk9fysHTlukdPx1p4GXE7m1K/YaCpBYcd3cp5r1oMsana6SaYZF6gcolz+Lm
5PzJhg2t7EHMS/Jp8E2nk0LLxXyOhdsBqKiyhdQctZEJdmGdnJikJ/fI/0qXv3I+
u8oq0tyWO2DR0i1E8lWlQvbhRpZ67JdVOANvoVN3KqjO6FTuNSqMn9fipbTotl7E
AE3FoDxXK5qSX7JlOV8nYK+9WKpcJZCsWbHd0hxQpGgLnP1oDPHOolXHrBtVHWtU
IM39bjMFQYwk4Egf9i9jepuShkrj5teZ1VkGWpteD1hvIzS0gTZuwB4OaJ6zv+WE
Bh2PfvKe0Pe9KpvHD/9OHSXCd1i10y26sj7ykTINDongYvcxbxrDnXIuZ6Qf7m3p
JLr0RQOjLv16lhsBCLhAEbFWKExFK2angk+No8BEd6oMaqQZQocWCYVdl6hCZAGP
9n599ogupI0EGwRjQZ8pkHduga9455JvQz91oUQuD72qL8npR3I10qJmIo2IXfL6
i6bRwHU0tOOyF5+vCWTJklY3BuY3uYdQZM8IOvMPx+9jx0WLITeXuUcWPPTXbdSq
RPyOxkamI9bmMfiZ65ckdFJcU/u4JN2fPNXh2yzrCFJT6Mvu9j4=
=SslP
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-5.6/devicetree-part2' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM-based SoC changes for 5.6,
please pull the following:
- Nicolas unifies the CMA reserved region declaration between all
BCM283x/BCM2711 chips in order for firmwares to easily adjust those
based on the use case needs
- Nicolas adds the Broadcom STB PCIe Root Complex Device Tree node for
the Raspberry Pi 4. The driver will go through the PCIe maintainers
pull request for 5.6.
* tag 'arm-soc/for-5.6/devicetree-part2' of https://github.com/Broadcom/stblinux:
ARM: dts: bcm2711: Enable PCIe controller
ARM: dts: bcm283x: Unify CMA configuration
Link: https://lore.kernel.org/r/20200117222705.25391-2-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
Panfrost driver provides a devfreq driver for the Mali GPU and allows to
scale GPU core frequency. Enable support for devfreq thermal integration
to enable cooling of GPU thermal zone by reducing GPU core frequency.
This fixes following warning during boot on Exynos5422-based Odroid XU4:
panfrost 11800000.gpu: [drm:panfrost_devfreq_init] Failed to register cooling device
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Panfrost driver provides a devfreq driver for the Mali GPU and allows to
scale GPU core frequency. Enable support for devfreq thermal integration
to enable cooling of GPU thermal zone by reducing GPU core frequency.
This fixes following warning during boot on Exynos5422-based Odroid XU4:
panfrost 11800000.gpu: [drm:panfrost_devfreq_init] Failed to register cooling device
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
NFS is widely used in debugging and Continuous Integration systems, so
enable the newest versions of protocol: v4.1 and v4.2.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
NFS is widely used in debugging and Continuous Integration systems, so
enable the newest versions of protocol: v4.1 and v4.2.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The Denali NAND controller IP has separate reset control for the
controller core and registers.
Add the reset-names, and one more phandle accordingly. This is the
approved DT-binding.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The function name suggests that this is a boolean checking whether the
architecture asks for an update of the VDSO data, but it works the other
way round. To spare further confusion invert the logic.
Fixes: 44f57d788e ("timekeeping: Provide a generic update_vsyscall() implementation")
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20200114185946.656652824@linutronix.de
I've been sitting on these longer than I meant, so the patch count is
a bit higher than ideal for this part of the release. There's also some
reverts of double-applied patches that brings the diffstat up a bit.
With that said, the biggest changes are:
- Revert of duplicate i2c device addition on two Aspeed (BMC) Devicetrees.
- Move of two device nodes that got applied to the wrong part of the
tree on ASpeed G6.
- Regulator fix for Beaglebone X15 (adding 12/5V supplies)
- Use interrupts for keys on Amlogic SM1 to avoid missed polls
In addition to that, there is a collection of smaller DT fixes:
- Power supply assignment fixes for i.MX6
- Fix of interrupt line for magnetometer on i.MX8 Librem5 devkit
- Build fixlets (selects) for davinci/omap2+
- More interrupt number fixes for Stratix10, Amlogic SM1, etc.
- ... and more similar fixes across different platforms
And some non-DT stuff:
- optee fix to register multiple shared pages properly
- Clock calculation fixes for MMP3
- Clock fixes for OMAP as well
-----BEGIN PGP SIGNATURE-----
iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAl4hIooPHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3vckP/jT/yrodXuK3OLtBnDQI4Em5b14uJQxEAsh+
fTaz1H3n82PaWJVaEXpRTYMa4WZnmMPazoAoDhuqWnz/VbzfXmufFIIXsQ0rJqbf
Ht1LWvx7hd5q49aq2x1o9Nuo5OKMbW8igQqsx7PqjSOQRaAZTkxZhOI1C9pKnnnD
oJU8nw19N8yCQILxXMmpBX2vczWyJ3tgH6v8rhB89riBXouqwcKbTRyI0ciFdO91
mPlfF9qwqZ99bb+7WqalrtOr+/0VgvhB3oCNzoWYPptipiaLGdH4ZXVEhyCUDmrY
WN1kZsBtK+jtDLcMdRqg+EmbijxcxA0DSLDCow1QwuMPNHxVN5du1JN7b4uTvCPX
sHbrDO/YdiSWx20VZID/x/sWqcQyBrDqZkA3NWhoClm75JGQUHP16pZUURCN/awy
IGApkQ5164Ac+2DFHgh3S7qKXWk7O+hY6iksyRPPZkj31d4mCimdVaHDV/c3aeI/
EnUI6nj6H3ghYTX2gl3yhT8d4yCM+2uSawdIFWGNvB85vs1koAUEuczc6Me8JdZV
4HWexVs8W0Jo1w3Ndq3Hxw0RTKccC34x1f4dnzSSSEF7t4GMveTdecd/D77aiT2x
eVNox3PIAfjR96et2vQ1C+hVRyEqn/hDapvR5OI/78F2ampee8m8tWQDYIlH/RbZ
pdBTN5CS
=MMJu
-----END PGP SIGNATURE-----
Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC fixes from Olof Johansson:
"I've been sitting on these longer than I meant, so the patch count is
a bit higher than ideal for this part of the release. There's also
some reverts of double-applied patches that brings the diffstat up a
bit.
With that said, the biggest changes are:
- Revert of duplicate i2c device addition on two Aspeed (BMC)
Devicetrees.
- Move of two device nodes that got applied to the wrong part of the
tree on ASpeed G6.
- Regulator fix for Beaglebone X15 (adding 12/5V supplies)
- Use interrupts for keys on Amlogic SM1 to avoid missed polls
In addition to that, there is a collection of smaller DT fixes:
- Power supply assignment fixes for i.MX6
- Fix of interrupt line for magnetometer on i.MX8 Librem5 devkit
- Build fixlets (selects) for davinci/omap2+
- More interrupt number fixes for Stratix10, Amlogic SM1, etc.
- ... and more similar fixes across different platforms
And some non-DT stuff:
- optee fix to register multiple shared pages properly
- Clock calculation fixes for MMP3
- Clock fixes for OMAP as well"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (42 commits)
MAINTAINERS: Add myself as the co-maintainer for Actions Semi platforms
ARM: dts: imx7: Fix Toradex Colibri iMX7S 256MB NAND flash support
ARM: dts: imx6sll-evk: Remove incorrect power supply assignment
ARM: dts: imx6sl-evk: Remove incorrect power supply assignment
ARM: dts: imx6sx-sdb: Remove incorrect power supply assignment
ARM: dts: imx6qdl-sabresd: Remove incorrect power supply assignment
ARM: dts: imx6q-icore-mipi: Use 1.5 version of i.Core MX6DL
ARM: omap2plus: select RESET_CONTROLLER
ARM: davinci: select CONFIG_RESET_CONTROLLER
ARM: dts: aspeed: rainier: Fix fan fault and presence
ARM: dts: aspeed: rainier: Remove duplicate i2c busses
ARM: dts: aspeed: tacoma: Remove duplicate flash nodes
ARM: dts: aspeed: tacoma: Remove duplicate i2c busses
ARM: dts: aspeed: tacoma: Fix fsi master node
ARM: dts: aspeed-g6: Fix FSI master location
ARM: dts: mmp3: Fix the TWSI ranges
clk: mmp2: Fix the order of timer mux parents
ARM: mmp: do not divide the clock rate
arm64: dts: rockchip: Fix IR on Beelink A1
optee: Fix multi page dynamic shm pool alloc
...
Add basic support for first generation Amazon omap3-echo. This got
applied rather late as we discussed how to deal with SoC variants
with some accelerators unaccessible, and eventually ended up setting
up few more SoC specific dtsi files. Eventually we'll need to also
detect the disabled accelerators on driver init, but more patching
is needed for that.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAl4gr04RHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXP67BAA4uYWavct/UCnZ4Equ4sYREf3V81N3RVL
mn5ZKMiO344MJuZQlxqrINwpy1LTu78mhJGTjlIGIKMevwVpX0SO+hIqOAtfMHi3
Wd3QUSTjxXL9BEB41Uenr2V8KAm6N25wfkGnGSMT0WMyBqrQJxq8+P4ybTE0v0Gi
XR0+jI3uMMdaQFhZrRTzfKDUPN8dAuFdcvWXcsN5yQ59W+yqsvwL4DE/4S/ymCaH
L121A8tyqSh+SGH1qG3txMzD4pxulQrAFBNnHDM0jAR4axFQAd/dS7StAS3+rCpn
5VZisLy/HAnbj6tIo2FrM8tX7d2+8NDAx/vbc46euCLLioXQaoiGS4yoB7Q4aFIV
OH1WlK3Q9+2fGnmvr4acmfIZRSm6x/jkH6yQuwvLA0HzRb9IwYNqlTR1dNb8565G
v2c8yKThSeVMOWbam24DtAixSQHfC+94lFTNGXzLywMAdIjC0aKEJQs6tztvwERu
g+5IT3wu9QFUv+1/pLp1cl0HJ6239JezmGdswdAEH400wZPfOJNWRZDL3MtqZaB7
sZYgP/+Tm2Lw1gXha8foM29PPc6hk1k0MaGSqZLTVObqwkc2VrtdSuEXa6ov3H3V
JmElGuWiuaoj/mWCIq5XY/NgoIQxAC4cIpIQheAtTQZ2vbQ7OuiUYJmPBinzDoMQ
RfCcN/PlBx0=
=mu+m
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.6/dt-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
More dts changes for omaps for v5.6 merge window
Add basic support for first generation Amazon omap3-echo. This got
applied rather late as we discussed how to deal with SoC variants
with some accelerators unaccessible, and eventually ended up setting
up few more SoC specific dtsi files. Eventually we'll need to also
detect the disabled accelerators on driver init, but more patching
is needed for that.
* tag 'omap-for-v5.6/dt-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Add omap3-echo
ARM: dts: Add dtsi files for AM3703, AM3715 and DM3725
Link: https://lore.kernel.org/r/pull-1579200367-372444@atomide.com-4
Signed-off-by: Olof Johansson <olof@lixom.net>
A series of changes to use optee SMC calls if optee is initialized by
the bootloader. Based on the discussions on LAKML in mailing list thread
"arm_smccc_smc as generic smc interface?" we don't want to add more quirk
handling to arm_smccc_smc() and want to handle it locally instead.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAl4grWMRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXMbBBAA3BlpJ2g8MUTIqn8tPQXF24JfWo8mkESW
454c43lV7wWOv4QZZY8fWD6V4dupVFnCMCIEr91HHSVnNBAMdLl+t4rdZgkdVS0t
QvA5xKbRX8U3B4ohI7qqsYSKgHUz+W/oqwxt8j8xnn93KELan07V8JV2OxBjXiGp
msUc3qFwwKgLDiZcVHfAsRUYFYfZ0TtrVf2Dn/EsZNsa5KWM+Dx1nckTRpsXn9v4
9PzG2peeKkFizE6nGLHFZj5n+rNjiVGzZ2NIlFkAkqm+BuBBaTaKcSbUzkB6Rf0a
nWLlrvbAuwgLOHyYKZfx8vmv3hvT3Qvfz3LZYpVLlLZuA2eYpcJ0CLKAO85Lz1xg
zaSqcJhkfLUxYYDngfGP2y3yl/BrhJj10MYT+daXCiSDS+uGZmON+7maXAB1rOTK
zNJwY6YbjNu9KDLkvHwOPUeuQgATT4bZ2wPNrFAZisIDEjTzSKIqGrQj5h8IeOSx
quD5YTk8Cc4E/QgSJUmqqgIkHlVNrc71hxIO7dZ+cZVviQS6PUfjAMGdkZ20UfFO
mRBpmUp6ATTv9Q4TuQ3rnFlN0MfL+eSOtDdP5homNyyemseAVy3YxMrc68Wur3jP
Mmcl5KZQweDy+NC4mQi/YqpHFOWMYra6o2cNsrcY73ZbVp/0bqDWw2klUWM0JyM5
wjt8aly0yBQ=
=XJDD
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.6/soc-smc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc
SMC related changes for omaps for v5.6 merge window
A series of changes to use optee SMC calls if optee is initialized by
the bootloader. Based on the discussions on LAKML in mailing list thread
"arm_smccc_smc as generic smc interface?" we don't want to add more quirk
handling to arm_smccc_smc() and want to handle it locally instead.
* tag 'omap-for-v5.6/soc-smc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: sleep43xx: Call secure suspend/resume handlers
ARM: OMAP2+: Use ARM SMC Calling Convention when OP-TEE is available
ARM: OMAP2+: Introduce check for OP-TEE in omap_secure_init()
ARM: OMAP2+: Add omap_secure_init callback hook for secure initialization
Link: https://lore.kernel.org/r/pull-1579200367-372444@atomide.com-2
Signed-off-by: Olof Johansson <olof@lixom.net>
- add DDR clock controller
- GPU OPP updates
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAl4XcxQACgkQWTcYmtP7
xmVjBhAAqL8rNKURAhAs7TkdgXxv3DGA1BlcMi0Sb/iuwlNBu5AbptO31FY7Jqb1
ZZ/GFRUljj1BHapjzekdMJUpqwQdPOtDKSrlhc65BkkAcgzXkzTlvvNiS/8/hMEC
RNrmT+O/YgOys/FpSc2wPdzg6WAgql9vhG0pAlI7gth3tPZxQosLTlzNDJ3yW9+K
qhPx5ivF1Q3w6TPnM0Q4eZj4MHnUSeQUDc6aA1b02V1ojt6pqeBkzVFzXyxdxWNs
yp3E8tLmNhQ6p2B3kCPTDt2H4jH1wEei1CrsnZFB4WMu80EoWnNi+VjsoBajmlR2
lufMkX623K47NlZiZ7/XQZ0ki5/09TqDJ4W53mPrpebJ7Cmw8sdSz/tMZ7cOveh0
FRa4VCSTiq4BxfdFks4vXPLDX40ucTXHA26jc1Hrrbb7n6uC93i87I5At7U03SY7
r4Lddd/1Rh6du7hLmxAEM5Ul9M5m82GYFYXgNKngsJHUxz/V1/Ym+rSzBFM/csBj
U2maAFYvvR8B3WBQfpONIYgUo5gJ8YgxglmboivZM226VgalPzsMtEm467xvROKn
xT7knR/pHu9wWL6OxCZGXsEQfjJM3FKn6Z1Fe2VolJpaouULdqBxWfRtnSMUwmgG
E/WqojV/8AOZSSqj6/ixQBr2Soaaim/Q2LmM81lBjcJ+bTCtSlA=
=CTqX
-----END PGP SIGNATURE-----
Merge tag 'amlogic-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt
ARM: dts: Amlogic updates for v5.6
- add DDR clock controller
- GPU OPP updates
* tag 'amlogic-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson8b: use the actual frequency for the GPU's 364MHz OPP
ARM: dts: meson8: use the actual frequency for the GPU's 182.1MHz OPP
ARM: dts: meson8b: fix the clock controller compatible string
ARM: dts: meson8b: add the DDR clock controller
ARM: dts: meson8: add the DDR clock controller
ARM: dts: meson: provide the XTAL clock using a fixed-clock
dt-bindings: clock: meson8b: add the clock inputs
dt-bindings: clock: add the Amlogic Meson8 DDR clock controller binding
Link: https://lore.kernel.org/r/7hwo9udi7m.fsf@baylibre.com
Signed-off-by: Olof Johansson <olof@lixom.net>
It's fairly big this time, but the highlights are:
- Enable cpufreq and CPU thermal throttling on the A64
- CLK_CPUX macro usage removed (changed from first pull request)
- CSI0 support on the R40
- CSI1 support on the A10 and A20
- SPI support on the R40
- PMU support on the H3, H5, H6 and R40
- MIPI-DSI support on the A64
- PWM support on the H6
- Thermal sensor on the A64, A83t, H3, H5, H6 and R40
- More DT schemas fixes and conversions
- New boards: LibreComputer ALL-H5-CC H5, LibreComputer ALL-H3-IT H5,
Pine64 H64 Model B, Neutis N5H3
-----BEGIN PGP SIGNATURE-----
iQJCBAABCgAsFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAl4cOHUOHHdlbnNAY3Np
ZS5vcmcACgkQOJpUIZwPJDDMaw/8CYesTIYwsaPQpW6GnAe8lsB8qtOdIj2xhlzp
Qf3INpkH9lBl718lkwsOnVuQP8pJ75gp5J9yFNVuhSXTpWjpEJyKdiTa1e7TiZMj
LS7pKerFy7anZuL2bpgPAFHVyfokvnn8OGEc5tfHX0XJ8hQC+FnkzXpsxz7vYdP2
oxokLZNY/AeuTyPUG5/6KMkH2UJMlK9YRN7p/jPEKFXGlFy4bY9HKaIr3SxMMC7B
NwxYfFPdFVqODnHfWQq9TjXhPVXzHDg1B2bJT6yC1hjpNmDmqDZ6U8mj8v8aZy/u
x8WdUZbFALJeqL3J2ejsWbGsgwG3eMLOZVFIw9JEPgmqWE00pVnndu70P8hI3ZL0
7clq33b+EDjAf5B5oXUJPLdaW6DonWXHrBMbC1PaHwrPVZV+qZtoquAVwTR/WDk6
hnahfOGPB52y/OmxbrognU1dJwpHtVqgjvYjLMhXQoa4WaAS+fN7OBEDiYqC03Ty
Rsxd8iNaVnDVBovWbcnSpE9qG6i7hi9iZlt5LJJGalNxrs9RQ6ncDheyQtHS0TIl
BkwNkPMLy14mbLfiU3CvyDNZVgBIBaltsCVD0N6b5vZraizga4F4rS3FvoMR0JAJ
1bYXR7S53ga53k9t/VyVAEhoJt+5Bzy9WBbjLlL3IgT08K4N7dN/Y0cKKHt8Q7zx
QphJaBs=
=1h4A
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-5.6-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
This is our usual set of DT patches for the Allwinner SoCs.
It's fairly big this time, but the highlights are:
- Enable cpufreq and CPU thermal throttling on the A64
- CLK_CPUX macro usage removed (changed from first pull request)
- CSI0 support on the R40
- CSI1 support on the A10 and A20
- SPI support on the R40
- PMU support on the H3, H5, H6 and R40
- MIPI-DSI support on the A64
- PWM support on the H6
- Thermal sensor on the A64, A83t, H3, H5, H6 and R40
- More DT schemas fixes and conversions
- New boards: LibreComputer ALL-H5-CC H5, LibreComputer ALL-H3-IT H5,
Pine64 H64 Model B, Neutis N5H3
* tag 'sunxi-dt-for-5.6-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (52 commits)
arm64: dts: allwinner: a64: enable DVFS
arm64: dts: allwinner: a64: add dtsi with CPU operating points
arm64: dts: allwinner: a64: add cooling maps and thermal tripping points
arm64: dts: allwinner: a64: add CPU clock to CPU0-3 nodes
arm64: dts: allwinner: sun50i-a64: Use macros for newly exported clocks
ARM: dts: sunxi: Use macros for references to CCU clocks
arm64: dts: allwinner: h5: Add Libre Computer ALL-H5-CC H5 board
ARM: dts: sun8i: R40: Add SPI controllers nodes and pinmuxes
arm64: dts: allwinner: a64: pinebook: Fix lid wakeup
ARM: dts: sun8i: r40: Add device node for CSI0
ARM: dts: sun7i: Add CSI1 controller and pinmux options
ARM: dts: sun4i: Add CSI1 controller and pinmux options
ARM: dts: sunxi: Add missing LVDS resets and clocks
ARM: dts: sun8i: r40: Use tcon top clock index macros
ARM: dts: sun8i: R40: Add PMU node
ARM: dts: sun8i: R40: Upgrade GICC reg size to 8K
arm64: dts: allwinner: h6: Add thermal sensor and thermal zones
ARM: dts: sunxi: Add Libre Computer ALL-H3-IT H5 board
arm64: dts: allwinner: a64: Add MIPI DSI pipeline
arm64: dts: allwinner: a64: Add thermal sensors and thermal zones
...
Link: https://lore.kernel.org/r/20200113095555.GA29848@wens.csie.org
Signed-off-by: Olof Johansson <olof@lixom.net>
- Enable i.MX8MP clock driver in arm64 defconfig.
- Enable Crypto CAAM driver support as module in arm64 defconfig.
- Enable ILI210X touch driver, USB CDC ACM function, NFS_V4 support and
TFP410 DVI bridge driver support in arm32 imx_v6_v7_defconfig.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAl4b4oUUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM7iqQgAm/j9aO61exErck4aI9+krqrLnF3w
eWgrrovPEwSARQo69bTAGK5GYjaZ4yGlDiH3Qk6TS5pvcRsEjaxsu/Ym/KVDtOBM
iiLD9MbI7w8Nd5pe4jBkCHF6ZOEWbMvzwc8zStM/RwTVvwajdkW/p1If4RQGEqmM
ZcMgXLcQneqWAbCsFDziAwsf6kfOhOghW3CNQ63GuGZc4UFRv8j056mBlG8PDeLL
4UbT+rI1xwwatNg9a2/E0HfA3Z4eJg1YbjMTrEx4NDkDel2Sz9GuVxJIY1+/lDKs
DCw4n1Fzfn4nxR8Eak7foQPY27VLgDqa6zM06QYhQXE3wWt2HumxJNQkmQ==
=H+6R
-----END PGP SIGNATURE-----
Merge tag 'imx-defconfig-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/defconfig
i.MX defconfig update for 5.6:
- Enable i.MX8MP clock driver in arm64 defconfig.
- Enable Crypto CAAM driver support as module in arm64 defconfig.
- Enable ILI210X touch driver, USB CDC ACM function, NFS_V4 support and
TFP410 DVI bridge driver support in arm32 imx_v6_v7_defconfig.
* tag 'imx-defconfig-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: defconfig: Enable CONFIG_CLK_IMX8MP by default
arm64: defconfig: Enable CRYPTO_DEV_FSL_CAAM
ARM: imx_v6_v7_defconfig: Select the TFP410 driver
ARM: imx_v6_v7_defconfig: Enable NFS_V4_1 and NFS_V4_2 support
ARM: configs: imx_v6_v7_defconfig: enable USB ACM
ARM: imx_v6_v7_defconfig: Enable TOUCHSCREEN_ILI210X
Link: https://lore.kernel.org/r/20200113034006.17430-6-shawnguo@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
