Commit Graph

20 Commits

Author SHA1 Message Date
Thomas Gleixner
c942fddf87 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157
Based on 3 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version this program is distributed in the
  hope that it will be useful but without any warranty without even
  the implied warranty of merchantability or fitness for a particular
  purpose see the gnu general public license for more details

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version [author] [kishon] [vijay] [abraham]
  [i] [kishon]@[ti] [com] this program is distributed in the hope that
  it will be useful but without any warranty without even the implied
  warranty of merchantability or fitness for a particular purpose see
  the gnu general public license for more details

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version [author] [graeme] [gregory]
  [gg]@[slimlogic] [co] [uk] [author] [kishon] [vijay] [abraham] [i]
  [kishon]@[ti] [com] [based] [on] [twl6030]_[usb] [c] [author] [hema]
  [hk] [hemahk]@[ti] [com] this program is distributed in the hope
  that it will be useful but without any warranty without even the
  implied warranty of merchantability or fitness for a particular
  purpose see the gnu general public license for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 1105 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070033.202006027@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:26:37 -07:00
Thomas Gleixner
ec8f24b7fa treewide: Add SPDX license identifier - Makefile/Kconfig
Add SPDX license identifiers to all Make/Kconfig files which:

 - Have no license information of any form

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

  GPL-2.0-only

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-21 10:50:46 +02:00
Jerome Brunet
57bf684f15 ARM: meson: remove COMMON_CLK_AMLOGIC selection
Selecting COMMON_CLK_AMLOGIC is not required as it is already selected
by the SoC clock controller driver

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-02-06 19:53:02 -08:00
Martin Blumenstingl
e9e863dc1d ARM: meson: select HAVE_ARM_TWD and ARM_GLOBAL_TIMER
The 32-bit Meson SoCs use multiple Cortex-A9 (Meson8 and Meson8m2) or
Cortex-A5 (Meson8b) CPU cores. These come with the "ARM global timer"
and "Timer-Watchdog" (aka TWD, which provides both a per-cpu local timer
and watchdog).

Selecting ARM_GLOBAL_TIMER and HAVE_ARM_TWD allows us to add the timers
to the SoC.dtsi files.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-12-10 12:43:40 -08:00
Martin Blumenstingl
ae0257da57 ARM: meson: merge Kconfig symbol MACH_MESON8B into MACH_MESON8
Currently there are no differences between the MACH_MESON8 and
MACH_MESON8B Kconfig symbols (except the help text). Since both
platforms are very similar (Meson8b being a slightly updated,
cost-reduced version of Meson8 which even shares some peripherals with
Meson8m2) no notable differences are expected in the future either.

Suggested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-05-23 10:08:13 -07:00
Martin Blumenstingl
0633d20fea ARM: meson: add support for the Meson8m2 SoCs
Add the newly introduced compatible string for the Meson8m2 SoC.
The existing Meson8 Kconfig entry is updated to also provide support for
the Meson8m2 SoCs. The Meson8m2 SoC is mostly identical to the Meson8 SoC
with just a few peripherals being updated. Both SoCs currently
share the same pinctrl, clock and GPIO IRQ bindings. Thus the existing
Kconfig entry is re-used to avoid duplication (the only cost is building
a few extra DTBs).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-05-10 17:03:28 -07:00
Arnd Bergmann
c4e8db5f05 Amlogic 32-bit DT changes for v4.16
- meson8: GPIO IRQ support
 - switch to stable UART bindings w/correct clock
 - add more L2 cache settings
 - drop unused ADC clock
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAlovIOwACgkQWTcYmtP7
 xmUVHQ//Q0bGpcgN9XB/2nlpFpPHuaFYphMzwDezLLHuQgbKvf7a8OoiJVYducaE
 P5MLVKNj6iu1xOlrbOy7BbRZ5oq4ZpLv3hmeycWt2e49L07SrSzTfMXNET1c2Pul
 qMeYvDfpcvO8zx7fpJOPLYypdv/d17NIleGPACNYv4y1k4ZIxaCfGES5HijIrgPA
 gobtl74g62CARk8QYwdlfhLpRp0ZGBOL0OaluZxJsRqwTxDR7rG9VXO6EJX2w93y
 zJlDbArKZ3ez2ddZq0l7CFBcngiXL/zxsLuTnJLtYBLdsfkb7pAEjYcqDpB6KObF
 Bfsv4BplBoY92OFDxNtzeeU323zW2AHWUZVLtzpmGL71LH9POAN5dJQ8Q6SqsWcA
 V5mGK/RYQzxPd2XSZGUEIvzIe0vmqg2nWdx/GkbjAaL01UI0SJUPFm0GfCL18ZCp
 0nZRIMpKrpfYIg1xTcW2XAoXtNEIgE37BpN06zxAoMgy15h1Z45pZmEK5Le+oOh2
 2KbHAoEbPswnWnSW4TQdSjvXSQf96+j+mKL6cP+QzzkvYfzBf/D5TKuxBZAzzcQV
 CFOiPfyrBw2HMwc48+FMLsvmSgotKSfilG2pAUnglpcfBglzbSpnAwfIQys6528b
 J/gZUWPBXqOIyxb0sGQKRHAuD2L5TqiS5OFt2eWsQ9VB+JSlAsw=
 =c9G5
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-dt' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt

Pull "Amlogic 32-bit DT changes for v4.16" from Kevin Hilman:
- meson8: GPIO IRQ support
- switch to stable UART bindings w/correct clock
- add more L2 cache settings
- drop unused ADC clock

* tag 'amlogic-dt' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  ARM: meson: enable MESON_IRQ_GPIO also for MACH_MESON8
  ARM: dts: meson8: enable the GPIO interrupt controller
  ARM: dts: meson8b: use stable UART bindings with correct gate clock
  ARM: dts: meson8: use stable UART bindings with correct gate clock
  ARM: dts: meson: drop "sana" clock from SAR ADC
  ARM: dts: meson8: add more L2 cache settings
  ARM: dts: meson8b: add more L2 cache settings
2017-12-21 16:37:34 +01:00
Martin Blumenstingl
71a3dfd07c ARM: meson: enable MESON_IRQ_GPIO also for MACH_MESON8
Now that the GPIO interrupt controller also supports the Meson8 SoCs we
can enable it via Kconfig.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-12-11 15:58:46 -08:00
Colin Ian King
0f0e290a66 ARM: meson: fix spelling mistake: "Couln't" -> "Couldn't"
Trivial fix to spelling mistake in pr_err error message

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-11-30 15:29:43 -08:00
Jerome Brunet
dea54268f3 ARM: meson: enable MESON_IRQ_GPIO in Kconfig for meson8b
select MESON_IRQ_GPIO in Kconfig for Amlogic's meson8b SoC

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-10-29 08:40:08 -07:00
Martin Blumenstingl
d850f3e5d2 ARM: meson: Add SMP bringup code for Meson8 and Meson8b
This adds the necessary SMP-operations and startup code to use the
additional cores on the Amlogic Meson8/Meson8m2 (both are using the same
sequence) and Meson8b (using a slightly difference sequence) SoCs.

Signed-off-by: Carlo Caione <carlo@endlessm.com>
[add Meson8/Meson8m2 support and allow taking CPU cores offline as well]
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-10-29 08:29:41 -07:00
Martin Blumenstingl
2dda2de5a1 arm: meson: select the clock controller for Meson8
Select COMMON_CLK_MESON8B also for MACH_MESON8 since the Meson8b clock
controller driver can also be used on Meson8 SoCs now that we have a
separate compatible for it.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-06-09 11:15:36 -07:00
Michael Turquette
efea375fa9 arm: meson: explicitly select clk drivers
The AmLogic clock controller code is used by both arm and arm64
architectures. Explicitly select the core code for all Meson (32-bit
arm) builds, and also select the Meson8b driver when that machine is
built.

Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2016-07-07 17:54:25 +02:00
Linus Walleij
5c34a4e89c ARM: do away with ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB
This replaces:

- "select ARCH_REQUIRE_GPIOLIB" with "select GPIOLIB" as this can
  now be selected directly.

- "select ARCH_WANT_OPTIONAL_GPIOLIB" with no dependency: GPIOLIB
  is now selectable by everyone, so we need not declare our
  intent to select it.

When ordering the symbols the following rationale was used:
if the selects were in alphabetical order, I moved select GPIOLIB
to be in alphabetical order, but if the selects were not
maintained in alphabetical order, I just replaced
"select ARCH_REQUIRE_GPIOLIB" with "select GPIOLIB".

Cc: Michael Büsch <m@bues.ch>
Cc: arm@kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2016-06-03 12:18:13 -07:00
Masahiro Yamada
e324654294 ARM: use "depends on" for SoC configs instead of "if" after prompt
Many ARM sub-architectures use prompts followed by "if" conditional,
but it is wrong.

Please notice the difference between

    config ARCH_FOO
            bool "Foo SoCs" if ARCH_MULTI_V7

and

    config ARCH_FOO
            bool "Foo SoCs"
            depends on ARCH_MULTI_V7

These two are *not* equivalent!

In the former statement, it is not ARCH_FOO, but its prompt that
depends on ARCH_MULTI_V7.  So, it is completely valid that ARCH_FOO
is selected by another, but ARCH_MULTI_V7 is still disabled. As it is
not unmet dependency, Kconfig never warns.  This is probably not what
you want.

The former should be used only when you need to do so, and you really
understand what you are doing.  (In most cases, it should be wrong!)

For enabling/disabling sub-architectures, the latter is always correct.

As a good side effect, this commit fixes some entries over 80 columns
(mach-imx, mach-integrator, mach-mbevu).

[Arnd: I note that there is not really a bug here, according to
 the discussion that followed, but I can see value in being consistent
 and in making the lines shorter]

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Krzysztof Halasa <khc@piap.pl>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-12-01 22:44:51 +01:00
Carlo Caione
55fa3ee081 ARM: meson: Enable Meson8b SoCs
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-10-08 17:22:11 +02:00
Beniamino Galvani
ec9c06831e ARM: meson: select PINCTRL_MESON and ARCH_REQUIRE_GPIOLIB
Make sure that the Meson pinctrl driver is built whenever Meson
support is enabled.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-02 10:59:50 +01:00
Beniamino Galvani
6a4ccd9a8e ARM: meson: enable L2 cache
This enables the L2 cache controller available in Amlogic SoCs.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Carlo Caione <carlo@caione.org>
2014-11-18 16:35:01 +01:00
Beniamino Galvani
e790af67b2 ARM: meson: add meson8 support
Add a MACH_MESON8 symbol and add "amlogic,meson8" to the list of
compatible strings for the Meson DT machine to support devices based
on the Meson8 family of SoCs.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Carlo Caione <carlo@caione.org>
2014-11-18 16:34:45 +01:00
Carlo Caione
3b8f5030dd ARM: meson: add basic support for MesonX SoCs
This patch adds the basic machine file for the MesonX SoCs. Only Meson6
is populated.

Signed-off-by: Carlo Caione <carlo@caione.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-09-25 17:34:42 +02:00