fix below warning about PPI interrupts configuration:
"GIC: PPI13 is secure or misconfigured"
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Without this property, we get this boot warning:
"L2C: device tree omits to specify unified cache"
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Control the Chromecast's two LEDs using PWM instead of GPIO pins. This
allows for variable brightness.
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
On the Chromecast, the bootloader provides us with an ATAG_MEM of
start=0x01000000 and size=0x3eff8000. This is clearly incorrect, as the
range given encompasses nearly a GiB but the Chromecast only has 512MiB
of RAM! Additionally, this causes the kernel to be decompressed at
0x00008000, below the claimed beginning of RAM, and so the boot fails.
Since the existing ATAG parsing code runs before the kernel is even
decompressed and irrevocably patches the device tree, don't even try
to bypass it. Instead, use the "linux,usable-memory" property instead
of the "reg" property to define the real range. The ATAG code only
overwrites reg, but linux,usable-memory is checked first in the OF
driver, so the fact that reg gets changed makes no difference.
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Valve Steam Link is a consumer device built around the Marvell BG2CD SoC.
This board file enables the UART, USB and Ethernet interfaces as well as
internal I2C and SDIO, and adds SoC voltage regulator and board-specific
GPIO restart method info.
Cc: Sam Lantinga <saml@valvesoftware.com>
Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
This is useful if the board file needs to reference it.
Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
This adds most of the remaining Designware IP cores under APB trees in
the interest of documenting assignment of interrupts and memory ranges.
Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
This adds DT nodes for the Cortex-A9 MPCore SCU, local watchdog and
most importantly the global timer.
Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Cortex-A9 PMU has no associated memory ranges and "make dtbs W=1" warns
about missing reg or ranges property. To avoid the warning, move the PMU
node out of soc subtree to the root.
Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Use the correct trigger type for Cortex-A9. This was fixed for several
other SoCs since the kernel started issuing a boot-time warning.
Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
I believe the flush_cache_all() after scu_enable() is to "Ensure that
the data accessed by CPU0 before the SCU was initialised is visible
to the other CPUs." as commented in scu_enable(). So here
flush_cache_all() is a duplication, remove it.
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
BG2CD SoC uses r3p0 Cortex-A9 MPCore single-CPU cluster. Autoselect
pertinent errata, the SCU and the global timer, and allow use of the
local timer on uniprocessor kernels.
PL310 L2 cache controller has revision r3p2; no errata to select.
Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Add the save and restore for clksrc as part of suspend and resume
so that it saves the counter value and restores. This is needed in
modes like rtc+ddr in self-refresh not doing this stalls the time.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
These registers are part of the wkup domain and are lost during RTC only
suspend and also hibernation, so storing/restoring their state is
necessary.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Now as the Amstrad Delta board provides GPIO lookup tables, switch from
GPIO numbers to GPIO descriptors and use the table to locate required
GPIO pins.
The card uses two pins, one for jack and the other for voice modem
codec DAI control.
For jack pin, remove hardcoded GPIO number and use GPIO descriptor
based variant of jack GPIO initialization.
For modem_codec pin, declare static variable for storing its GPIO
descriptor, obtain it on card initialization and replace obsolete
ams_delta_latch2_write() with gpiod_set_value(). For that to work,
don't request the modem_codec pin from the board init code anymore.
If the modem_codec GPIO lookup fails, skip initialization of
functionality of the card which depends on its availability.
Pin naming used by the driver should be followed while respective GPIO
lookup table is initialized by a board init code.
Created and tested against linux-4.17-rc3, on top of patch 1/6 "ARM:
OMAP1: ams-delta: add GPIO lookup tables"
Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Scope of the change is limited to GPIO pins used by board specific
device drivers which will be updated by follow-up patches of the
series. Those are some OMAP GPIO (gpio-0-15) and most of Amstrad Delta
latch2 GPIO bank pins. Remaining pins of those banks, as well as
Amstrad Delta latch1 pins, will be addressed later.
Assign a label ("latch2") to the bank, enumerate its pins and put that
information, together with OMAP GPIO bank pins, in GPIO lookup tables.
Assign lookup tables to devices as soon as those devices are registered
and their names can be obtained.
A step froward in:
- removal of hard-coded GPIO numbers from drivers,
- removal of board mach includes from drivers,
- switching to dynamically assigned GPIO numbers.
Created and compile tested agains linux-4.17-rc3
Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Currently there are no differences between the MACH_MESON8 and
MACH_MESON8B Kconfig symbols (except the help text). Since both
platforms are very similar (Meson8b being a slightly updated,
cost-reduced version of Meson8 which even shares some peripherals with
Meson8m2) no notable differences are expected in the future either.
Suggested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Currently there are two identical Kconfig options where only differences
are the Kconfig help text and the list of .dtbs that are built:
- MACH_MESON8
- MACH_MESON8B
Build the Meson8b .dtbs when MACH_MESON8 is selected to get rid of the
latter Kconfig symbol later.
Suggested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
S390 bpf_jit.S is removed in net-next and had changes in 'net',
since that code isn't used any more take the removal.
TLS data structures split the TX and RX components in 'net-next',
put the new struct members from the bug fix in 'net' into the RX
part.
The 'net-next' tree had some reworking of how the ERSPAN code works in
the GRE tunneling code, overlapping with a one-line headroom
calculation fix in 'net'.
Overlapping changes in __sock_map_ctx_update_elem(), keep the bits
that read the prog members via READ_ONCE() into local variables
before using them.
Signed-off-by: David S. Miller <davem@davemloft.net>
The arm_pmu::handle_irq() callback has the same prototype as a generic
IRQ handler, taking the IRQ number and a void pointer argument which it
must convert to an arm_pmu pointer.
This means that all arm_pmu::handle_irq() take an IRQ number they never
use, and all must explicitly cast the void pointer to an arm_pmu
pointer.
Instead, let's change arm_pmu::handle_irq to take an arm_pmu pointer,
allowing these casts to be removed. The redundant IRQ number parameter
is also removed.
Suggested-by: Hoeun Ryu <hoeun.ryu@lge.com>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
With the new rev.E of A20-SOM-EVB, there is option for 16GB eMMC.
Currently used card is KLMAG2GEND, wired to MMC2 slot.
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Pull ARM fixes from Russell King:
- Łukasz Stelmach spotted a couple of issues with the decompressor.
- a couple of kdump fixes found while testing kdump
- replace some perl with shell code
- resolve SIGFPE breakage
- kprobes fixes
* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: fix kill( ,SIGFPE) breakage
ARM: 8772/1: kprobes: Prohibit kprobes on get_user functions
ARM: 8771/1: kprobes: Prohibit kprobes on do_undefinstr
ARM: 8770/1: kprobes: Prohibit probing on optimized_callback
ARM: 8769/1: kprobes: Fix to use get_kprobe_ctlblk after irq-disabed
ARM: replace unnecessary perl with sed and the shell $(( )) operator
ARM: kexec: record parent context registers for non-crash CPUs
ARM: kexec: fix kdump register saving on panic()
ARM: 8758/1: decompressor: restore r1 and r2 just before jumping to the kernel
ARM: 8753/1: decompressor: add a missing parameter to the addruart macro
The touchscreen driver no longer configures the device as wakeup source by
default. A "wakeup-source" property is needed.
To avoid regressions, this patch changes the DTS files for the only two
users of this driver that didn't have this property yet.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On RDU1, sdhc1 is used for eMMC, and that is 3.3V only.
Thus configure device node not to probe it as SD/SDIO and not try 1.8V.
Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Vybrid has single internal temperature sensor connected to both internal
ADC modules.
vf610-zii-dev already has ADC0 enabled. Now, to get temperature sensor
captured by iio_hwmon driver, need to configure iio_hwmon node to use
that ADC.
Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch uses "operating-points-v2" instead of
"operating-points" to be more fit with cpufreq-dt
driver.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.MX7S does NOT support CPU frequency scaling, so no
need to specify the CPU regulator supply.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Correct CPU supply name to meet cpufreq-dt driver's
requirement for voltage scaling.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On RDU1, imx51 usbh1 interface is either not used, or used via external
block that breaks USB2 signalling.
To keep things working if high-speed device gets connected to that
block, use ChipIdea feature to limit port to full speed.
Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Remove unit-address and reg property from anatop regulators to fix
the following DTC warnings with W=1:
arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unique_unit_address): /soc/aips-bus@2000000/anatop@20c8000/regulator-vddcore@20c8140: duplicate unit-address (also used in node /soc/aips-bus@2000000/anatop@20c8000/regulator-vddpu@20c8140)
arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unique_unit_address): /soc/aips-bus@2000000/anatop@20c8000/regulator-vddcore@20c8140: duplicate unit-address (also used in node /soc/aips-bus@2000000/anatop@20c8000/regulator-vddsoc@20c8140)
arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unique_unit_address): /soc/aips-bus@2000000/anatop@20c8000/regulator-vddpu@20c8140: duplicate unit-address (also used in node /soc/aips-bus@2000000/anatop@20c8000/regulator-vddsoc@20c8140)
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
A handful of fixes. I've been queuing them up a bit too long so the list
is longer than it otherwise would have been spread out across a few -rcs.
In general, it's a scattering of fixes across several platforms, nothing
truly serious enough to point out.
There's a slightly larger batch of them for the Davinci platforms due
to work to bring them back to life after some time, so there's a handful
of regressions, some of them going back very far, others more recent.
There's also a few patches fixing DT on Renesas platforms since they
changed some bindings without remaining backwards compatible, splitting
up describing LVDS as a proper bridge instead of having it as part of the
display unit. We could push for them to be backwards compatible with old
device trees, but it's likely to regress eventually if nobody's actually
using said compatibility.
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Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"A handful of fixes. I've been queuing them up a bit too long so the
list is longer than it otherwise would have been spread out across a
few -rcs.
In general, it's a scattering of fixes across several platforms,
nothing truly serious enough to point out.
There's a slightly larger batch of them for the Davinci platforms due
to work to bring them back to life after some time, so there's a
handful of regressions, some of them going back very far, others more
recent.
There's also a few patches fixing DT on Renesas platforms since they
changed some bindings without remaining backwards compatible,
splitting up describing LVDS as a proper bridge instead of having it
as part of the display unit.
We could push for them to be backwards compatible with old device
trees, but it's likely to regress eventually if nobody's actually
using said compatibility"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (36 commits)
ARM: davinci: board-dm646x-evm: set VPIF capture card name
ARM: davinci: board-dm646x-evm: pass correct I2C adapter id for VPIF
ARM: davinci: dm646x: fix timer interrupt generation
ARM: keystone: fix platform_domain_notifier array overrun
arm64: dts: exynos: Fix interrupt type for I2S1 device on Exynos5433
ARM: dts: imx51-zii-rdu1: fix touchscreen bindings
firmware: arm_scmi: Use after free in scmi_create_protocol_device()
ARM: dts: cygnus: fix irq type for arm global timer
Revert "ARM: dts: logicpd-som-lv: Fix pinmux controller references"
tee: check shm references are consistent in offset/size
tee: shm: fix use-after-free via temporarily dropped reference
ARM: dts: imx7s: Pass the 'fsl,sec-era' property
ARM: dts: tegra20: Revert "Fix ULPI regression on Tegra20"
ARM: dts: correct missing "compatible" entry for ti81xx SoCs
ARM: OMAP1: ams-delta: fix deferred_fiq handler
arm64: tegra: Make BCM89610 PHY interrupt as active low
ARM: davinci: fix GPIO lookup for I2C
ARM: dts: logicpd-som-lv: Fix pinmux controller references
ARM: dts: logicpd-som-lv: Fix Audio Mute
ARM: dts: logicpd-som-lv: Fix WL127x Startup Issues
...
Commit 7771c66457 ("signal/arm: Document conflicts with SI_USER and
SIGFPE") broke the siginfo structure for userspace triggered signals,
causing the strace testsuite to regress. Fix this by eliminating
the FPE_FIXME definition (which is at the root of the breakage) and
use FPE_FLTINV instead for the case where the hardware appears to be
reporting nonsense.
Fixes: 7771c66457 ("signal/arm: Document conflicts with SI_USER and SIGFPE")
Suggested-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
VMLINUX_SYMBOL() is no-op unless CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX
is defined. It has ever been selected only by BLACKFIN and METAG.
VMLINUX_SYMBOL() is unneeded for ARM-specific code.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Some users of get_user use the macro with an argument p which
is already specified as static. When using clang this leads to
a duplicate specifier:
CC arch/arm/kernel/process.o
In file included from init/do_mounts.c:15:
In file included from ./include/linux/tty.h:7:
In file included from ./include/uapi/linux/termios.h:6:
In file included from ./arch/arm/include/generated/uapi/asm/termios.h:1:
./include/asm-generic/termios.h:25:6: warning: duplicate 'const' declaration
specifier [-Wduplicate-decl-specifier]
if (get_user(tmp, &termio->c_iflag) < 0)
^
./arch/arm/include/asm/uaccess.h:195:3: note: expanded from macro 'get_user'
__get_user_check(x, p);
^
./arch/arm/include/asm/uaccess.h:155:12: note: expanded from macro
'__get_user_check'
register const typeof(*(p)) __user *__p asm("r0") = (p);
Remove the const attribute from the register declaration
to avoid the duplicate const specifier. In a test with ptrace.c
and traps.c (both using get_user with non-const arguments for p)
the generated code was exactly the same.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Use cc-options call for compiler options which are not available
in clang. With this patch an ARMv7 multi platform kernel can be
successfully build using clang (tested with version 5.0.1).
Based-on-patches-by: Behan Webster <behanw@converseincode.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
According to GCC documentation -m(no-)thumb-interwork is
meaningless in AAPCS configurations. Also clang does not
support the flag:
clang-5.0: error: unknown argument: '-mno-thumb-interwork'
Just drop -mno-thumb-interwork in AEABI configuration.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Suspending a CPU on a RT kernel results in the following backtrace:
| Disabling non-boot CPUs ...
| BUG: sleeping function called from invalid context at kernel/locking/rtmutex.c:917
| in_atomic(): 1, irqs_disabled(): 128, pid: 18, name: migration/1
| INFO: lockdep is turned off.
| irq event stamp: 122
| hardirqs last enabled at (121): [<c06ac0ac>] _raw_spin_unlock_irqrestore+0x88/0x90
| hardirqs last disabled at (122): [<c06abed0>] _raw_spin_lock_irq+0x28/0x5c
| CPU: 1 PID: 18 Comm: migration/1 Tainted: G W 4.1.4-rt3-01046-g96ac8da #204
| Hardware name: Generic DRA74X (Flattened Device Tree)
| [<c0019134>] (unwind_backtrace) from [<c0014774>] (show_stack+0x20/0x24)
| [<c0014774>] (show_stack) from [<c06a70f4>] (dump_stack+0x88/0xdc)
| [<c06a70f4>] (dump_stack) from [<c006cab8>] (___might_sleep+0x198/0x2a8)
| [<c006cab8>] (___might_sleep) from [<c06ac4dc>] (rt_spin_lock+0x30/0x70)
| [<c06ac4dc>] (rt_spin_lock) from [<c013f790>] (find_lock_task_mm+0x9c/0x174)
| [<c013f790>] (find_lock_task_mm) from [<c00409ac>] (clear_tasks_mm_cpumask+0xb4/0x1ac)
| [<c00409ac>] (clear_tasks_mm_cpumask) from [<c00166a4>] (__cpu_disable+0x98/0xbc)
| [<c00166a4>] (__cpu_disable) from [<c06a2e8c>] (take_cpu_down+0x1c/0x50)
| [<c06a2e8c>] (take_cpu_down) from [<c00f2600>] (multi_cpu_stop+0x11c/0x158)
| [<c00f2600>] (multi_cpu_stop) from [<c00f2a9c>] (cpu_stopper_thread+0xc4/0x184)
| [<c00f2a9c>] (cpu_stopper_thread) from [<c0069058>] (smpboot_thread_fn+0x18c/0x324)
| [<c0069058>] (smpboot_thread_fn) from [<c00649c4>] (kthread+0xe8/0x104)
| [<c00649c4>] (kthread) from [<c0010058>] (ret_from_fork+0x14/0x3c)
| CPU1: shutdown
The root cause of above backtrace is task_lock() which takes a sleeping
lock on -RT.
To fix the issue, move clear_tasks_mm_cpumask() call from __cpu_disable()
to __cpu_die() which is called on the thread which is asking for a target
CPU to be shutdown. In addition, this change restores CPU hotplug
functionality on ARM CPU1 can be unplugged/plugged many times.
Link: http://lkml.kernel.org/r/1441995683-30817-1-git-send-email-grygorii.strashko@ti.com
[bigeasy: slighty edited the commit message]
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: <linux-arm-kernel@lists.infradead.org>
Cc: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
NUMREGBYTES (which is used as the size for gdb_regs[]) is incorrectly
based on DBG_MAX_REG_NUM instead of GDB_MAX_REGS. DBG_MAX_REG_NUM
is the number of total registers, while GDB_MAX_REGS is the number
of 'unsigned longs' it takes to serialize those registers. Since
FP registers require 3 'unsigned longs' each, DBG_MAX_REG_NUM is
smaller than GDB_MAX_REGS.
This causes GDB 8.0 give the following error on connect:
"Truncated register 19 in remote 'g' packet"
This also causes the register serialization/deserialization logic
to overflow gdb_regs[], overwriting whatever follows.
Fixes: 834b2964b7 ("kgdb,arm: fix register dump")
Cc: <stable@vger.kernel.org> # 2.6.37+
Signed-off-by: David Rivshin <drivshin@allworx.com>
Acked-by: Rabin Vincent <rabin@rab.in>
Tested-by: Daniel Thompson <daniel.thompson@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Use vma_pages() function instead of open coding it.
Generated by scripts/coccinelle/api/vma_pages.cocci.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
ARMv8R/M architecture defines new memory protection scheme - PMSAv8
which is not compatible with PMSAv7.
Key differences to PMSAv7 are:
- Region geometry is defined by base and limit addresses
- Addresses need to be either 32 or 64 byte aligned
- No region priority due to overlapping regions are not allowed
- It is unified, i.e. no distinction between data/instruction regions
- Memory attributes are controlled via MAIR
This patch implements support for PMSAv8 MPU defined by ARMv8R/M
architecture.
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
This patch postpone MPU activation till __after_proc_init (which is
placed in .text section) rather than doing it in __setup_mpu. It
allows us ignore used-only-once .head.text section while programming
PMSAv8 MPU (for PMSAv7 it stays covered anyway).
Tested-by: Szemz? András <sza@esh.hu>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Currently, we have mixed code placement between .head.text and .text
depends on configuration we are building:
_text M R(UP) R(SMP)
======================================================
__setup_mpu __HEAD __HEAD text
__after_proc_init __HEAD __HEAD text
__mmap_switched text text text
We are going to support another variant of MPU which is different to
PMSAv7 in sense overlapping MPU regions are not allowed, so this patch
makes boundaries between these sections precise and consistent:
_text M R(UP) R(SMP)
======================================================
__setup_mpu __HEAD __HEAD __HEAD
__after_proc_init text text text
__mmap_switched text text text
Additionally, it paves a path to postpone MPU activation till
__after_proc_init where we do set SCTLR anyway and can return
directly to __mmap_switched.
Tested-by: Szemz? András <sza@esh.hu>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
We are going to support different MPU which programming model is not
compatible to PMSAv7, so move PMSAv7 MPU under it's own namespace.
Tested-by: Szemz? András <sza@esh.hu>
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
While testing multi_v7_defconfig with config fragments that makes the
kernel size to grow. The kernel fails to load simple modules, as
reported by kselftest:
[ 34.107620] test_printf: section 4 reloc 2 sym 'memset': relocation
28 out of range (0xbf046044 -> 0xc109f720)
selftests: printf.sh [FAIL]
The problem that is seen when enabling too much in the kernel without
enabling ARM_MODULE_PLTS, is that the top of the kernel gets out of
reach from the bottom of the module area.
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Anders Roxell <anders.roxell@linaro.org>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Since do_undefinstr() uses get_user to get the undefined
instruction, it can be called before kprobes processes
recursive check. This can cause an infinit recursive
exception.
Prohibit probing on get_user functions.
Fixes: 24ba613c9d ("ARM kprobes: core code")
Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Prohibit kprobes on do_undefinstr because kprobes on
arm is implemented by undefined instruction. This means
if we probe do_undefinstr(), it can cause infinit
recursive exception.
Fixes: 24ba613c9d ("ARM kprobes: core code")
Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Prohibit probing on optimized_callback() because
it is called from kprobes itself. If we put a kprobes
on it, that will cause a recursive call loop.
Mark it NOKPROBE_SYMBOL.
Fixes: 0dc016dbd8 ("ARM: kprobes: enable OPTPROBES for ARM 32")
Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Since get_kprobe_ctlblk() uses smp_processor_id() to access
per-cpu variable, it hits smp_processor_id sanity check as below.
[ 7.006928] BUG: using smp_processor_id() in preemptible [00000000] code: swapper/0/1
[ 7.007859] caller is debug_smp_processor_id+0x20/0x24
[ 7.008438] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.16.0-rc1-00192-g4eb17253e4b5 #1
[ 7.008890] Hardware name: Generic DT based system
[ 7.009917] [<c0313f0c>] (unwind_backtrace) from [<c030e6d8>] (show_stack+0x20/0x24)
[ 7.010473] [<c030e6d8>] (show_stack) from [<c0c64694>] (dump_stack+0x84/0x98)
[ 7.010990] [<c0c64694>] (dump_stack) from [<c071ca5c>] (check_preemption_disabled+0x138/0x13c)
[ 7.011592] [<c071ca5c>] (check_preemption_disabled) from [<c071ca80>] (debug_smp_processor_id+0x20/0x24)
[ 7.012214] [<c071ca80>] (debug_smp_processor_id) from [<c03335e0>] (optimized_callback+0x2c/0xe4)
[ 7.013077] [<c03335e0>] (optimized_callback) from [<bf0021b0>] (0xbf0021b0)
To fix this issue, call get_kprobe_ctlblk() right after
irq-disabled since that disables preemption.
Fixes: 0dc016dbd8 ("ARM: kprobes: enable OPTPROBES for ARM 32")
Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
You can build a kernel in a cross compiling environment that doesn't
have perl in the $PATH. Commit 429f7a062e broke that for 32 bit
ARM. Fix it.
As reported by Stephen Rothwell, it appears that the symbols can be
either part of the BSS section or absolute symbols depending on the
binutils version. When they're an absolute symbol, the $(( ))
operator errors out and the build fails. Fix this as well.
Fixes: 429f7a062e ("ARM: decompressor: fix BSS size calculation")
Reported-by: Rob Landley <rob@landley.net>
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Acked-by: Rob Landley <rob@landley.net>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
How we got to machine_crash_nonpanic_core() (iow, from an IPI, etc) is
not interesting for debugging a crash. The more interesting context
is the parent context prior to the IPI being received.
Record the parent context register state rather than the register state
in machine_crash_nonpanic_core(), which is more relevant to the failing
condition.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
When a panic() occurs, the kexec code uses smp_send_stop() to stop
the other CPUs, but this results in the CPU register state not being
saved, and gdb is unable to inspect the state of other CPUs.
Commit 0ee59413c9 ("x86/panic: replace smp_send_stop() with kdump
friendly version in panic path") addressed the issue on x86, but
ignored other architectures. Address the issue on ARM by splitting
out the crash stop implementation to crash_smp_send_stop() and
adding the necessary protection.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The hypervisor setup before __enter_kernel destroys the value
sotred in r1. The value needs to be restored just before the jump.
Fixes: 6b52f7bdb8 ("ARM: hyp-stub: Use r1 for the soft-restart address")
Signed-off-by: Łukasz Stelmach <l.stelmach@samsung.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
In commit 639da5ee37 ("ARM: add an extra temp register to the low
level debugging addruart macro") an additional temporary register was
added to the addruart macro, but the decompressor code wasn't updated.
Fixes: 639da5ee37 ("ARM: add an extra temp register to the low level debugging addruart macro")
Signed-off-by: Łukasz Stelmach <l.stelmach@samsung.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
There are some LED's attached to the GPIO expander, and
there are is a bank of switches attached to the GPIO expander.
This patch associates the LED and the switches to it.
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
There is a tca6416 GPIO expander on i2c2. This patch enables the
GPIO expander which has several LED's and some connected DIP
switches
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add pin control information for the NAND interface on the Armada
98DX3236 and variants.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Use the new bindings of the Marvell NAND controller driver. Also adapt
the NAND controller node organization to distinguish which property is
relevant for the controller, and which one is NAND chip specific. Expose
the partitions as a subnode of the NAND chip.
Remove the 'marvell,nand-enable-arbiter' property, not needed anymore
as the new driver activates the arbiter by default for all boards which
is either needed or harmless.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Use the new bindings of the Marvell NAND controller driver. Also adapt
the NAND controller node organization to distinguish which property is
relevant for the controller, and which one is NAND chip specific. Expose
the partitions as a subnode of the NAND chip.
Remove the 'marvell,nand-enable-arbiter' property, not needed anymore
as the new driver activates the arbiter by default for all boards which
is either needed or harmless.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Use the new bindings of the Marvell NAND controller driver. Also adapt
the NAND controller node organization to distinguish which property is
relevant for the controller, and which one is NAND chip specific. Expose
the partitions as a subnode of the NAND chip.
Remove the 'marvell,nand-enable-arbiter' property, not needed anymore
as the new driver activates the arbiter by default for all boards which
is either needed or harmless.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Use the new bindings of the Marvell NAND controller driver. Also adapt
the NAND controller node organization to distinguish which property is
relevant for the controller, and which one is NAND chip specific. Expose
the partitions as a subnode of the NAND chip.
Remove the 'marvell,nand-enable-arbiter' property, not needed anymore
as the new driver activates the arbiter by default for all boards which
is either needed or harmless.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
We may have LOGICRETSTATE cleared by the bootloader or kexec boot.
Currently this means we will see lost GPIO interrupts at least for
network interfaces such as wlcore and smsc911x if PER hits retention.
Let's fix the issue by making sure LOGICRETSTATE is set. Once we have
GPIOs working with wakeirqs then we should be able to clear it.
Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Inroduce cpu_pm notifiers for context save/restore. This will be
needed for am43xx family in case of rtc only mode with ddr in
self-refresh.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
There are two registers on am43x needed for IO daisy chain wake to work
properly, however currently after an RTC+DDR cycle they are lost. We
must take care to save and restore these before and after entering RTC
mode otherwise IO daisy chain wake will stop working from DeepSleep
after resuming.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Inroduce cpu_pm notifiers for context save/restore. This is
needed for am43xx family during rtc only mode with ddr in
self-refresh.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The powerdomain control registers are stored in the WKUP powerdomain on
AM33XX/AM43XX, which is lost on RTC-only suspend and also hibernate. This
adds context save and restore functions for those registers.
Sometimes the powerdomain state does not need to change,
perhaps we only need to change memory retention states, so make
sure the restored state is different from the current state before we wait
for a transition.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Russ Dill <Russ.Dill@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Inroduce cpu_pm notifiers for context save/restore. This will be
needed for am43xx family in case of rtc only mode with ddr in
self-refresh.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tegra20-cpufreq driver require a platform device in order to be loaded,
instantiate a simple platform device for the driver during of the machines
late initialization.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This is used to support suspend modes like RTC-only and hibernate where
the state of the registers controlling clockdomains is lost.
Signed-off-by: Russ Dill <Russ.Dill@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
* x86 fixes: PCID, UMIP, locking
* Improved support for recent Windows version that have a 2048 Hz
APIC timer.
* Rename KVM_HINTS_DEDICATED CPUID bit to KVM_HINTS_REALTIME
* Better behaved selftests.
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Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull kvm fixes from Paolo Bonzini:
- ARM/ARM64 locking fixes
- x86 fixes: PCID, UMIP, locking
- improved support for recent Windows version that have a 2048 Hz APIC
timer
- rename KVM_HINTS_DEDICATED CPUID bit to KVM_HINTS_REALTIME
- better behaved selftests
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
kvm: rename KVM_HINTS_DEDICATED to KVM_HINTS_REALTIME
KVM: arm/arm64: VGIC/ITS save/restore: protect kvm_read_guest() calls
KVM: arm/arm64: VGIC/ITS: protect kvm_read_guest() calls with SRCU lock
KVM: arm/arm64: VGIC/ITS: Promote irq_lock() in update_affinity
KVM: arm/arm64: Properly protect VGIC locks from IRQs
KVM: X86: Lower the default timer frequency limit to 200us
KVM: vmx: update sec exec controls for UMIP iff emulating UMIP
kvm: x86: Suppress CR3_PCID_INVD bit only when PCIDs are enabled
KVM: selftests: exit with 0 status code when tests cannot be run
KVM: hyperv: idr_find needs RCU protection
x86: Delay skip of emulated hypercall instruction
KVM: Extend MAX_IRQ_ROUTES to 4096 for all archs
This header only contains platform_data. Move it to the proper directory.
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Tony Lindgren <tony@atomide.com>
This header only contains platform_data. Move it to the proper directory.
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Acked-by: James Hogan <jhogan@kernel.org>
Acked-by: Greg Ungerer <gerg@uclinux.org>
Instead of passing a global GPIO number for the enable GPIO, pass
a descriptor looked up from the device tree node or the board file
decriptor table for the regulator.
There is a single board file passing the GPIOs for LDO1 and LDO2
through platform data, so augment this to pass descriptors
associated with the i2c device as well.
The special GPIO enable DT property for the enable GPIO is
nonstandard but this was accomodated in
commit 6a537d4846
"gpio: of: Support regulator nonstandard GPIO properties".
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Instead of passing a global GPIO number, pass a descriptor looked
up with the standard devm_gpiod_get_optional() call.
We have augmented the GPIO core to look up the regulator special
GPIO "wlf,ldoena" in commit 6a537d4846
"gpio: of: Support regulator nonstandard GPIO properties".
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The Bananapi M2 Ultra has a Realtek RTL8211E RGMII PHY tied to the GMAC.
The PMIC's DC1SW output provides power for the PHY, while the ALDO2
output provides I/O voltages on both sides.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The R40 SoC has a GMAC (gigabit capable Ethernet controller). Add a
device node for it. The only publicly available board for this SoC
uses an RGMII PHY. Add a pinmux node for it as well.
Since this SoC also has an old 10/100 Mbps EMAC, which also has an
MDIO bus controller, the MDIO bus for the GMAC is labeled "gmac_mdio".
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The device nodes dereference (&foo) usages should be sorted by the label
names, barring any parsing order issues such as the #include statement
for the PMIC's .dtsi file that must come after the PMIC.
Move the mmc and ohci blocks in front of the PMIC's regulator blocks.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Daniel Borkmann says:
====================
pull-request: bpf-next 2018-05-17
The following pull-request contains BPF updates for your *net-next* tree.
The main changes are:
1) Provide a new BPF helper for doing a FIB and neighbor lookup
in the kernel tables from an XDP or tc BPF program. The helper
provides a fast-path for forwarding packets. The API supports
IPv4, IPv6 and MPLS protocols, but currently IPv4 and IPv6 are
implemented in this initial work, from David (Ahern).
2) Just a tiny diff but huge feature enabled for nfp driver by
extending the BPF offload beyond a pure host processing offload.
Offloaded XDP programs are allowed to set the RX queue index and
thus opening the door for defining a fully programmable RSS/n-tuple
filter replacement. Once BPF decided on a queue already, the device
data-path will skip the conventional RSS processing completely,
from Jakub.
3) The original sockmap implementation was array based similar to
devmap. However unlike devmap where an ifindex has a 1:1 mapping
into the map there are use cases with sockets that need to be
referenced using longer keys. Hence, sockhash map is added reusing
as much of the sockmap code as possible, from John.
4) Introduce BTF ID. The ID is allocatd through an IDR similar as
with BPF maps and progs. It also makes BTF accessible to user
space via BPF_BTF_GET_FD_BY_ID and adds exposure of the BTF data
through BPF_OBJ_GET_INFO_BY_FD, from Martin.
5) Enable BPF stackmap with build_id also in NMI context. Due to the
up_read() of current->mm->mmap_sem build_id cannot be parsed.
This work defers the up_read() via a per-cpu irq_work so that
at least limited support can be enabled, from Song.
6) Various BPF JIT follow-up cleanups and fixups after the LD_ABS/LD_IND
JIT conversion as well as implementation of an optimized 32/64 bit
immediate load in the arm64 JIT that allows to reduce the number of
emitted instructions; in case of tested real-world programs they
were shrinking by three percent, from Daniel.
7) Add ifindex parameter to the libbpf loader in order to enable
BPF offload support. Right now only iproute2 can load offloaded
BPF and this will also enable libbpf for direct integration into
other applications, from David (Beckett).
8) Convert the plain text documentation under Documentation/bpf/ into
RST format since this is the appropriate standard the kernel is
moving to for all documentation. Also add an overview README.rst,
from Jesper.
9) Add __printf verification attribute to the bpf_verifier_vlog()
helper. Though it uses va_list we can still allow gcc to check
the format string, from Mathieu.
10) Fix a bash reference in the BPF selftest's Makefile. The '|& ...'
is a bash 4.0+ feature which is not guaranteed to be available
when calling out to shell, therefore use a more portable variant,
from Joe.
11) Fix a 64 bit division in xdp_umem_reg() by using div_u64()
instead of relying on the gcc built-in, from Björn.
12) Fix a sock hashmap kmalloc warning reported by syzbot when an
overly large key size is used in hashmap then causing overflows
in htab->elem_size. Reject bogus attr->key_size early in the
sock_hash_alloc(), from Yonghong.
13) Ensure in BPF selftests when urandom_read is being linked that
--build-id is always enabled so that test_stacktrace_build_id[_nmi]
won't be failing, from Alexei.
14) Add bitsperlong.h as well as errno.h uapi headers into the tools
header infrastructure which point to one of the arch specific
uapi headers. This was needed in order to fix a build error on
some systems for the BPF selftests, from Sirio.
15) Allow for short options to be used in the xdp_monitor BPF sample
code. And also a bpf.h tools uapi header sync in order to fix a
selftest build failure. Both from Prashant.
16) More formally clarify the meaning of ID in the direct packet access
section of the BPF documentation, from Wang.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
The legacy mode uses the write protect and card detect but DT does not.
This patch enables Write-Protect and Card-Detect pins for the MMC card, and
the gpio-ranges property sets the gpio pinmuxing for those respective pins.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
R-Car Gen2 and RZ/G1 platforms come with a watchdog IP, therefore enable
its driver by default. It is enabled as a module to avoid increasing
the kernel image size.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
R-Car Gen2 and RZ/G1 platforms come with a watchdog IP, therefore enable
its driver by default.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Variants of proc_create{,_data} that directly take a seq_file show
callback and drastically reduces the boilerplate code in the callers.
All trivial callers converted over.
Signed-off-by: Christoph Hellwig <hch@lst.de>
over multiple boards like default serial setting for rk3288-tinker,
output selection for the dp83867 on the phycore-som and the newly
added pwm-backlight delay properties for veyron boards.
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Merge tag 'v4.18-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Fixed pin numbers for uart4 on rk3288, iommu clocks and small changes
over multiple boards like default serial setting for rk3288-tinker,
output selection for the dp83867 on the phycore-som and the newly
added pwm-backlight delay properties for veyron boards.
* tag 'v4.18-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: default serial for rk3288 Tinker Board
ARM: dts: rockchip: set PWM delay backlight settings for Minnie
ARM: dts: rockchip: set PWM delay backlight settings for Veyron
ARM: dts: rockchip: add clocks in iommu nodes
ARM: dts: rockchip: Add dp83867 CLK_OUT muxing on rk3288-phycore-som
ARM: dts: rockchip: fix uart4 pin-numbers for rk3288
Signed-off-by: Olof Johansson <olof@lixom.net>
They are needed for DM6467 EVM to work. The first patch fixes an
issue with timer interrupt and the second two are needed for video
driver to probe successfully.
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Merge tag 'davinci-fixes-for-v4.17-part-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into fixes
Second set of fixes for TI DaVinci.
They are needed for DM6467 EVM to work. The first patch fixes an
issue with timer interrupt and the second two are needed for video
driver to probe successfully.
* tag 'davinci-fixes-for-v4.17-part-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: board-dm646x-evm: set VPIF capture card name
ARM: davinci: board-dm646x-evm: pass correct I2C adapter id for VPIF
ARM: davinci: dm646x: fix timer interrupt generation
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Syntactic restructuring of motherboard include file so that it can be
included at the top of any other DTS file as it should be rather than
existing include in the middle of the file at a specific location
2. Use of standard GPIO controller bindings for few sysreg components
like LED, MMC Write Protect/Card Detect and Flash Write Protect
to fix some of the new DTC warnings
3. Cleanup to replace all underscores('_') with hyphens('-') in the
device node names
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Merge tag 'vexpress-updates-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt
ARMv7 Vexpress updates/cleanups for v4.18
1. Syntactic restructuring of motherboard include file so that it can be
included at the top of any other DTS file as it should be rather than
existing include in the middle of the file at a specific location
2. Use of standard GPIO controller bindings for few sysreg components
like LED, MMC Write Protect/Card Detect and Flash Write Protect
to fix some of the new DTC warnings
3. Cleanup to replace all underscores('_') with hyphens('-') in the
device node names
* tag 'vexpress-updates-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
ARM: dts: vexpress: replace '_' with '-' in node names
ARM: dts: vexpress: use standard gpio bindings for sys_{led,mci,flash}
ARM: dts: vexpress: Restructure motherboard includes
Signed-off-by: Olof Johansson <olof@lixom.net>
The touchscreen patch did not apply to this branch correctly and
inadvertently got placed onto I2C2 when it should be on I2C3. This fixes
the issue.
Fixes: 121685b146 ("ARM: dts: logicpd-som-lv: Enable Touchscreen
controller")
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The SOM used in the am3517-evm has a s35390a onboard. This
patch allows the s35390a to be used as the RTC.
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
enable mmc3 used for wlan and uart1 used for bluetooth
configure the gpios used for wlan and bluetooth controls
add fixed voltage regulator used for wlan power control
Signed-off-by: Eyal Reizer <eyalr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The AM3517-EVM by Logic PD has a Logic PD type 15 display LCD
attached to the baseboard, and the SOM itself has an integrated
touchscreen controller. This patch enables both the LCD and
the tsc2004 on the SOM.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The am3517-som is powered by vdd_core_reg, so let's add the
'cpu' device-tree node with the 'vdd_core' regulator as the core
supply.
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit adds the common voltage regulators used on LogicPD's
AM3517 System-On-Modules.
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The am3517-evm consists of an am3517 SOM-M2 and a baseboard.
As items are added that are unique to the baseboard, let's place
them in a file called am3517-som.dtsi. These items will be
common for all variants of the SOM.
Anything unique to the baseboard will be placed into
am3517-evm.
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The boardboard supports card detect and write protect, so let's
enable those pins.
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The board uses 26MHz oscillator for the twl4030 HFCLK. This way we will
not depend on the bootloader to configure the CFG_BOOT:HFCLK_FREQ
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The board uses 26MHz oscillator for the twl4030 HFCLK.
This way we will not depend on the bootloader to configure the
CFG_BOOT:HFCLK_FREQ
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Replace magic number with the proper IRQ_TYPE specifier to improve DT
readability.
Signed-off-by: Hernán Gonzalez <hernan@vanguardiasur.com.ar>
Signed-off-by: Tony Lindgren <tony@atomide.com>
GPIO_ACTIVE_LOW was being used to specify an interrupt, use
IRQ_TYPE_EDGE_RISING instead. This improves DT readability.
Signed-off-by: Hernán Gonzalez <hernan@vanguardiasur.com.ar>
Signed-off-by: Tony Lindgren <tony@atomide.com>
GPIO_ACTIVE_LOW was being used to specify an interrupt, use
IRQ_TYPE_EDGE_RISING instead. This improves DT readability.
Signed-off-by: Hernán Gonzalez <hernan@vanguardiasur.com.ar>
Signed-off-by: Tony Lindgren <tony@atomide.com>
GPIO_ACTIVE_LOW was being used to specify an interrupt, use
IRQ_TYPE_EDGE_RISING instead. This improves DT readability.
Signed-off-by: Hernán Gonzalez <hernan@vanguardiasur.com.ar>
Signed-off-by: Tony Lindgren <tony@atomide.com>
GPIO_ACTIVE_LOW was being used to specify an interrupt, use
IRQ_TYPE_EDGE_RISING instead. This improves DT readability.
Signed-off-by: Hernán Gonzalez <hernan@vanguardiasur.com.ar>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This reverts commit 561f9bcf26.
While the correct IRQ level fixed the WARN_ON(), but prevented the probe
of tps65218 as GIC_SPI does not support LEVEL_LOW (?)
Use LEVEL_HIGH as it looks to be the accurate one since the INTn of TPS is
connected to NMIn of the SoC.
Fixes: 561f9bcf26 ("ARM: dts: am437x-sk-evm: Correct tps65218 irq type")
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
While the correct IRQ level fixed the WARN_ON(), but prevented the probe
of tps65218 as GIC_SPI does not support LEVEL_LOW (?)
Use LEVEL_HIGH as it looks to be the accurate one since the INTn of TPS is
connected to NMIn of the SoC.
Fixes: 7a53a34622 ("ARM: dts: am437x-epos-evm: Correct tps65218 irq type")
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
While the correct IRQ level fixed the WARN_ON(), but prevented the probe
of tps65218 as GIC_SPI does not support LEVEL_LOW (?)
Use LEVEL_HIGH as it looks to be the accurate one since the INTn of TPS is
connected to NMIn of the SoC.
Fixes: b997f534b5 ("ARM: dts: am437x-cm-t43: Correct tps65218 irq type")
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
While the correct IRQ level fixed the WARN_ON(), but prevented the probe
of tps65218 as GIC_SPI does not support LEVEL_LOW (?)
Use LEVEL_HIGH as it looks to be the accurate one since the INTn of TPS is
connected to NMIn of the SoC.
Fixes: 5692b911c9 ("ARM: dts: am437x-gp-evm: Correct tps65218 irq type")
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
With the backlight phandle the driver can manage the backlight on/off in
sync with the panel enable/disable.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The OMAP3 CM-T3x based boards define 2 /connector nodes for S-Video and
DVI output. However, since they have the same node name, the S-Video
connector overwritten. This leaves a dangling graph connection which
gives the following warning:
arch/arm/boot/dts/omap3-sbc-t3517.dtb: Warning (graph_endpoint):
/ocp@68000000/dss@48050000/encoder@48050c00/port/endpoint: graph
connection to node '/connector/port/endpoint' is not bidirectional
Fix this by renaming the nodes to s-video-connector and dvi-connector.
Cc: "Benoît Cousson" <bcousson@baylibre.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
omap3-devkit8000-common.dtsi defines a graph connection for DVI, but
then omap3-devkit8000-lcd-common.dtsi overrides that with a graph
connection for the LCD as the same output signals are used. This
leaves an incomplete graph as the TFP410 output has only half a
connection. The result is the following warning:
arch/arm/boot/dts/omap3-devkit8000-lcd70.dtb: Warning (graph_endpoint):
/encoder0/ports/port@0/endpoint: graph connection to node
'/ocp@68000000/dss@48050000/port/endpoint' is not bidirectional
Fix this by defining multiple endpoints which is the correct way to show
a 1 to many connection.
Cc: "Benoît Cousson" <bcousson@baylibre.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch switches Odroid X/X2/U3 to use dedicated Odroid audio subsystem
DT bindings instead of the simple-card in order to add support for audio
over HDMI.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
kvm_read_guest() will eventually look up in kvm_memslots(), which requires
either to hold the kvm->slots_lock or to be inside a kvm->srcu critical
section.
In contrast to x86 and s390 we don't take the SRCU lock on every guest
exit, so we have to do it individually for each kvm_read_guest() call.
Provide a wrapper which does that and use that everywhere.
Note that ending the SRCU critical section before returning from the
kvm_read_guest() wrapper is safe, because the data has been *copied*, so
we don't need to rely on valid references to the memslot anymore.
Cc: Stable <stable@vger.kernel.org> # 4.8+
Reported-by: Jan Glauber <jan.glauber@caviumnetworks.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
VPIF capture driver expects card name to be set since it
uses it without checking for NULL. The commit which
introduced VPIF display and capture support added card
name only for display, not for capture.
Set it in platform data to probe driver successfully.
While at it, also fix the display card name to something more
appropriate.
Fixes: 85609c1ccd ("DaVinci: DM646x - platform changes for vpif capture and display drivers")
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
commit a16cb91ad9 ("[media] media: vpif: use a configurable
i2c_adapter_id for vpif display") removed hardcoded I2C adaptor
setting in VPIF driver, but missed updating platform data passed
from DM646x board.
Fix it.
Fixes: a16cb91ad9 ("[media] media: vpif: use a configurable i2c_adapter_id for vpif display")
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
commit b38434145b ("ARM: davinci: irqs: Correct McASP1 TX interrupt
definition for DM646x") inadvertently removed priority setting for
timer0_12 (bottom half of timer0). This timer is used as clockevent.
When INTPRIn register setting for an interrupt is left at 0, it is
mapped to FIQ by the AINTC causing the timer interrupt to not get
generated.
Fix it by including an entry for timer0_12 in interrupt priority map
array. While at it, move the clockevent comment to the right place.
Fixes: b38434145b ("ARM: davinci: irqs: Correct McASP1 TX interrupt definition for DM646x")
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Replace magic number with the proper IRQ_TYPE specifier to improve DT
readability.
Signed-off-by: Hernán Gonzalez <hernan@vanguardiasur.com.ar>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Replace magic number with the proper IRQ_TYPE specifier to improve DT
readability.
Signed-off-by: Hernán Gonzalez <hernan@vanguardiasur.com.ar>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Replace magic number with the proper IRQ_TYPE specifier to improve DT
readability.
Signed-off-by: Hernán Gonzalez <hernan@vanguardiasur.com.ar>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
GPIO_ACTIVE_LOW was being used to specify an interrupt, use
IRQ_TYPE_EDGE_RISING instead. This improves DT readability.
Signed-off-by: Hernán Gonzalez <hernan@vanguardiasur.com.ar>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The extra skb_copy_bits() buffer is not used anymore, therefore
remove the extra 4 byte stack space requirement.
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
1. Add support for USB OTG port on Origen board.
2. Allow earlycon on Rinato board.
3. Cleanup from obsolete properties.
4. Fix DTC warnings.
5. Remove Exynos5440 entirely.
6. Add mem-2-mem Scaler devices.
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Merge tag 'samsung-dt-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Samsung DTS ARM changes for v4.18
1. Add support for USB OTG port on Origen board.
2. Allow earlycon on Rinato board.
3. Cleanup from obsolete properties.
4. Fix DTC warnings.
5. Remove Exynos5440 entirely.
6. Add mem-2-mem Scaler devices.
* tag 'samsung-dt-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Update x and y properties for mms114 touchscreen
ARM: dts: exynos: Add mem-2-mem Scaler devices
ARM: dts: s3c64xx: Remove skeleton.dtsi and fix DTC warnings for /memory
ARM: dts: s3c24xx: Fix unnecessary address/size cells DTC warnings
ARM: dts: s3c24xx: Remove skeleton.dtsi and fix DTC warning for /memory
ARM: dts: exynos/s3c: Remove leading 0x and 0s from bindings notation
ARM: dts: exynos: Remove Exynos5440
ARM: dts: exynos: Remove unnecessary address/size properties in dp-controller of Exynos5
ARM: dts: exynos: Bring order in fixed-regulators naming in Midas boards
ARM: dts: exynos: Remove regulators node container in Origen and N710x
ARM: dts: exynos: Remove unnecessary address/size properties in Origen
ARM: dts: exynos: Remove unnecessary address/size properties in Midas boards
ARM: dts: exynos: Fix invalid node referenced by i2c20 alias in Peach Pit and Pi
ARM: dts: exynos: Move syscon poweroff and restart nodes under the PMU
ARM: dts: exynos: Remove obsolete clock properties from power domains
ARM: dts: exynos: Add serial path for Rinato board to get earlycon support
ARM: dts: exynos: Add support for USB OTG port on Origen board
Signed-off-by: Olof Johansson <olof@lixom.net>
- Set righ flashes on DNS-313
- Activate ATA1 on NAS4220B
- Set right harddisk triggers on the D-Link devices
- Fix all DTC warnings
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Merge tag 'gemini-dts-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt
DTS updates for the Gemini:
- Set righ flashes on DNS-313
- Activate ATA1 on NAS4220B
- Set right harddisk triggers on the D-Link devices
- Fix all DTC warnings
* tag 'gemini-dts-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: Fix DTC warnings
ARM: dts: Add second ATA to NAS4220B
ARM: dts: Fix bootargs for Gemini D-Link devices
ARM: dts: Fix the DNS-313 flash compatible
ARM: dts: Set DNS-685 LEDs to use better triggers
ARM: dtd: Set DNS-313 LEDs to use better triggers
ARM: dts: gemini: Fix "debounce-interval" property misspelling
Signed-off-by: Olof Johansson <olof@lixom.net>
changes for 4.18, please pull the following:
- Doug updates arch/arm/include/asm/cpuinfo.h such that this header file
can be used by both C and assembly code. This particular change will
also be included in a Sunxi pull request to support A83T SMP support.
- Doug also updates our DEBUG_LL routine to support newer chips such as
7278 which have a version 7 memory map which moves the registers from
physical address 0xf000_0000 down to 0x0800_0000. This requires us to
look up the processor MIDR and determine the base address from the
PERIPHBASE register.
- Florian updates the Brahma-B15 read-ahead cache implementation such
that it works on the Brahma-B53 CPUs, which also have an identical
read-ahead cache implementation, with a different set of offsets. He
also provides the Brahma-B15 MIDR definition such that it can be used by
other pieces of code in the future.
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Merge tag 'arm-soc/for-4.18/soc' of https://github.com/Broadcom/stblinux into next/soc
This pull request contains Broadcom ARM-based machine/platform files
changes for 4.18, please pull the following:
- Doug updates arch/arm/include/asm/cpuinfo.h such that this header file
can be used by both C and assembly code. This particular change will
also be included in a Sunxi pull request to support A83T SMP support.
- Doug also updates our DEBUG_LL routine to support newer chips such as
7278 which have a version 7 memory map which moves the registers from
physical address 0xf000_0000 down to 0x0800_0000. This requires us to
look up the processor MIDR and determine the base address from the
PERIPHBASE register.
- Florian updates the Brahma-B15 read-ahead cache implementation such
that it works on the Brahma-B53 CPUs, which also have an identical
read-ahead cache implementation, with a different set of offsets. He
also provides the Brahma-B15 MIDR definition such that it can be used by
other pieces of code in the future.
* tag 'arm-soc/for-4.18/soc' of https://github.com/Broadcom/stblinux:
ARM: brcmstb: Add support for the V7 memory map
ARM: add Broadcom Brahma-B15 main ID definition
ARM: add Broadcom Brahma-B53 main ID definition
ARM: Allow this header to be included by assembly files
ARM: B15: Update to support Brahma-B53
Signed-off-by: Olof Johansson <olof@lixom.net>
for 4.18, please pull the following:
- Stefan provides updates to the BCM2835 RNG Device Tree binding and
Device Tree node by adding its missing interrupt line.
- Rafal switches the Luxul XWC-1000 and the D-Link DIR-885L to the new
partitions syntax which allows specifying a partition parser
- Rafal also updates a bunch of BCM5301X Device Tree source files to a
more standard SPDX tag and dual GPL 2.0 and MIT. This is a follow-up
to this discussion with Greg:
https://lkml.org/lkml/2018/4/28/179
- Dan adds support for two Luxul devices: XAP-1610 (based on BCM47094)
and XWR-3150 V1 (similar to XWR-3100)
- Stefan provides a set of updates to the BCM283x Device Tree sources to
support the Raspberry Pi 3 B+ for both the ARM and ARM64 kernels. He
adds the required nodes for the LAN7515 USB Ethernet, Cypress CYW43455
BT/WiFi combo chip. Stefan also provides a few fixes for the PWM pin
assignment for RPi 3B and Zero/Zero W. Finally, Stefan adds the
missing GPIOs for controlling additional peripherals now that support
for the RPi 3 GPIO expander has landed
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Merge tag 'arm-soc/for-4.18/devicetree' of https://github.com/Broadcom/stblinux into next/dt
This pull request contains Broadcom ARM-based SoC Device Tree changes
for 4.18, please pull the following:
- Stefan provides updates to the BCM2835 RNG Device Tree binding and
Device Tree node by adding its missing interrupt line.
- Rafal switches the Luxul XWC-1000 and the D-Link DIR-885L to the new
partitions syntax which allows specifying a partition parser
- Rafal also updates a bunch of BCM5301X Device Tree source files to a
more standard SPDX tag and dual GPL 2.0 and MIT. This is a follow-up
to this discussion with Greg:
https://lkml.org/lkml/2018/4/28/179
- Dan adds support for two Luxul devices: XAP-1610 (based on BCM47094)
and XWR-3150 V1 (similar to XWR-3100)
- Stefan provides a set of updates to the BCM283x Device Tree sources to
support the Raspberry Pi 3 B+ for both the ARM and ARM64 kernels. He
adds the required nodes for the LAN7515 USB Ethernet, Cypress CYW43455
BT/WiFi combo chip. Stefan also provides a few fixes for the PWM pin
assignment for RPi 3B and Zero/Zero W. Finally, Stefan adds the
missing GPIOs for controlling additional peripherals now that support
for the RPi 3 GPIO expander has landed
* tag 'arm-soc/for-4.18/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: BCM5301X: Switch D-Link DIR-885L to the new partitions syntax
ARM: dts: BCM5301X: Relicense Asus RT-AC87U file to the GPL 2.0+ / MIT
ARM: dts: BCM5301X: Add DT for Luxul XAP-1610
ARM: dts: BCM5301X: Add DT for Luxul XWR-3150 V1
ARM: dts: BCM5301X: Relicense Buffalo files to the GPL 2.0+ / MIT
ARM: dts: BCM5301X: Relicense most DTS files to the GPL 2.0+ / MIT
arm64: dts: broadcom: Add reference to Raspberry Pi 3 B+
ARM: dts: bcm2837: Add Raspberry Pi 3 B+
dt-bindings: bcm: Add Raspberry Pi 3 B+
ARM: dts: bcm2837: Add missing GPIOs of Expander
ARM: dts: bcm283x: Fix PWM pin assignment
ARM: dts: BCM5301X: Switch Luxul XWC-1000 to the new fixed partitions syntax
ARM: bcm283x: Add missing interrupt for RNG block
dt-binding: rng: Add interrupt property for BCM2835
Signed-off-by: Olof Johansson <olof@lixom.net>
For PCI, the second and third cell in ranges specifies the upper and
lower target address for address translation. This target address will
be used to program the internal address translation unit (iATU).
The current device tree configuration will program the iATU to translate
CPU accesses to 0x08000000 to PCI address 0x0 (with TLP type MEM).
The device tree configuration also specifies that CPU acesses to
0x0fe00000 will be translated to PCI address 0x0 (with TLP type I/O).
We cannot have both I/O space and memory space at PCI address 0x0.
The PCI code already uses the CPU address when assigning addresses to
memory BARs, so for memory space the PCI address should be the same as
the CPU address. This also matches how all other device trees using
snps,dw-pcie are configured.
The existing configuration appears to work, even if it is incorrect.
For some reason the iATU doesn't obey the existing configuration,
and doesn't translate CPU accesses from 0x08000000 to PCI address 0x0.
The reason why the existing configuration works at all is probably
because the default behavior, when there is no match, is to use the
untranslated address. This happens to work for memory space, since
it's a 1:1 mapping. However, instead of relying on this behavior,
let's configure the iATU correctly.
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
4.18, please pull the following:
- Stefan provides a set of updates targeting the Raspberry Pi 3 B+
platform: LAN7515 USB Ethernet driver, Cypress CYW43455 Bluetooth and
he also enables the VCHIQ driver to help with continous testing on
kernelci.org.
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Merge tag 'arm-soc/for-4.18/defconfig' of https://github.com/Broadcom/stblinux into next/defconfig
This pull request contains Broadcom ARM-based SoCs defconfig changes for
4.18, please pull the following:
- Stefan provides a set of updates targeting the Raspberry Pi 3 B+
platform: LAN7515 USB Ethernet driver, Cypress CYW43455 Bluetooth and
he also enables the VCHIQ driver to help with continous testing on
kernelci.org.
* tag 'arm-soc/for-4.18/defconfig' of https://github.com/Broadcom/stblinux:
ARM: multi_v7_defconfig: Enable LAN and BT for RPi 3 B+
ARM: bcm2835_defconfig: Enable VCHIQ driver
ARM: bcm2835_defconfig: Enable LAN78XX driver
Signed-off-by: Olof Johansson <olof@lixom.net>
Remove the usage of IRQ_TYPE_NONE to fix loud warnings from
patch (83a86fbb5b "irqchip/gic: Loudly complain about
the use of IRQ_TYPE_NONE").
Signed-off-by: Thierry Escande <thierry.escande@linaro.org>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Tested-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The right string is msm8660 and there is also apq8060, but not
apq8660, so fix this.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The QSEE (trustzone) is started on IPQ4019 before Linux is started.
According to QCA, it is placed in in the the memory region
0x87e80000-0x88000000 and must not be accessed directly. There is an
additional memory region 0x87e00000-0x87E80000 smem which which can be used
for communication with the TZ. The driver for the latter is not yet ready
but it is still not allowed to use this memory region like any other
memory region.
Not reserving this memory region either leads to kernel crashes, kernel
hangs (often during the boot) or bus errors for userspace programs. The
latter happens when a program is using a memory region which is mapped to
these physical memory regions.
[ 571.758058] Unhandled fault: imprecise external abort (0xc06) at 0x01715ff8
[ 571.758099] pgd = cebec000
[ 571.763826] [01715ff8] *pgd=8e7fa835, *pte=87e7f75f, *ppte=87e7fc7f
Bus error
Signed-off-by: Sven Eckelmann <sven.eckelmann@openmesh.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
vbat_sns is needed to estimate a fairly accurate on chip voltage
and bat_therm is needed to produce an accurate percentage
from the estimated ocv.
Signed-off-by: Craig Tatlor <ctatlor97@gmail.com>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch marks all the gsbi i2c node at soc level dtsi, so that kernel
would not assume that its enabled and result in pin conflicts when gsbi
is used for UART or SPI.
Without this patch we see below pin conflict.
apq8064-pinctrl 800000.pinctrl: pin GPIO_20 already requested by
12450000.serial; cannot claim for 12460000.i2c
apq8064-pinctrl 800000.pinctrl: pin-20 (12460000.i2c) status -22
apq8064-pinctrl 800000.pinctrl: could not request pin 20 (GPIO_20)
from group gpio20 on device 800000.pinctrl
i2c_qup 12460000.i2c: Error applying setting, reverse things back
i2c_qup: probe of 12460000.i2c failed with error -22
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
platform_domain_notifier contains a variable sized array, which the
pm_clk_notify() notifier treats as a NULL terminated array:
for (con_id = clknb->con_ids; *con_id; con_id++)
pm_clk_add(dev, *con_id);
Omitting the initialiser for con_ids means that the array is zero
sized, and there is no NULL terminator. This leads to pm_clk_notify()
overrunning into what ever structure follows, which may not be NULL.
This leads to an oops:
Unable to handle kernel NULL pointer dereference at virtual address 0000008c
pgd = c0003000
[0000008c] *pgd=80000800004003c, *pmd=00000000c
Internal error: Oops: 206 [#1] PREEMPT SMP ARM
Modules linked in:c
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.16.0+ #9
Hardware name: Keystone
PC is at strlen+0x0/0x34
LR is at kstrdup+0x18/0x54
pc : [<c0623340>] lr : [<c0111d6c>] psr: 20000013
sp : eec73dc0 ip : eed780c0 fp : 00000001
r10: 00000000 r9 : 00000000 r8 : eed71e10
r7 : 0000008c r6 : 0000008c r5 : 014000c0 r4 : c03a6ff4
r3 : c09445d0 r2 : 00000000 r1 : 014000c0 r0 : 0000008c
Flags: nzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user
Control: 30c5387d Table: 00003000 DAC: fffffffd
Process swapper/0 (pid: 1, stack limit = 0xeec72210)
Stack: (0xeec73dc0 to 0xeec74000)
...
[<c0623340>] (strlen) from [<c0111d6c>] (kstrdup+0x18/0x54)
[<c0111d6c>] (kstrdup) from [<c03a6ff4>] (__pm_clk_add+0x58/0x120)
[<c03a6ff4>] (__pm_clk_add) from [<c03a731c>] (pm_clk_notify+0x64/0xa8)
[<c03a731c>] (pm_clk_notify) from [<c004614c>] (notifier_call_chain+0x44/0x84)
[<c004614c>] (notifier_call_chain) from [<c0046320>] (__blocking_notifier_call_chain+0x48/0x60)
[<c0046320>] (__blocking_notifier_call_chain) from [<c0046350>] (blocking_notifier_call_chain+0x18/0x20)
[<c0046350>] (blocking_notifier_call_chain) from [<c0390234>] (device_add+0x36c/0x534)
[<c0390234>] (device_add) from [<c047fc00>] (of_platform_device_create_pdata+0x70/0xa4)
[<c047fc00>] (of_platform_device_create_pdata) from [<c047fea0>] (of_platform_bus_create+0xf0/0x1ec)
[<c047fea0>] (of_platform_bus_create) from [<c047fff8>] (of_platform_populate+0x5c/0xac)
[<c047fff8>] (of_platform_populate) from [<c08b1f04>] (of_platform_default_populate_init+0x8c/0xa8)
[<c08b1f04>] (of_platform_default_populate_init) from [<c000a78c>] (do_one_initcall+0x3c/0x164)
[<c000a78c>] (do_one_initcall) from [<c087bd9c>] (kernel_init_freeable+0x10c/0x1d0)
[<c087bd9c>] (kernel_init_freeable) from [<c0628db0>] (kernel_init+0x8/0xf0)
[<c0628db0>] (kernel_init) from [<c00090d8>] (ret_from_fork+0x14/0x3c)
Exception stack(0xeec73fb0 to 0xeec73ff8)
3fa0: 00000000 00000000 00000000 00000000
3fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
3fe0: 00000000 00000000 00000000 00000000 00000013 00000000
Code: e3520000 1afffff7 e12fff1e c0801730 (e5d02000)
---[ end trace cafa8f148e262e80 ]---
Fix this by adding the necessary initialiser.
Fixes: fc20ffe121 ("ARM: keystone: add PM domain support for clock management")
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This series adds the devicetree configuration needed for pinctrl on
dra7 variants to use the SDHCI SDIO driver instead of mmc-omap-hs
driver. To use SDHCI, both the pins and the iodelay needs to be
configured.
This series is based on the related SDHCI drivers changes on a branch
set up by Ulf.
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Merge tag 'omap-for-v4.18/dt-sdhci-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Device tree changes for omap variants for SDHCI
This series adds the devicetree configuration needed for pinctrl on
dra7 variants to use the SDHCI SDIO driver instead of mmc-omap-hs
driver. To use SDHCI, both the pins and the iodelay needs to be
configured.
This series is based on the related SDHCI drivers changes on a branch
set up by Ulf.
* tag 'omap-for-v4.18/dt-sdhci-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (28 commits)
Documentation: ARM: Add new MMC requirements for DRA7/K2G
ARM: dts: dra7: Add high speed modes capability to MMC1/MMC2 dt node
ARM: dts: dra7: Use sdhci-omap programming model
ARM: dts: dra76-evm: Add wilink8 wlan support
ARM: dts: dra7-evm: Add wilink8 wlan support
ARM: dts: dra7-evm: Model EVM_3V6 regulator
ARM: dts: dra72-evm-common: Add wilink8 wlan support
ARM: dts: am57xx-beagle-x15/am57xx-idk: Fix pinctrl-names
ARM: dts: am574x-idk: Add pinmux configuration for MMC
ARM: dts: dra71-evm: Use pinctrl group from dra7-mmc-iodelay.dtsi to select pulldown
ARM: dts: am57xx-idk: Use pinctrl group from dra7-mmc-iodelay.dtsi to select pulldown
ARM: dts: dra7-mmc-iodelay: Add a new pinctrl group for clk line without pullup
ARM: dts: dra71-evm: Add "vqmmc-supply" property for mmc2
ARM: dts: dra72-evm-common: Remove mmc specific pinmux
mmc: sdhci-omap: Get IODelay values for 3.3v DDR mode
dt-bindings: sdhci-omap: Add pinctrl bindings
mmc: sdhci-omap: Add sdhci_omap specific ops for enable_sdio_irq
mmc: sdhci-omap: Add support for MMC/SD controller in k2g SoC
dt-bindings: sdhci-omap: Add K2G specific binding
mmc: sdhci-omap: Workaround for Errata i834
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Since commit 83a86fbb5b ("irqchip/gic: Loudly complain about the use of IRQ_TYPE_NONE")
kernel is complaining about the IRQ_TYPE_NONE usage which shouldn't
be used.
Use IRQ_TYPE_LEVEL_HIGH instead.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Since commit 83a86fbb5b ("irqchip/gic: Loudly complain about the use of IRQ_TYPE_NONE")
kernel is complaining about the IRQ_TYPE_NONE usage which shouldn't
be used.
Use IRQ_TYPE_LEVEL_HIGH instead.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Since commit 83a86fbb5b ("irqchip/gic: Loudly complain about the use of IRQ_TYPE_NONE")
kernel is complaining about the IRQ_TYPE_NONE usage which shouldn't
be used.
Use IRQ_TYPE_LEVEL_HIGH instead.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Since commit 83a86fbb5b ("irqchip/gic: Loudly complain about the use of IRQ_TYPE_NONE")
kernel is complaining about the IRQ_TYPE_NONE usage which shouldn't
be used.
Use IRQ_TYPE_LEVEL_HIGH instead.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Since commit 83a86fbb5b ("irqchip/gic: Loudly complain about the use of IRQ_TYPE_NONE")
kernel is complaining about the IRQ_TYPE_NONE usage which shouldn't
be used.
Use IRQ_TYPE_LEVEL_HIGH instead.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Enable support for the ARM Performance Monitor Units in the Cortex-A7
CPU cores on RZ/G1E by adding a device node for the PMU.
New Linux output:
hw perfevents: enabled with armv7_cortex_a7 PMU driver, 5 counters available
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable support for the ARM Performance Monitor Units in the Cortex-A15
CPU cores on RZ/G1M by adding a device node for the PMU.
New Linux output:
hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable support for the ARM Performance Monitor Units in the Cortex-A7
CPU cores on R-Car E2 by adding a device node for the PMU.
New Linux output:
hw perfevents: enabled with armv7_cortex_a7 PMU driver, 5 counters available
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable support for the ARM Performance Monitor Units in the Cortex-A15
CPU cores on R-Car M2-N by adding a device node for the PMU.
New Linux output:
hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable support for the ARM Performance Monitor Units in the Cortex-A15
CPU cores on R-Car V2H by adding a device node for the PMU.
New Linux output:
hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable support for the ARM Performance Monitor Units in the Cortex-A15
CPU cores on R-Car M2-W by adding a device node for the PMU.
New Linux output:
hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable support for the ARM Performance Monitor Units in the Cortex-A15
and Cortex-A7 CPU cores on R-Car H2 by adding device nodes for the two
PMUs.
New Linux output:
hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available
hw perfevents: /pmu-1: failed to probe PMU!
hw perfevents: /pmu-1: failed to register PMU devices!
The last two lines are due to the Cortex-A7 CPU cores being described in
DT, but not enabled by the firmware.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable support for the ARM Performance Monitor Units in the Cortex-A9
CPU core on RZ/A1H by adding a device node for the PMU.
New Linux output:
hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
According to table 7.3 ("List of Interrupt IDs") in the RZ/A1H Hardware
User's Manual rev. 3.00, the realtime clock interrupts are level not
edge interrupts.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
According to table 7.3 ("List of Interrupt IDs") in the RZ/A1H Hardware
User's Manual rev. 3.00, the watchdog timer interrupt is a level
interrupt.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The PMU node references two interrupts, but lacks the interrupt-affinity
property, which is required in that case:
hw perfevents: no interrupt-affinity property for /pmu, guessing.
Add the missing property to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The PMU node references two interrupts, but lacks the interrupt-affinity
property, which is required in that case:
hw perfevents: no interrupt-affinity property for /pmu, guessing.
Add the missing property to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
R-Mobile APE6 (r8a73a4) contains four Cortex-A15 and four Cortex-A7
cores, hence the second interrupt specifier cell for Private Peripheral
Interrupts should use "GIC_CPU_MASK_SIMPLE(8)", so GIC interrupts are
delivered to all 8 processor cores.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
R-Car H2 (r8a7790) contains four Cortex-A15 and four Cortex-A7 cores,
hence the second interrupt specifier cell for Private Peripheral
Interrupts should use "GIC_CPU_MASK_SIMPLE(8)", to make sure interrupts
can be delivered to all 8 processor cores.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Instead of hardcoding the input codes we can use the symbol name for
better readability.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Instead of hardcoding the input codes we can use the symbol name for
better readability.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Instead of hardcoding the input codes we can use the symbol name for
better readability.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
OF graph endpoint connections must be bidirectional and dtc will now
warn if they are not. i.MX7 based DTs have an error and generate
warnings:
Warning (graph_endpoint): /replicator/ports/port@0/endpoint: graph connection to node '/soc/tpiu@30087000/port/endpoint' is not bidirectional
Warning (graph_endpoint): /soc/tpiu@30087000/port/endpoint: graph connection to node '/replicator/ports/port@1/endpoint' is not bidirectional
This appears to be a copy-n-paste error and the TPIU input should be
connected to replicator port 0 instead of port 1.
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Single child nodes in OF graph don't need an address and now dtc will
warn about this:
Warning (graph_child_address): /soc/aips@50000000/ldb@53fa8008/lvds-channel@0: graph node has single child node 'port@0', #address-cells/#size-cells are not necessary
Since the LDB should always have an output port, fix the warning by
adding the output port, 2, to the DT.
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
OF graph endpoint nodes are supposed to be named 'endpoint' with an
address if there is more than one. The i.MX IPU binding graph has used
unique endpoint names instead which now generate dtc warnings:
Warning (graph_endpoint): /soc/ipu@2400000/port@2/disp0-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2400000/port@2/hdmi-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2400000/port@2/mipi-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2400000/port@2/lvds0-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2400000/port@2/lvds1-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2400000/port@3/disp1-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2400000/port@3/hdmi-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2400000/port@3/mipi-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2400000/port@3/lvds0-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2400000/port@3/lvds1-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2800000/port@2/disp0-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2800000/port@2/hdmi-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2800000/port@2/mipi-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2800000/port@2/lvds0-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2800000/port@2/lvds1-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2800000/port@3/hdmi-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2800000/port@3/mipi-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2800000/port@3/lvds0-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2800000/port@3/lvds1-endpoint: graph endpont node name should be 'endpoint'
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the 4th partiton named "mfg" with a block size 64K to store
manufacturing data.
Signed-off-by: Ken Lin <ken.lin@advantech.com.tw>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
It replaces underscore with hyphen in aliases name to fix DTC
alias_paths warning below, which is seen with various i.MX board dts
files when W=1 switch is on.
Warning (alias_paths): /aliases: aliases property name must include only lowercase and '-'
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Acked-By: Lothar Waßmann <LW@KARO-electronics.de>
Reviewed-by: Gary Bisson <gary.bisson@boundarydevices.com>
For soc level of clocks which are input to Clock Control Module, clock
driver expects them to be under 'clocks' container node. But for board
level clocks, this container is not really necessary. Let's drop it and
use an unique name for fixed rate clock, so that 'reg' property can be
saved as well.
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Acked-By: Lothar Waßmann <LW@KARO-electronics.de>
Instead of copying the whole node hierarchy, let's define a label for
clock osc26m in soc dtsi and use it for overriding clock-frequency.
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The clk32 clock is an input clock to CCM module, and should be defined
in soc dtsi rather than a board level dts. Let's move it into
imx1.dtsi.
While at it, let's drop unnecessary #address-cells/#size-cells from
'clocks' node to DTC warning avoid_unnecessary_addr_size seen with W=1
switch.
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
It drops unnecessary #address-cells/#size-cells from <soc>.dtsi 'clocks'
node to fix DTC warning avoid_unnecessary_addr_size seen with W=1
switch.
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
There is a debug LED(D11) connected to GPIO1_IO24,
add support for it.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.MX6SX Sabre Auto board has GPIO1_IO13 pin can be
MUXed as WDOG output to reset PMIC, add this function
support.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.MX6SX Sabre Auto board has two max7310 IO expander on I2C3 bus, add
support for them.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The board specific pinctrl function container node 'imx6x-sabreauto' is
not really necessary, since commit 5fcdf6a7ed ("pinctrl: imx: Allow
parsing DT without function nodes"). Let's drop it to save one level of
indentation.
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Let's drop the 'regulators' container node by giving VCC_SD3 an unique
name and removing 'reg' property, so that the fixed regulator can be
under root node directly.
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The 'fsl,uart-has-rtscts' property is deprecated and it is recommended
to use the generic 'uart-has-rtscts' property instead.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Remove unnecessary #address-cells/#size-cells from the switch nodes
to fix the following DTC warnings:
arch/arm/boot/dts/imx6q-b450v3.dtb: Warning (avoid_unnecessary_addr_size): /mdio-gpio/switch@0: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
GPIO_ACTIVE_LOW was being used to specify an interrupt, use
IRQ_TYPE_EDGE_RISING instead. This improves DT readability.
Signed-off-by: Hernán Gonzalez <hernan@vanguardiasur.com.ar>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
My recent Xen patch series introduces a new HYPERVISOR_memory_op to
support direct priv-mapping of certain guest resources (such as ioreq
pages, used by emulators) by a tools domain, rather than having to access
such resources via the guest P2M.
This patch adds the necessary infrastructure to the privcmd driver and
Xen MMU code to support direct resource mapping.
NOTE: The adjustment in the MMU code is partially cosmetic. Xen will now
allow a PV tools domain to map guest pages either by GFN or MFN, thus
the term 'mfn' has been swapped for 'pfn' in the lower layers of the
remap code.
Signed-off-by: Paul Durrant <paul.durrant@citrix.com>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
This removes the #address-cells and #size-cells properties from the
gpio-keys node in the da850-lego-ev3 device tree. These properties are
not needed since the child nodes don't have a reg property.
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This series adds support for am335x-pockebeagle and also add missing
pinctrl configuration for am335x evm and beagle bone variants.
There are also changes to add missing omap3 oscillator clocks for audio,
and fixes am437x tps65218 irq type used for various board specific
files.
There are also few minor fixes included that are not urgent. The
fixes for n8x0 audio also depend on driver changes, and the hp t410
mmc card detect mux typo is harmless.
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Merge tag 'omap-for-v4.18/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Device tree changes for omap variants for v4.18 merge window
This series adds support for am335x-pockebeagle and also add missing
pinctrl configuration for am335x evm and beagle bone variants.
There are also changes to add missing omap3 oscillator clocks for audio,
and fixes am437x tps65218 irq type used for various board specific
files.
There are also few minor fixes included that are not urgent. The
fixes for n8x0 audio also depend on driver changes, and the hp t410
mmc card detect mux typo is harmless.
* tag 'omap-for-v4.18/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: correct invalid I/O definition for MMC/SD card detect on T410
ARM: dts: omap2420-n810: Correct the audio codec (tlv320aic33) node
ARM: dts: omap2420-n810: Enable McBSP2 for audio
ARM: dts: am437x-sk-evm: Correct tps65218 irq type
ARM: dts: am437x-epos-evm: Correct tps65218 irq type
ARM: dts: am437x-cm-t43: Correct tps65218 irq type
ARM: dts: am437x-gp-evm: Correct tps65218 irq type
ARM: dts: Add am335x-pocketbeagle
ARM: dts: am33xx: Add pinmux data for mmc1 in am335x-evm, evmsk and beaglebone
ARM: dts: omap3-gta04: Add fixed 26MHz clock as fck for twl
ARM: dts: omap3-pandora: Add fixed 26MHz clock as fck for twl
ARM: dts: omap3-beagle-xm: Add fixed 26MHz clock as fck for twl
ARM: dts: logicpd-som-lv: Enable Touchscreen controller
Signed-off-by: Olof Johansson <olof@lixom.net>
