Commit Graph

12581 Commits

Author SHA1 Message Date
Anson Huang
819779a986 arm64: dts: imx8mn: Add CPU thermal zone support
i.MX8MN shares same thermal sensor with i.MX8MM, add thermal zone
support for i.MX8MN.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16 08:45:17 +08:00
Anson Huang
11699fd5ca arm64: dts: imx8mm: Add thermal zone support
Add thermal zone and tmu node to support i.MX8MM thermal
driver, ONLY cpu thermal zone is supported, and cpu cooling
is also added.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-12 22:26:04 +08:00
Alifer Moraes
1436b5bc25 arm64: dts: imx8mq-phanbell: Fix Ethernet PHY post-reset duration
i.MX8MQ Phanbell board uses Realtek RTL8211FD as Ethernet PHY.
Its datasheet states that the proper post reset duration should be at least 50 ms.

Fixes: f34d4bfab3 ("arm64: dts: imx8mq-phanbell: Add support for ethernet")
Signed-off-by: Alifer Moraes <alifer.wsdm@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 17:12:32 +08:00
Adam Ford
f0692bb890 arm64: dts: enable fspi in imx8mm dts
Pull in downstream patch from NXP repository to enable fspi device.

Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 17:12:32 +08:00
Silvano di Ninno
f5ff5a213b arm64: dts: imx8mn: align name for crypto child nodes
crypto child nodes should use the "jr" name (without an index),
as indicated in the DT binding.

Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 17:12:32 +08:00
Kuldeep Singh
035af82a5f arm64: dts: lx2160aqds: Add FSPI node properties
lx2160a-qds has 2 micron "mt35xu512aba" flashes of size 64M each
connected on A0 and B1 i.e on CS0 and CS3. Since flashes are connected
on different buses, only one flash can be probed at a time.

Add fspi node properties aligned with LX2160A-RDB fspi properties.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 16:34:29 +08:00
Kuldeep Singh
8755963aec arm64: dts: lx2160ardb: Update FSPI node properties
Update fspi node compatibles of LX2160A-RDB to "jedec,spi-nor" for
automatic detection of flash.

This also helps in fixing below warning:
spi-nor spi0.0: found mt35xu512aba, expected m25p80
spi-nor spi0.1: found mt35xu512aba, expected m25p80

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 16:34:11 +08:00
Vitor Massaru Iha
c5486819d2 arm64: dts: imx8mq-phanbell: Add gpio-fan/thermal support
It was based on Google Source Code for Coral Edge TPU Mendel release:
https://coral.googlesource.com/linux-imx/

It was tested on Coral Dev Board using this command:
  sudo stress --cpu 4 --timeout 3600

Signed-off-by: Vitor Massaru Iha <vitor@massaru.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 16:25:29 +08:00
Hou Zhiqiang
f93f1e721c arm64: dts: layerscape: add iommu-map property to pci nodes
Add the iommu-map property to the pci nodes so that the firmware
fixes it up with the required values thus enabling iommu for
devices connected over pci.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 16:15:48 +08:00
Anson Huang
2dfb4b1316 arm64: dts: imx8mp-evk: Enable pca6416 on i2c3 bus
Enable pca6416 on i.MX8MP EVK board's i2c3 bus.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 16:07:17 +08:00
Anson Huang
5e4a67ff7f arm64: dts: imx8mp-evk: Add i2c3 support
Enable i2c3 for i.MX8MP EVK board.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 16:07:07 +08:00
Anson Huang
ded9e59b39 arm64: dts: imx8mn-evk: Enable pca6416 on i2c3 bus
Enable pca6416 on i.MX8MN EVK board's i2c3 bus.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 16:05:39 +08:00
Anson Huang
d3f46dd47f arm64: dts: imx8mn-evk: Add i2c3 support
Enable i2c3 for i.MX8MN EVK board.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 16:05:28 +08:00
Martin Kepplinger
eef22bb129 arm64: dts: librem5-devkit: add lsm9ds1 mount matrix
The IMU chip on the librem5-devkit is not mounted at the "natural" place
that would match normal phone orientation (see the documentation for the
details about what that is).

Since the lsm9ds1 driver supports providing a mount matrix, we can describe
the orientation on the board in the dts:

Create a right-handed coordinate system (x * -1; see the datasheet for the
axis) and rotate 180 degrees around the y axis because the device sits on
the back side from the display.

Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:59:19 +08:00
Angus Ainslie (Purism)
5369d19145 arm64: dts: librem5-devkit: increase the VBUS current in the kernel
The poly fuses can handle 6V 4Amps so incease the kernel limts to 5V
3.5Amps.

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:59:17 +08:00
Angus Ainslie (Purism)
9dae8563bf arm64: dts: librem5-devkit: allow the redpine card to be removed
By adding broken-cd to the usdhc2 stanza the Redpine card can be
detected when the HKS is turned off and on.

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:59:14 +08:00
Angus Ainslie (Purism)
a2e47ba221 arm64: dts: librem5-devkit: add the regulators for DVFS
Specify which regulator is used for cpufreq DVFS.

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:59:12 +08:00
Angus Ainslie (Purism)
3ef506b3e6 arm64: dts: librem5-devkit: allow modem to wake the system from suspend
Connect the WoWWAN signal to a gpio key to wake up the system from suspend.

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:59:09 +08:00
Angus Ainslie (Purism)
7f7b799717 arm64: dts: librem5-devkit: add the simcom 7100 modem and audio
Add the simcom SIM7100 modem and the sai6 interface that connects it.

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:59:06 +08:00
Angus Ainslie (Purism)
c53f016663 arm64: dts: librem5-devkit: add the sgtl5000 i2c audio codec
Describe the sgtl5000 of the librem 5 devkit in devicetree.

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:59:03 +08:00
Angus Ainslie (Purism)
dde061b865 arm64: dts: librem5-devkit: add a vbus supply to usb0
Without a VBUS supply the dwc3 driver won't go into otg mode.

Fixes: eb4ea0857c ("arm64: dts: fsl: librem5: Add a device tree for the Librem5 devkit")
Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:58:47 +08:00
Rabeeh Khoury
f26d7effb7 arm64: dts: lx2160a-cex7: add on-module eeproms
This patch adds 4 eeprom support on i2c mux channel #0 -
1. Bootable 512Kbit eeprom at address 0x50.
2. Memory SO-DIMMs SPD channels at 0x51 (upper SO-DIMM) and 0x53.
3. 2Kb eeprom at 0x57 will be used by SolidRun to hold manufacturing
   data.

Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:58:13 +08:00
Russell King
1f5b12d4a9 arm64: dts: lx2160a-cex7: add support for ltc3882 regulator
Add support for the LTC3882 regulator so that the hardware monitoring
can be used with this device.  This regulator provides the 0.78V
supply for the LX2160A.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:58:13 +08:00
Anson Huang
455ae0c368 arm64: dts: imx8mp: Add src node
Add src node to support i.MX8MP reset controller.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:58:13 +08:00
Anson Huang
c18696de2c arm64: dts: imx8mq: Align iomuxc node name
Node name should be generic, use "pinctrl" instead of "iomuxc"
for all i.MX8M SoCs.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:58:13 +08:00
André Draszik
edd91ba6b8 arm64: dts: imx8mq: add snvs clock to pwrkey
On i.MX8MM, the SNVS requires a clock. This is similar to the clock
bound to the SNVS RTC node, but if the SNVS RTC driver isn't enabled,
then SNVS doesn't work, and as such the pwrkey driver doesn't
work (i.e. hangs the kernel, as the clock isn't enabled).

Also see commit ec2a844ef7
("ARM: dts: imx7s: add snvs rtc clock")
for a similar fix.

Signed-off-by: André Draszik <git@andred.net>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:58:13 +08:00
André Draszik
46770eae21 arm64: dts: imx8mm: add snvs clock to pwrkey
On i.MX8MM, the SNVS requires a clock. This is similar to the clock
bound to the SNVS RTC node, but if the SNVS RTC driver isn't enabled,
then SNVS doesn't work, and as such the pwrkey driver doesn't
work (i.e. hangs the kernel, as the clock isn't enabled).

Also see commit ec2a844ef7
("ARM: dts: imx7s: add snvs rtc clock")
for a similar fix.

Signed-off-by: André Draszik <git@andred.net>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:58:13 +08:00
Horia Geantă
d3a719e3d0 arm64: dts: imx8mp: add crypto node
Add node for CAAM - Cryptographic Acceleration and Assurance Module.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:58:13 +08:00
Anson Huang
f0cac1412c arm64: dts: imx: add i.MX8QXP thermal support
Add i.MX8QXP CPU thermal zone support.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:58:13 +08:00
Michael Walle
e46b08b099 arm64: dts: ls1028: sl28: explicitly enable network ports
Since commit b9213899d2b0 ("arm64: dts: ls1028a: disable all enetc ports
by default") all the network ports are disabled by default. This makes
sense, but now we have to enable them explicitly in the boards. Do so
for the sl28 module.

Since we are at it. Make sure the second port is only enabled for the
variant 4 of the module. Variant 3 has only one network port.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:58:13 +08:00
Claudiu Manoil
8aa80fc8bd arm64: dts: ls1028a: enable switch PHYs on RDB
Link the switch PHY nodes to the central MDIO controller PCIe endpoint
node on LS1028A (implemented as PF3) so that PHYs are accessible via
MDIO.

Enable SGMII AN on the Felix PCS by telling PHYLINK that the VSC8514
quad PHY is capable of in-band-status.

The PHYs are used in poll mode due to an issue with the interrupt line
on current revisions of the LS1028A-RDB board.

Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:58:13 +08:00
Claudiu Manoil
b1520d8b9b arm64: dts: ls1028a: add node for Felix switch
Add the switch device node, available on PF5, so that the switch port
sub-nodes (net devices) can be linked to corresponding board specific
phy nodes (external ports) or have their link mode defined (internal
ports).

The switch device features 6 ports, 4 with external links and 2
internally facing to the LS1028A SoC and connected via fixed links to 2
internal ENETC Ethernet controller ports.

Add the corresponding ENETC host port device nodes, mapped to PF2 and
PF6 PCIe functions. Since the switch only supports tagging on one CPU
port, only one port pair (swp4, eno2) is enabled by default and the
other, lower speed, port pair is disabled to prevent the PCI core from
probing them. If enabled, swp5 will be a fixed-link slave port.

DSA tagging can also be moved from the swp4-eno2 2.5G port pair to the
1G swp5-eno3 pair by changing the ethernet = <&enetc_port2> phandle to
<&enetc_port3> and moving it under port5, but in that case enetc_port2
should not be disabled, because it is the hardware owner of the Felix
PCS and disabling its memory would result in access faults in the Felix
DSA driver.

All ports are disabled by default, including the CPU port, and need to
be enabled on a per-board basis.

The phy-mode binding of the internal ENETC ports was modified from
"gmii" to "internal" to match the phy-mode of the internal-facing switch
ports connected to them. The ENETC driver does not perform any phy_mode
validation anyway, so the change is only cosmetic. Also, enetc_port2 is
defined as a fixed-link 1000 Mbps port even though it is 2500 Mbps (as
can be seen by the fact that it is connected to mscc_felix_port4). The
fact that it is currently defined as 1000 Mbps is an artifact of its
PHYLIB implementation instead of PHYLINK (the former can't describe a
fixed-link speed higher than what swphy can emulate from the Clause 22
MDIO spec).

The switch's INTB interrupt line signals:
- PTP TX timestamp availability
- TSN Frame Preemption

And don't forget to enable the 4MB BAR4 in the root complex ECAM space,
where the switch registers are mapped.

Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:58:13 +08:00
Vladimir Oltean
1a4bfe0f51 arm64: dts: ls1028a: disable all enetc ports by default
There are few boards that enable all ENETC ports, so instead of having
board DTs disable them, do so in the DTSI and have the boards enable the
ports they use.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:58:13 +08:00
Vladimir Oltean
8023321d30 arm64: dts: ls1028a: delete extraneous #interrupt-cells for ENETC RCIE
This specifier overrides the interrupt specifier with 3 cells from gic
(/interrupt-controller@6000000), but in fact ENETC is not an interrupt
controller, so the property is bogus.

Interrupts used by the children of the ENETC RCIE must use the full
3-cell specifier required by the GIC.

The issue has no functional consequence so there is no real reason to
port the patch to stable trees.

Fixes: 927d7f8575 ("arm64: dts: fsl: ls1028a: Add PCI IERC node and ENETC endpoints")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 15:58:13 +08:00
Anson Huang
80b06c5cae arm64: dts: imx8mn: Adjust 1.2GHz OPP voltage to OD mode
According to latest datasheet Rev.0, 10/2019, there is restriction
as below:

"If VDD_SOC/GPU/DDR = 0.95V, then VDD_ARM must be >= 0.95V."

As by default SoC is running at OD mode(VDD_SOC = 0.95V), so
VDD_ARM 1.2GHz OPP's voltage should be increased to 0.95V.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-24 15:52:05 +08:00
Anson Huang
fae58b1aab arm64: dts: imx8mp: Add system counter timer node
System counter timer is necessary as broadcast timer for cpu-idle,
add support for it.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-24 14:42:25 +08:00
Anson Huang
50d336b12f arm64: dts: imx8mp-evk: Add GPIO LED support
i.MX8MP EVK board has a GPIO LED to indicate status, add support for it.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-24 09:49:57 +08:00
Alifer Moraes
2462aaf13c arm64: dts: imx8mq-evk: add phy-reset-gpios for fec1
imx8mq-evk has a GPIO connected to AR8031 Ethernet PHY's reset pin.

Describe it in the device tree, following phy's datasheet reset duration of 10ms.

Tested booting via NFS.

Signed-off-by: Alifer Moraes <alifer.wsdm@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-24 09:37:19 +08:00
Alifer Moraes
3da63fceab arm64: dts: imx8mm-evk: add phy-reset-gpios for fec1
imx8mm-evk has a GPIO connected to AR8031 Ethernet PHY's reset pin.

Describe it in the device tree, following phy's datasheet reset duration of 10ms.

Tested booting via NFS.

Signed-off-by: Alifer Moraes <alifer.wsdm@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-24 09:31:24 +08:00
Hou Zhiqiang
b1ad0e7d45 arm64: dts: lx2160a: Add PCIe controller DT nodes
The LX2160A integrated 6 PCIe Gen4 controllers.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-24 09:25:52 +08:00
Michael Walle
c2d35ada10 arm64: dts: ls1028a: add missing SPI nodes
The LS1028A has three (dual) SPI controller. These are compatible with
the ones from the LS1021A. Add the nodes.

The third controller was tested on a custom board.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-19 10:16:24 +08:00
Alifer Moraes
f34d4bfab3 arm64: dts: imx8mq-phanbell: Add support for ethernet
Add support for ethernet on Google's i.MX 8MQ Phanbell

Signed-off-by: Alifer Moraes <alifer.wsdm@gmail.com>
Tested-by: Vitor Massaru Iha <vitor@massaru.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-17 14:18:28 +08:00
Anson Huang
9e847693c6 arm64: dts: freescale: Add i.MX8MP EVK board support
Add basic i.MM8MP EVK board support.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-17 14:13:47 +08:00
Anson Huang
6d9b8d2043 arm64: dts: freescale: Add i.MX8MP dtsi support
The i.MX8M Plus Media Applications Processor is part of the growing
mScale family targeting the consumer and industrial market. It brings
an effective Machine Learning and AI accelerator that enables a new
class of applications. It is built in Samsung 14LPP to achieve both
high performance and low power consumption and relies on a powerful
fully coherent core complex based on a quad core ARM Cortex-A53 cluster
and Cortex-M7 low-power coprocessor, audio digital signal processor,
machine learning and graphics accelerators.

Add the basic dtsi support for i.MX8MP.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-17 14:13:32 +08:00
Yangbo Lu
ab84bad5bb arm64: dts: ls1028a: support external trigger timestamp fifo of PTP timer
There is an external trigger timestamp fifo for PTP timer
of LS1028A. Add property fsl,extts-fifo for that.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-17 13:52:25 +08:00
Yangbo Lu
4671f9cf78 arm64: dts: ls1088a: support eMMC HS200 speed mode for RDB board
This patch is to add eMMC HS200 speed mode support on ls1088ardb
whose controller and peripheral circut support such capability.
And clocks dts property is needed for driver to get peripheral
clock value used for this speed mode.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-14 11:39:40 +08:00
Guido Günther
ea38ca9a26 arm64: dts: imx8mq-librem5-devkit: Add proximity sensor
Support for the vcnl4040 landet a while ago so add it and the
corresponding pinmux. The irq is currently unused in the driver so don't
configure it yet.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-14 10:24:58 +08:00
Peng Fan
4c9403540f arm64: dts: imx8mm: drop redundant interrupt-parent
There is interrupt-parent = <&gic> in root node, there is no
need set it again in node ddr-pmu@3d800000.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-14 09:03:33 +08:00
Peng Fan
70ea360330 arm64: dts: freescale: s32v234: use generic name bus
Per devicetree specification, generic names are recommended
to be used, such as bus.

AIPS is a AHB - IP bridge bus, so we could use bus as node name.

Script:
sed -i "s/\<aips@/bus@/" arch/arm64/boot/dts/freescale/*.dtsi
sed -i "s/\<aips-bus@/bus@/" arch/arm64/boot/freescale/*.dtsi

Cc: Phu Luu An <phu.luuan@nxp.com>
Cc: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
Cc: Mihaela Martinas <Mihaela.Martinas@freescale.com>
Cc: Dan Nica <dan.nica@nxp.com>
Cc: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-13 11:25:25 +08:00
Peng Fan
53458f8668 arm64: dts: imx8mn: Init rates and parents configs for clocks
Add the initial configuration for clocks that need default parent and rate
setting.

NoC sources from SYS PLL3, running at 600MHz. Audio AHB/IPG clks needs
to run at 400MHz for better performance.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-13 11:25:25 +08:00