2 Commits

Author	SHA1	Message	Date
Lucas Stach	47c298f792	gpu: ipu-v3: pre: only use internal clock gating ... By setting the SFTRST bit, the PRE will be held in the lowest power state with clocks to the internal blocks gated. When external clock gating is used (from the external clock controller, or by setting the CLKGATE bit) the PRE will sporadically fail to start. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Fixes: d2a3423258 ("gpu: ipu-v3: add driver for Prefetch Resolve Engine") Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>	2017-06-06 10:21:10 +02:00
Lucas Stach	d2a3423258	gpu: ipu-v3: add driver for Prefetch Resolve Engine ... This adds support for the i.MX6 QuadPlus PRE units. Currently only linear prefetch into SRAM is supported, other modes of operation like the tiled-to-linear conversion will be added later. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>	2017-03-15 15:42:35 +01:00