Commit Graph

784900 Commits

Author SHA1 Message Date
Shashank Sharma
d9facae6af drm/i915: Introduce CRTC output format
This patch adds an enum "intel_output_format" to represent
the output format of a particular CRTC. This enum will be
used to produce a RGB/YCBCR4:4:4/YCBCR4:2:0 output format
during the atomic modeset calculations.

V5:
- Created this separate patch to introduce and init output_format.
- Initialize parameters of output_format_str respectively (Jani N).
- Call it intel_output_format than crtc_output_format(Ville).
- Set output format in pipe_config for every encoder (Ville).
- Get rid of extra DRM_DEBUG_KMS during get_pipe_config (Ville)

V6: Rebase
V7: Fixed alignment warnings (checkpatch)
V8: Another check[atch warning for alignment
V9: Rebase
V10: Rebase on top of DSI restructure
V11: Addressed review comment from Ville
	- Set CRTC format for pre-HSW get_pipe_config() function too.
     Added Ville's R-B

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1539325394-20788-1-git-send-email-shashank.sharma@intel.com
2018-10-15 16:01:49 +03:00
Chris Wilson
a5e856a534 drm/i915: Large page offsets for pread/pwrite
Handle integer overflow when computing the sub-page length for shmem
backed pread/pwrite.

Reported-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: stable@vger.kernel.org
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181012140228.29783-1-chris@chris-wilson.co.uk
2018-10-15 12:52:03 +01:00
Jyoti Yadav
27d7aaae0f drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry.
DC5 and DC6 counter register tells about residency of DC5 and DC6.
Added the same in debugfs file.

v2 : Remove csr_version check.
     Added generic check regarding DC counters for  Gen9 onwards. (Rodrigo)
v3 : Simplified gen checks. (Chris)
v4 : Simplified "if" ladder for multiple gens.
v5 : Removed unnecessary comment.

Signed-off-by: Jyoti Yadav <jyoti.r.yadav@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1538762926-4880-1-git-send-email-jyoti.r.yadav@intel.com
2018-10-12 15:44:32 -07:00
James Zhu
9fc9c9b83a drm/amdgpu/vcn:Update SPG mode UVD status clear
Update Static Power Gate mode UVD status clear

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:55:59 -05:00
James Zhu
10b66b2c65 drm/amdgpu/vcn:Set VCPU busy after gate power during vcn SPG start
Set VCPU busy after gate power during vcn Static Power Gate start

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:55:52 -05:00
James Zhu
3d904ee4c3 drm/amdgpu/vcn:Apply new UMC enable for VNC DPG mode
Apply new UMC enable for VNC Dynamic Power Gate mode

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:55:44 -05:00
James Zhu
ad7187bfe1 drm/amdgpu/vcn:Remove SPG mode unused steps during vcn start
Remove Sitatic Power Gate mode unused steps during vcn start

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:55:37 -05:00
James Zhu
3d022a01fe drm/amdgpu/vcn:Add SPG mode Register XX check
Add Static Power Gate mode Register XX check

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:55:30 -05:00
James Zhu
a1584957ff drm/amdgpu/vcn:Move SPG mode mc resume after MPC control
Move Static Power Gate mode mc resume after MPC control

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:55:23 -05:00
James Zhu
92bbdaeb91 drm/amdgpu/vcn:Update SPG mode VCN global tiling
Update Static Power Gate mode VCN global tiling

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:55:16 -05:00
James Zhu
298dc39a3a drm/amdgpu/vcn:Update SPG mode VCN memory control
Update Static Power Gate  mode VCN memory control

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:55:09 -05:00
James Zhu
f5c5451fef drm/amdgpu/vcn:Apply new UMC enable for VNC DPG mode start
Apply new UMC enable for VNC Dynamic Power Gate mode start

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:55:01 -05:00
James Zhu
fe146873f5 drm/amdgpu/vcn:Remove DPG mode unused steps during vcn start
Remove Dynamic Power Gate mode unused steps during VCN start

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:54:55 -05:00
James Zhu
368d0dd81a drm/amdgpu/vcn:Add DPG mode Register XX check
Add Dynamic Power Gate mode Register XX check

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:54:47 -05:00
James Zhu
abd2d47c51 drm/amdgpu/vcn:Update DPG mode VCN global tiling registers
Update Dynamic Power Gate mode VCN global tiling registers

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:54:40 -05:00
James Zhu
6747c2021c drm/amdgpu/vcn:Update DPG mode VCN memory control
Update Dynamic Power Gate mode VCN memory control

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:54:33 -05:00
James Zhu
cce9d55585 drm/amdgpu/vcn:Reduce unnecessary local variable
Reduce unnecessary local variable.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:54:25 -05:00
James Zhu
15296db706 drm/amdgpu/vcn:Add ring W/R PTR check for VCN DPG mode stop
Add ring write/read pointer check for VCN dynamic power gate mode
stop,to make sure that no job is left in ring before turn off DPG mode.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:54:17 -05:00
James Zhu
5866fb929c drm/amdgpu/vcn:Update latest spg mode stop for VCN
Update latest static power gate mode stop function for VCN

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:54:09 -05:00
James Zhu
5327f025dc drm/amdgpu/vcn:Update latest UVD_MPC register for VCN
Update latest UVD_MPC register for VCN. Use defined
macro to replace value for readability.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:54:02 -05:00
James Zhu
b53d3049d2 drm/amdgpu/vcn:Add new register offset/mask for VCN
Add new register offset/mask for VCN to support
latest VCN implementation.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:53:52 -05:00
hersen wu
8c6259beda drm/amdgpu/display: dm/amdgpu: make dp phy debugfs for eDP
[WHY] dp debugfs file does not exist for eDP under
      /sys/kernel/debug/dri/0/eDP-1. the root is phy debugfs
      is created for dp connector only.
[HOW] for eDP connector, create phy debugfs too.

Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: David Francis <David.Francis@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:53:04 -05:00
Emily Deng
8bda1013dd drm/amdgpu: Set the default value about gds vmid0 size
For sriov, when first run windows guest, then run linux guest, the gds
vmid0 size will be reset to 0 by windows guest. So if the value has been
reset to 0, then set the value to the default value in linux guest.

v2:
Fixed value instead of reading mmGDS_VMID0_SIZE.

v3:
Set the default value of the switch.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:52:49 -05:00
Christian König
0efd2d2f68 drm/sched: fix timeout handling v2
We need to make sure that we don't race between job completion and
timeout.

v2: put revert label after calling the handling manually

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:52:32 -05:00
Christian König
b981c86f03 drm/sched: add drm_sched_start_timeout helper
Cleanup starting the timeout a bit.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:52:21 -05:00
Evan Quan
7a862028b9 drm/amd/powerplay: hint when power profile setting is not supported
Give user some hints when the power profile setting is not supported.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:22:16 -05:00
Evan Quan
73d0a44669 drm/amd/powerplay: translate power_profile mode to pplib workload type
Correctly translate the power profile specified by user to workload
type accepted by SMU fw.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:22:16 -05:00
Paulo Zanoni
b9117149fe drm/i915: promote ddb update message to DRM_DEBUG_KMS
This message is currently marked as DRM_DEBUG_ATOMIC. I would like it
to be DRM_DEBUG_KMS since it is more KMS than atomic, and this will
also make the message appear in the CI logs, which may or may not help
us with some FIFO underrun bugs.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181004231600.14101-7-paulo.r.zanoni@intel.com
2018-10-11 14:23:04 -07:00
Paulo Zanoni
9e44b180f8 drm/i915: don't write PLANE_BUF_CFG twice every time
We were writing to PLANE_BUF_CFG(pipe, plane_id) twice for every
platform, and we were even using different values on the gen10- planar
case. The first write is useless since it just gets replaced with the
next one, so kill it.

There's a lot to improve in the DDB code, but let's start by avoiding
the double write.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181004231600.14101-6-paulo.r.zanoni@intel.com
2018-10-11 14:23:04 -07:00
Paulo Zanoni
cbacc79db6 drm/i915: transition WMs ask for Selected Result Blocks
The transition watermarks ask for Selected Result Blocks (the real
value), not Result Blocks (the integer value). Given how ceilings are
applied in both the non-transition and the transition watermarks
calculations, we can get away with assuming that Selected Result
Blocks is actually Result Blocks minus 1 without any rounding errors.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181004231600.14101-5-paulo.r.zanoni@intel.com
2018-10-11 14:23:04 -07:00
Paulo Zanoni
077b5820af drm/i915: fix the watermark result selection on glk/gen10+
On these platforms we're supposed to unconditonally pick the method 2
result instead of the minimum.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181004231600.14101-4-paulo.r.zanoni@intel.com
2018-10-11 14:23:03 -07:00
Paulo Zanoni
91961a850d drm/i915: fix the transition minimums for gen9+ watermarks
The transition minimum is 14 blocks for gens 9 and 10, and 4 blocks
for gen 11. This minimum value is supposed to be added to the
configurable trans_amount. This matches both BSpec and additional
information provided by our HW engineers.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181004231600.14101-3-paulo.r.zanoni@intel.com
2018-10-11 14:23:03 -07:00
Paulo Zanoni
ef51e0a3eb drm/i915: DRM_FORMAT_C8 is not possible with Yf tiling
Function intel_framebuffer_init() checks for the possibilities during
framebuffer creation (addfb ioctl time). It is missing the fact that
the indexed format is not supported with Yf tiling.

It is worth noticing that skl_plane_format_mod_supported() correctly
handles for the C8/Yf combination, but this function runs during
modeset time, so we only reject the combination later.

Ville recently proposed a new IGT test that only uses addfb to assert
supported formats, so that IGT was failing. Add the check so we get
green squares right from the start after Ville merges his test.

Also drive-by fix the missing /* fall through */ in the chunk we
modified by just turning it into a "break;" since IMHO breaks are
easier to read than fall-throughs.

BSpec: 18565
Testcase: igt/kms_addfb_basic/expected-formats (not merged yet)
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180925001913.29460-1-paulo.r.zanoni@intel.com
2018-10-11 14:23:02 -07:00
Michal Wajdeczko
645ff9e371 drm/i915: Inject load failure inside intel_engines_init_mmio
We need extra load failure point to better test error path in
i915_driver_init_mmio.

Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20181011130008.24640-2-michal.wajdeczko@intel.com
2018-10-11 21:06:52 +01:00
Michal Wajdeczko
c5b083a1a1 drm/i915: Fix i915_driver_init_mmio error path
In case of the error we missed to call i915_mmio_cleanup
that matches earlier call to i915_mmio_setup.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20181011130008.24640-1-michal.wajdeczko@intel.com
2018-10-11 21:06:42 +01:00
José Roberto de Souza
c0c46ca461 drm/i915/aml: Add new Amber Lake PCI ID
This new AML PCI ID uses the same gen graphics as Coffe Lake not a
Kaby Lake one like the other AMLs.

So to make it more explicit renaming INTEL_AML_GT2_IDS to
INTEL_AML_KBL_GT2_IDS and naming this id as INTEL_AML_CFL_GT2_IDS.

v2:
- missed add new AML macro to INTEL_CFL_IDS()
- added derivated platform initials to AML macros

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180927010650.22731-1-jose.souza@intel.com
2018-10-11 10:59:34 -07:00
Chris Wilson
0b4bf7ca9b drm/i915/selftests: Disable shrinker across mmap-exhaustion
For mmap-exhaustion, we deliberately put the system under a large amount
of pressure to ensure that we are able to reap mmap-offsets from dead
objects. If background activity does that reaping for us, that defeats
the purpose of the test and in some cases will fail our sanity checks
(because of the fake activity we use to prevent the idle worker).

Fixes: 932cac10c8 ("drm/i915/selftests: Prevent background reaping of acti
ve objects")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181011103748.18387-1-chris@chris-wilson.co.uk
2018-10-11 16:04:09 +01:00
Dave Airlie
ca4b869240 Merge branch 'drm-next-4.20' of git://people.freedesktop.org/~agd5f/linux into drm-next
Add a new list.h helper for doing bulk updates.  Used by ttm.
- Fixes for display underflow on VI APUs at 4K with UVD running
- Endian fixes for powerplay on vega
- DC fixes for interlaced video
- Vega20 powerplay fixes
- RV/RV2/PCO powerplay fixes
- Fix for spurious ACPI events on HG laptops
- Fix a memory leak in DC on driver unload
- Fixes for manual fan control mode switching
- Suspend/resume robustness fixes
- Fix display handling on RV2
- VCN fixes for DPG on PCO
- Misc code cleanups and warning fixes

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181011014739.3117-1-alexander.deucher@amd.com
2018-10-11 14:53:45 +10:00
Dave Airlie
46972c03ab - Fix build failure without CONFIG_DRM_FBDEV_EMULATION (Arnd)
- Add Maxime to drm-misc maintainer group (Sean)
 
 Cc: Arnd Bergmann <arnd@arndb.de>
 Cc: Sean Paul <sean@poorly.run>
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Merge tag 'drm-misc-next-fixes-2018-10-10' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

- Fix build failure without CONFIG_DRM_FBDEV_EMULATION (Arnd)
- Add Maxime to drm-misc maintainer group (Sean)

Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Sean Paul <sean@poorly.run>
Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Sean Paul <sean@poorly.run>
Link: https://patchwork.freedesktop.org/patch/msgid/20181010203951.GA229456@art_vandelay
2018-10-11 14:51:57 +10:00
Dave Airlie
66c9e573ea Merge branch 'mediatek-drm-next-4.20' of https://github.com/ckhu-mediatek/linux.git-tags into drm-next
This include hdmi output support for mt2701 and mt7623.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: CK Hu <ck.hu@mediatek.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1538616148.28906.1.camel@mtksdaap41
2018-10-11 11:44:09 +10:00
Dave Airlie
7e6191d436 Merge branch 'linux-4.20' of git://github.com/skeggsb/linux into drm-next
Just initial HDMI 2.0 support, and a bunch of other cleanups.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Ben Skeggs <bskeggs@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CABDvA=mgEm9JxP7AX7Sff-AEs7a75M4SqwFHmLPZhJojm4k=OA@mail.gmail.com
2018-10-11 10:24:28 +10:00
Gustavo A. R. Silva
74a07c0a59 drm/nouveau/secboot/acr: fix memory leak
In case memory resources for *bl_desc* were allocated, release
them before return.

Addresses-Coverity-ID: 1472021 ("Resource leak")
Fixes: 0d46690155 ("drm/nouveau/secboot/acr: Remove VLA usage")
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Reviewed-by: John Hubbard <jhubbard@nvidia.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-10-11 09:54:10 +10:00
Ilia Mirkin
9340d77f53 drm/nouveau/disp: take sink support into account for exposing 594mhz
Scrambling is required for supporting any mode over 340MHz. If it's not
supported, reject any modes that would require it.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-10-11 09:54:10 +10:00
Ilia Mirkin
7a406f8a62 drm/nouveau/disp: add support for setting scdc parameters for high modes
When SCDC is supported, make sure that we configure the GPU and monitor
to the same parameters.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-10-11 09:54:10 +10:00
Ilia Mirkin
a971558c29 drm/nouveau/disp: keep track of high-speed state, program into clock
The register programmed by the clock method needs to contain a different
setting for the link speed as well as special divider settings.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-10-11 09:54:10 +10:00
Ilia Mirkin
4834e05049 drm/nouveau/disp/gm200-: add scdc parameter setter
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-10-11 09:54:10 +10:00
Ilia Mirkin
4126b99e74 drm/nouveau/disp: add a way to configure scrambling/tmds for hdmi 2.0
High pixel clocks are required to use a 40 TMDS divider instead of 10,
and even low ones may optionally use scrambling depending on device
support.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-10-11 09:54:10 +10:00
Lyude Paul
cfea88a4d8 drm/nouveau: Start using new drm_dev initialization helpers
Per the documentation in drm_get_pci_dev(), this function is deprecated
and shouldn't be used anymore. As it turns out, we're going to need to
stop using drm_get_pci_dev() anyway in order to allow us to turn off the
card before full system shutdowns, otherwise we'll hit race conditions
with userspace while trying to tear down the card on shutdown.

So, start using drm_dev_get() and drm_dev_put(), and just turn our
load/unload callbacks into open coded init/fini() functions.

Signed-off-by: Lyude Paul <lyude@redhat.com>
Cc: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-10-11 09:54:10 +10:00
Lyude Paul
c4cee69a44 drm/nouveau: Fix potential memory leak in nouveau_drm_load()
We forget to free drm in all instances of failure, and additionally also
forget to destroy the master client if the other client fails
initialization.

Signed-off-by: Lyude Paul <lyude@redhat.com>
Cc: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-10-11 09:54:10 +10:00
Lyude Paul
e15e4c13e5 drm/nouveau: Refactor nvXX_backlight_init()
There's literally no difference between any of the backlight init
functions besides the backlight properties they set and the backlight
callbacks that they set, so move all of the duplicated backlight init
code out of there and into nouveau_backlight_init().

This gets rid of a lot of copy pasta!

Changes since v1:
- Some of the pre-refactor callbacks were storing nv_encoder in callback
  data for the backlight devices that they registered, as opposed to
  nouveau_drm. This got missed and caused some bugs that didn't
  originally appear on my setup (NULL kernel derefs) for some reason.
  So, fix this by finding the nouveau_encoder in
  nouveau_backlight_init(), and using that as the callback data for all
  gens instead even if they don't care about the encoder.

Signed-off-by: Lyude Paul <lyude@redhat.com>
Cc: Jeffery Miller <jmiller@neverware.com>
Cc: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-10-11 09:54:10 +10:00