Core changes:
- Dropped the chained IRQ setup callback into GPIOLIB as we
got rid of the last users of that in this changeset.
New drivers:
- New driver for Ingenic X1830.
- New driver for Freescale i.MX8MP.
Driver enhancements:
- Fix all remaining Intel drivers to pass their IRQ chips
along with the GPIO chips.
- Intel Baytrail allocates its irqchip dynamically.
- Intel Lynxpoint is thoroughly rewritten and modernized.
- Aspeed AST2600 pin muxing and configuration is much
improved.
- Qualcomm SC7180 functions are updated and wakeup interrupt
map is provided.
- A whole slew of Renesas SH-PFC cleanups and improvements.
- Fix up the Intel DT bindings to use the generic YAML
DT bindings schema. (A first user of this.)
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAl4xQIkACgkQQRCzN7AZ
XXNchQ/8C4+SAMMcDQm4sIWV1duebynrXuebISqWMhAtYDRjCsRpGCqVSt+iSWod
z29pJ/sm0xpG1Bz0bmDZ4oFv7u7+J89a/0Kl4OqI1pbO97Uadu2qGmYxZf2tMtlH
CwWVOUAldU9scogRD6Z+qixYdRRpKufpaVaU7ooubHocmgRtzd/VCT2MX76c3w7j
1+yHjoAKM59jpOD/8oEucEYB+5ngyTiMXo3Nms/6ciq52GdtMLE8nK+t7dM+xNLL
hMQP95iQ2Xb+cM/bv+vdMyKF6vRxKkkeQ/hWcivGWgdI/BSFg0vCq0mWdc8qWp8k
VeIBaTVh5wuaAdkir9dHX/zt6TsRV8ktv88jW773/z4jHr/8PmQUyFMyEA1u1haP
yrC/vm4eL6QWCAZeATra5+5FoH2ljzwaY2rgeU0hNixjaF/aIp3GPci7+YmKHTIr
5zZTXKAeuC/nV7g77w4O9iwn+SHWPytWBrfNZ7unyV5fl4XHckY2vNBa/g8xkYyb
FBk642EwHRGCULb8m40+cB7TMUzk9aluXge1detJDbqlr2i+tSOWp1c3GSavLl1L
4qRAAS2j6de1H/EaoO7EcArVrSMdPgLdpRmwCMc2xvL0HOprl6y+5iL7x86ZtQHu
NHvgnjtw6Z6t9n28f5ZI1iEXUA6EHOHHc/sPPUqScCj4v85B25A=
=PnK5
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is the bulk of pin control changes, nothing too exciting about
this.
Some changes hit arch/sh and arch/arm but are well isolated and
acknowledged by the respective arch maintainers.
Core changes:
- Dropped the chained IRQ setup callback into GPIOLIB as we got rid
of the last users of that in this changeset.
New drivers:
- New driver for Ingenic X1830.
- New driver for Freescale i.MX8MP.
Driver enhancements:
- Fix all remaining Intel drivers to pass their IRQ chips along with
the GPIO chips.
- Intel Baytrail allocates its irqchip dynamically.
- Intel Lynxpoint is thoroughly rewritten and modernized.
- Aspeed AST2600 pin muxing and configuration is much improved.
- Qualcomm SC7180 functions are updated and wakeup interrupt map is
provided.
- A whole slew of Renesas SH-PFC cleanups and improvements.
- Fix up the Intel DT bindings to use the generic YAML DT bindings
schema (a first user of this)"
* tag 'pinctrl-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (99 commits)
pinctrl: madera: Remove extra blank line
pinctrl: qcom: Don't lock around irq_set_irq_wake()
pinctrl: mvebu: armada-37xx: use use platform api
gpio: Drop the chained IRQ handler assign function
pinctrl: freescale: Add i.MX8MP pinctrl driver support
dt-bindings: imx: Add pinctrl binding doc for i.MX8MP
pinctrl: tigerlake: Tiger Lake uses _HID enumeration
pinctrl: sunrisepoint: Add Coffee Lake-S ACPI ID
pinctrl: iproc: Use platform_get_irq_optional() to avoid error message
pinctrl: dt-bindings: Fix some errors in the lgm and pinmux schema
pinctrl: intel: Pass irqchip when adding gpiochip
pinctrl: intel: Add GPIO <-> pin mapping ranges via callback
pinctrl: baytrail: Replace WARN with dev_info_once when setting direct-irq pin to output
pinctrl: baytrail: Do not clear IRQ flags on direct-irq enabled pins
pinctrl: sunrisepoint: Add missing Interrupt Status register offset
pinctrl: sh-pfc: Split R-Car H3 support in two independent drivers
pinctrl: artpec6: fix __iomem on reg in set
pinctrl: ingenic: Use devm_platform_ioremap_resource()
pinctrl: ingenic: Factorize irq_set_type function
pinctrl: ingenic: Remove duplicated ingenic_chip_info structures
...
Core changes:
- Document the usecases for the kernelspace vs userspace
handling of GPIOs.
- Handle MSI (message signalled interrupts) properly in the
core hierarchical irqdomain code.
- Fix a rare race condition while initializing the descriptor
array.
New drivers:
- Xylon LogiCVC GPIO driver.
- WDC934x GPIO controller driver.
Driver improvements:
- Implemented suspend/resume in the Tegra driver.
- MPC8xx edge detection fixup.
- Properly convert ThunderX to use hierarchical irqdomain
with GPIOLIB_IRQCHIP on top of the revert of the previous
buggy switchover. This time it works (hopefully).
Misc:
- Drop a FMC remnant file <linux/ipmi-fru.h>
- A slew of fixes.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAl4xO9gACgkQQRCzN7AZ
XXO+lBAAv+viQVCj1IG6ajCWpsAECHY+U3xRl4ETy86Jx2uNJS48xmnYrjbqUH+h
r9HDi1Z5pyc14PtOEi01qVt87z612VmZbYNZ7tVBMXsGhN18wHRtC1y8GDtRSOxj
Zqeyu6zFn2WxGTbwGdjxeliVcuCUOLu+zsE/xnCmUWT0gkeMi62MpSR4/chtbh3g
Qu6lxtUcF2MN5IuGb6oCTnWQF+Bk9Pdib2HcKDqIGjQKbato7GLAEQdHY1K9vb7l
Wwovasg62CDMtXohBL6SZJJPWPhoK0MUNrKdPJPb3W2yJKgoiVyoNz8FRGmX2OUx
3v0elGP83v4jdmA6aHRfTmmcYKmEevxSFAxjCXw6pYEsPwf3VIr6TMkqANogA16S
Ag2eda/6gTiVKlFCVi9uxkLfVvYcdUTYWCjG0xOseVJRnWpXJbNwjCd493Qwhbim
zfziqoCYPZ6rLWcoDFkWZ27edfHCdPBlamnRyfHy5+1Y9s4jdcuMtp5B8tlvGuOp
55j/FSNvpPdmXIS0g8/C90nZ2WiAM9N5C1CyrLwgJvixHcMFhmKkJVnJ0zHHCOdC
Mu1CBdaGlH7o4+M+CIMU63q5YnHrmoZvZ3t5PPlCl5iUETuKGZmWBKzRv5qx3xld
iwSf8vfy+4bJGOF9xSgSvTOpoVEfsJAagKoBiT3WJuK9zi65vmI=
=3Glg
-----END PGP SIGNATURE-----
Merge tag 'gpio-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO updates from Linus Walleij:
"This is the bulk of GPIO changes for the v5.6 kernel cycle.
This is a pretty calm cycle so far, nothing special going on really.
Some more changes will come in from the irqchip and pin control trees.
I also deleted an orphan include file for FMC that was dangling since
subsystem was removed.
Core changes:
- Document the usecases for the kernelspace vs userspace handling of
GPIOs.
- Handle MSI (message signalled interrupts) properly in the core
hierarchical irqdomain code.
- Fix a rare race condition while initializing the descriptor array.
New drivers:
- Xylon LogiCVC GPIO driver.
- WDC934x GPIO controller driver.
Driver improvements:
- Implemented suspend/resume in the Tegra driver.
- MPC8xx edge detection fixup.
- Properly convert ThunderX to use hierarchical irqdomain with
GPIOLIB_IRQCHIP on top of the revert of the previous buggy
switchover. This time it works (hopefully).
Misc:
- Drop a FMC remnant file <linux/ipmi-fru.h>
- A slew of fixes"
* tag 'gpio-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (48 commits)
MAINTAINERS: Replace Tien Hock Loh as Altera PIO maintainer
gpiolib: hold gpio devices lock until ->descs array is initialised
gpio: aspeed-sgpio: fixed typos
gpio: mvebu: clear irq in edge cause register before unmask edge irq
gpiolib: Lower verbosity when allocating hierarchy irq
gpiolib: Remove duplicated function gpio_do_set_config()
gpio: Fix the no return statement warning
gpio: wcd934x: Add support to wcd934x gpio controller
gpiolib: remove set but not used variable 'config'
gpio: vx855: fixed a typo
gpio: mockup: sort headers alphabetically
gpio: mockup: update the license tag
gpio: Remove the unused flags
gpiolib: Set lockdep class for hierarchical irq domains
gpio: thunderx: Switch to GPIOLIB_IRQCHIP
gpiolib: Add the support for the msi parent domain
gpiolib: Add support for the irqdomain which doesn't use irq_fwspec as arg
gpio: Add use guidance documentation
dt-bindings: gpio: wcd934x: Add bindings for gpio
gpio: altera: change to platform_get_irq_optional to avoid false-positive error
...
- Convert to reasonable timeouts for all CMD6 commands (updates for BKOPS,
CACHE_FLUSH and INAND_CMD38_ARG_EXT_CSD) for eMMC
- Respect f_max clock rate at card initialization
- Add gpiod_toggle_active_low() API
- Consolidate slot-gpio code by using gpiod_toggle_active_low()
MMC host:
- Add pinctrl_select_default_state() API
- Consolidate pintctrl code by using pinctrl_select_default_state()
- mmci: Support any block sizes for SDIO for some variants
- mmci: Enable reset control for stm32_sdmmc
- mmc_spi: Toggle SPI_CS_HIGH polarity rather than hard-coding it
- renesas_sdhi: Add support for the r8a77961 variant
- renesas_sdhi: A few minor improvements
- rockchip-dw-mshc: Add support for the rk3308 variant
- sdhci: Enable support for external DMA controllers
- sdhci: Fixup error path when sending CMD12
- sdhci-brcmstb: Add support for 7216b0 variant
- sdhci-brcmstb: Add support for command queuing (CQHCI)
- sdhci-brcmstb: Add support for eMMC HS400ES mode
- sdhci-msm: Add support for the sc7180 variant
- sdhci-msm: Add support for command queuing (CQHCI)
- sdhci-of-at91: Add support for the SAM9x60 variant
- sdhci-of-at91: Improve support for tunings
- sdhci-of-esdhc: A few fixups for some clock related issues
- sdhci-omap: Add support for the am335x and the am437x variants
- sdhci-omap: Improve support for erase operations
- sdhci-omap: Add support for external DMA
-----BEGIN PGP SIGNATURE-----
iQJLBAABCgA1FiEEugLDXPmKSktSkQsV/iaEJXNYjCkFAl4uww8XHHVsZi5oYW5z
c29uQGxpbmFyby5vcmcACgkQ/iaEJXNYjClg8w/+Iv7Emp5oBmj0aY9BA2rWpOVj
rNPynDbRPI0qrrQPqXrZ/UdGDc6lgWHoeHdtv70u8WK8UEgi/OYw7PlE3eij9DGB
VcOnMyDg+Q6+Hq3vjvADWZzNrHGjdvjcGLxx386DHpTCsc1zD3EL2AG5e6i2/dfH
/FiSdfxVtRKw4GEn5jIDhHh63Av8mMCaPPfLw0DKxMQIuJ3atMvplgsr1KXIAydo
QTjKWxDJDJnKddtdHcnjP9Tck+ksrATDHHHQ9qGVFuOr3Yy9TgvOMlLo8vxJ364l
3bIwYfbaeE4/NKvqJGDzIF1jr4R5JoHZhvHLGqr+hUwMzxnwcbyCUSghk87oOqMt
FKAfKqwdEvVyq8QnmV9ArPXRnVmW4ElJN3edTeC00/7MoxWIx2TRHvEO5HejqPkq
+kw0NEIqWWiztV3/aa5zFJtlp8QphwsopvLzwEAJB+1G0tiSiNcfokrJ0AyODC5/
K4kXTGfQh28RSIr6ait7FNphyOug1WAvXqvt3ydY1lQPH0G36DMzLMx06mjgTA4O
DNYXzLoLPzRaPU4NvpHu3/axgRLYCN3CbGdx3U8GT9wgmerRyY/jW9ldSF7w6Wim
W0Zx1j3SdvmgafMXVsFcxMUC0IvfOFiMzXJ6DOus37xTYLRKW40wttg9SSxtm+9E
3IfRRlXnlkHVvTZ1ewI=
=L0cJ
-----END PGP SIGNATURE-----
Merge tag 'mmc-v5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC updates from Ulf Hansson:
"There are no updates for the MEMSTICK subsystem this time. But note
that I am also carrying a patch from the pinctrl tree, which has been
shared through an immutable branch.
Summary:
MMC core:
- Convert to reasonable timeouts for all CMD6 commands (updates for
BKOPS, CACHE_FLUSH and INAND_CMD38_ARG_EXT_CSD) for eMMC
- Respect f_max clock rate at card initialization
- Add gpiod_toggle_active_low() API
- Consolidate slot-gpio code by using gpiod_toggle_active_low()
MMC host:
- Add pinctrl_select_default_state() API
- Consolidate pintctrl code by using pinctrl_select_default_state()
- mmci: Support any block sizes for SDIO for some variants
- mmci: Enable reset control for stm32_sdmmc
- mmc_spi: Toggle SPI_CS_HIGH polarity rather than hard-coding it
- renesas_sdhi: Add support for the r8a77961 variant
- renesas_sdhi: A few minor improvements
- rockchip-dw-mshc: Add support for the rk3308 variant
- sdhci: Enable support for external DMA controllers
- sdhci: Fixup error path when sending CMD12
- sdhci-brcmstb: Add support for 7216b0 variant
- sdhci-brcmstb: Add support for command queuing (CQHCI)
- sdhci-brcmstb: Add support for eMMC HS400ES mode
- sdhci-msm: Add support for the sc7180 variant
- sdhci-msm: Add support for command queuing (CQHCI)
- sdhci-of-at91: Add support for the SAM9x60 variant
- sdhci-of-at91: Improve support for tunings
- sdhci-of-esdhc: A few fixups for some clock related issues
- sdhci-omap: Add support for the am335x and the am437x variants
- sdhci-omap: Improve support for erase operations
- sdhci-omap: Add support for external DMA"
* tag 'mmc-v5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (89 commits)
mmc: core: Default to generic_cmd6_time as timeout in __mmc_switch()
mmc: block: Use generic_cmd6_time when modifying INAND_CMD38_ARG_EXT_CSD
mmc: core: Specify timeouts for BKOPS and CACHE_FLUSH for eMMC
mmc: sdhci-cadence: remove unneeded 'inline' marker
dt-bindings: mmc: rockchip-dw-mshc: add description for rk3308
dt-bindings: mmc: convert rockchip dw-mshc bindings to yaml
dt-bindings: mmc: convert synopsys dw-mshc bindings to yaml
mmc: sdhci-msm: Add CQHCI support for sdhci-msm
mmc: sdhci: Let a vendor driver supply and update ADMA descriptor size
mmc: sdhci-of-esdhc: fix serious issue clock is always disabled
mmc: sdhci-of-esdhc: fix transfer mode register reading
mmc: sdhci-brcmstb: Fix incorrect switch to HS mode
mmc: sdhci-brcmstb: Add support for Command Queuing (CQE)
mmc: sdhci-brcmstb: Add shutdown callback
mmc: sdhci-brcmstb: Fix driver to defer on clk_get defer
mmc: sdhci-brcmstb: Add ability to use HS400ES transfer mode
dt-bindings: mmc: brcm,sdhci-brcmstb: Add support for 7216b0
mmc: core: limit probe clock frequency to configured f_max
mmc: sdhci-milbeaut: Remove redundant platform_get_irq error message
mmc: sdhci: fix an issue of mixing different types
...
If a driver consuming the GPIO chip is being probed at the same time as
the GPIO driver is registering the chip, it is possible for the
consuming driver to see the ->descs array in an uninitialised state.
For example, the gpio-keys-polled driver can fail like this:
kernel: gpiod_request: invalid GPIO (no device)
kernel: gpio-keys-polled PRP0001:07: failed to get gpio: -22
kernel: gpio-keys-polled: probe of PRP0001:07 failed with error -22
This patch makes gpiochip_add() hold the lock protecting gpio_devices
until it has finished setting desc->gdev on the newly inserted list
entry.
Signed-off-by: Dan Callaghan <dan.callaghan@opengear.com>
Link: https://lore.kernel.org/r/20200121001216.15964-1-dan.callaghan@opengear.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
gpiochip_set_chained_irqchip() would assign a chained handler
to a GPIO chip. We now populate struct gpio_irq_chip for all
chained GPIO irqchips so drop this function.
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20200113220800.77817-1-linus.walleij@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
In the current codes, the following 3 lines would be output to
the console for each irq line.
gpio gpiochip0: (gpio_thunderx): allocate IRQ 10, hwirq 0
gpio gpiochip0: (gpio_thunderx): found parent hwirq 245784
gpio gpiochip0: (gpio_thunderx): alloc_irqs_parent for 10 parent hwirq 245784
In general, there are about tens of irq lines for each gpio chip,
and then it would emit so many insignificant log in the boot process.
These infos are more suitable for the dbg purpose. So change these
to the dbg level. With this change, about 200 lines are suppressed
on my Marvell cn96xx board.
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Link: https://lore.kernel.org/r/20200120095625.25164-1-haokexin@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/gpio/gpiolib.c: In function gpio_set_config:
drivers/gpio/gpiolib.c:3053:16: warning:
variable config set but not used [-Wunused-but-set-variable]
commit d90f36851d ("gpiolib: have a single place
of calling set_config()") left behind this unused variable.
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Link: https://lore.kernel.org/r/20200108121117.45060-1-yuehaibing@huawei.com
Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
I see the following lockdep splat in the qcom pinctrl driver when
attempting to suspend the device.
============================================
WARNING: possible recursive locking detected
5.4.2 #2 Tainted: G S
--------------------------------------------
cat/6536 is trying to acquire lock:
ffffff814787ccc0 (&irq_desc_lock_class){-.-.}, at: __irq_get_desc_lock+0x64/0x94
but task is already holding lock:
ffffff81436740c0 (&irq_desc_lock_class){-.-.}, at: __irq_get_desc_lock+0x64/0x94
other info that might help us debug this:
Possible unsafe locking scenario:
CPU0
----
lock(&irq_desc_lock_class);
lock(&irq_desc_lock_class);
*** DEADLOCK ***
May be due to missing lock nesting notation
7 locks held by cat/6536:
#0: ffffff8140e0c420 (sb_writers#7){.+.+}, at: vfs_write+0xc8/0x19c
#1: ffffff8121eec480 (&of->mutex){+.+.}, at: kernfs_fop_write+0x128/0x1f4
#2: ffffff8147cad668 (kn->count#263){.+.+}, at: kernfs_fop_write+0x130/0x1f4
#3: ffffffd011446000 (system_transition_mutex){+.+.}, at: pm_suspend+0x108/0x354
#4: ffffff814302b970 (&dev->mutex){....}, at: __device_suspend+0x16c/0x420
#5: ffffff81436740c0 (&irq_desc_lock_class){-.-.}, at: __irq_get_desc_lock+0x64/0x94
#6: ffffff81479b8c10 (&pctrl->lock){....}, at: msm_gpio_irq_set_wake+0x48/0x7c
stack backtrace:
CPU: 4 PID: 6536 Comm: cat Tainted: G S 5.4.2 #2
Call trace:
dump_backtrace+0x0/0x174
show_stack+0x20/0x2c
dump_stack+0xdc/0x144
__lock_acquire+0x52c/0x2268
lock_acquire+0x1dc/0x220
_raw_spin_lock_irqsave+0x64/0x80
__irq_get_desc_lock+0x64/0x94
irq_set_irq_wake+0x40/0x144
msm_gpio_irq_set_wake+0x5c/0x7c
set_irq_wake_real+0x40/0x5c
irq_set_irq_wake+0x70/0x144
cros_ec_rtc_suspend+0x38/0x4c
platform_pm_suspend+0x34/0x60
dpm_run_callback+0x64/0xcc
__device_suspend+0x314/0x420
dpm_suspend+0xf8/0x298
dpm_suspend_start+0x84/0xb4
suspend_devices_and_enter+0xbc/0x628
pm_suspend+0x214/0x354
state_store+0xb0/0x108
kobj_attr_store+0x14/0x24
sysfs_kf_write+0x4c/0x64
kernfs_fop_write+0x158/0x1f4
__vfs_write+0x54/0x18c
vfs_write+0xdc/0x19c
ksys_write+0x7c/0xe4
__arm64_sys_write+0x20/0x2c
el0_svc_common+0xa8/0x160
el0_svc_compat_handler+0x2c/0x38
el0_svc_compat+0x8/0x10
This is because the msm_gpio_irq_set_wake() function calls
irq_set_irq_wake() as a backup in case the irq comes in during the path
to idle. Given that we're calling irqchip functions from within an
irqchip we need to set the lockdep class to be different for this child
controller vs. the default one that the parent irqchip gets.
This used to be done before this driver was converted to hierarchical
irq domains in commit e35a6ae0eb ("pinctrl/msm: Setup GPIO chip in
hierarchy") via the gpiochip_irq_map() function. With hierarchical irq
domains this function has been replaced by
gpiochip_hierarchy_irq_domain_alloc(). Therefore, set the lockdep class
like was done previously in the irq domain path so we can avoid this
lockdep warning.
Fixes: fdd61a013a ("gpio: Add support for hierarchical IRQ domains")
Cc: Thierry Reding <treding@nvidia.com>
Cc: Brian Masney <masneyb@onstation.org>
Cc: Lina Iyer <ilina@codeaurora.org>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200114231103.85641-1-swboyd@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
If the gpio's parent irqdomain is a msi irqdomain, we should ignore
the EEXIST error returned by the msi irqdomain because all the msi
interrupts have already been allocated.
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Link: https://lore.kernel.org/r/20200114082821.14015-4-haokexin@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Some gpio's parent irqdomain may not use the struct irq_fwspec as
argument, such as msi irqdomain. So rename the callback
populate_parent_fwspec() to populate_parent_alloc_arg() and make it
allocate and populate the specific struct which is needed by the
parent irqdomain.
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Link: https://lore.kernel.org/r/20200114082821.14015-3-haokexin@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
- improvements in the gpio-pca953x driver
- use platform_irq_count() in gpio-mvebu and gpio-bcm-kona
- remove unneeded MODULE_VERSION() usage in the gpio directory
- irq-related improvements in gpio-tegra driver
- several improvements for the core subsystem code: fix confusing indentation,
fix int type casting, unduplicate code in several places
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEFp3rbAvDxGAT0sefEacuoBRx13IFAl4UZxEACgkQEacuoBRx
13LPnhAAyrG/Vnm3UN7bs/W8hM+D4Jt/yFTcvrh+/Ua7DFYCIvptAsiGR4Y+hmdI
Dq2J4kZw7TaL2vw8/WQ3Ij6NHBIcqnVzT8x8Id6S2WNb3jqEmuzUpGLXpUEIi+U1
SUXT8amyNAJVlVdAXOk79zAsWML6AMkats38JR5d18Nf4+CNzjdu/2GL80MtRQLa
CJ2X99A2BzcUed5/YwOIYwapK6IzFmPYwLyXcJr/WDY14rqWjKJtax5djml1Xrfb
FyLdUPUC9GRD9/IQmJJTcL2LM2078yqaKbqzqiZ/SVQka3HS4K95N6LiZUt5RBt5
vmBMXF09qXwGsUYo6VHSDQfRxp9wsw0ukfrapVK2ytRInWPTLbGbrXKrm6uA/FuW
IYMsjtrLYuxAQNt67kahW2/+zlm63kRUdtmt9QHFMgNA8MESbJf0ds2X8seDyGhq
Eh8+hOm1I20lbAkW2VksJn1b+e2GEszhgyUEZSv0Ew9xwiOa11SRnWjicNql0TUR
zbViz9HRnB1QNNFpwYEJz4Ke38URdC9QT9H91u8BWPo6emopRm0KamxWag62WjCE
vy4uJJUp2L8uMJQ/3JqjxCUyOkZ0afnJwCdysNbZqNs19g3JpjIbIHV8wxXA53Aq
IX9PDVhq+AEa+o3wHwvB4xGY903IC9iGyEzeb8rOmiaDH/zgGng=
=ia2k
-----END PGP SIGNATURE-----
Merge tag 'gpio-updates-for-v5.6-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into devel
gpio updates for v5.6
- improvements in the gpio-pca953x driver
- use platform_irq_count() in gpio-mvebu and gpio-bcm-kona
- remove unneeded MODULE_VERSION() usage in the gpio directory
- irq-related improvements in gpio-tegra driver
- several improvements for the core subsystem code: fix confusing indentation,
fix int type casting, unduplicate code in several places
Unduplicate the offset check by simply calling gpiochip_get_desc() and
checking its return value.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Unduplicate the ngpio check by simply calling gpiochip_get_desc() and
checking its return value.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Unduplicate the ngpio check by simply calling gpiochip_get_desc() and
checking its return value.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
gpiochip_get_desc() takes a u16 hwnum, but it turns out most users don't
respect that and usually pass an unsigned int. Since implicit casting to
a smaller type is dangerous - let's change the type of hwnum to unsigned
int in gpiochip_get_desc() and in gpiochip_request_own_desc() where the
size of hwnum is not respected either and who's a user of the former.
This is safe as we then check the hwnum against the number of lines
before proceeding in gpiochip_get_desc().
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Instead of calling the gpiochip's set_config() callback directly and
checking its existence every time - just add a new routine that performs
this check internally. Call it in gpio_set_config() and
gpiod_set_transitory(). Also call it in gpiod_set_debounce() and drop
the check for chip->set() as it's irrelevant to this config option.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
There's a confusing indention in gpiochip_add_data_with_key(), which
could be misinterpreted on a quick walkthrough. Fixing this in order
to improve code readability a bit.
Signed-off-by: Enrico Weigelt, metux IT consult <info@metux.net>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Add possibility to toggle active-low flag of a gpio descriptor. This is
useful for compatibility code, where defaults are inverted vs DT gpio
flags or the active-low flag is taken from elsewhere.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Link: https://lore.kernel.org/r/7ce0338e01ad17fa5a227176813941b41a7c35c1.1576031637.git.mirq-linux@rere.qmqm.pl
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
- fix gpio-xtensa build failure
- fix a regression in gpio-mockup
- fix a gcc warning in gpio-aspeed
- fix a section mismatch problem in xgs-iproc
- fix a problem with emulated open-drain outputs in gpiolib core
- switch to bitops in gpio-pca953x after converting the driver to
using bitmap
- add a missed file to MAINTAINERS entry
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEFp3rbAvDxGAT0sefEacuoBRx13IFAl3zYMcACgkQEacuoBRx
13K7ww/+IYdVcK6rL8i+ETS1PeABZQ8LOjmwKyCi3P5PfjzV8sdNf9JOEoxFpNTE
Uj0zSdchnaxD8foQC/ykuL5X+yIuw/eImXd+KvRrToNW8XhQ2anNkXER6jLZc2Ie
4GxZa8ktmguu2935wAYXv9CbXj0uFkeKGpt64WgM8/UD2qi2U6NLPuMU549tEwDg
kVRxCD21boVBsYZRdIcUh4NNZWK6KZfvkw+j9+573T441zks8UU6gb7D82O6YaQs
8iqu8ZQhG4lQXHuY1eD4lHptmzGZqG40inPp+TR5cEhp4KUJrvgZYTeFYav18kyn
AvYPn71HKoV3XiaYlsQ5Pvnorq+24QGZX2ylxU/gCu4YfLBrBVxbrk8IbEBIdwkh
PiIuADn2VGzbT024D7/wQelhvcgee2+w8uWEa8woYCbjI+DwPVpaRlCJaXrHnBVO
Z0B+mblD7bnDTuMWPluqC4slmnJbweKSIRjBkEzBXLRJPq6Lc4uo47Unf4CefElX
36OkeZHOPgs7RDTj038VKjIKba0qbEuoEkDvNZ8CBVAakDfrECGOCqTkGf5hEAZ7
dZXY/cSbkeCnp8aADyCgZ2pRoX7gAklSaPOPf4mX30XCuMG7di27w5DXQXCML/3k
sPj9CF+3B7j5oXxyeookzfLKq+FH5x6iOBa35uPr3abh9HiLS7k=
=dqqa
-----END PGP SIGNATURE-----
Merge tag 'gpio-v5.5-rc2-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into fixes
gpio fixes for v5.5-rc2
- fix gpio-xtensa build failure
- fix a regression in gpio-mockup
- fix a gcc warning in gpio-aspeed
- fix a section mismatch problem in xgs-iproc
- fix a problem with emulated open-drain outputs in gpiolib core
- switch to bitops in gpio-pca953x after converting the driver to
using bitmap
- add a missed file to MAINTAINERS entry
We have for some time the assign_bit() API to replace open coded
if (foo)
set_bit(n, bar);
else
clear_bit(n, bar);
Use this API in GPIO library code.
No functional change intended.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20191204194229.64251-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The string literal "gpiochip" is used in several places.
Add a definition for it, and use it everywhere, to make sure everything
stays in sync.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191127084253.16356-2-geert+renesas@glider.be
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
Reviewed-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
gpiolib has a corner case with open drain outputs that are emulated.
When such outputs are outputting a logic 1, emulation will set the
hardware to input mode, which will cause gpiod_get_direction() to
report that it is in input mode. This is different from the behaviour
with a true open-drain output.
Unify the semantics here.
Cc: <stable@vger.kernel.org>
Suggested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
When a GPIO offset in a lookup table is out-of-range, the printed error
message (1) does not include the actual out-of-range value, and (2)
contains an off-by-one error in the upper bound.
Avoid user confusion by also printing the actual GPIO offset, and
correcting the upper bound of the range.
While at it, use "%u" for unsigned int.
Sample impact:
-requested GPIO 0 is out of range [0..32] for chip e6052000.gpio
+requested GPIO 0 (45) is out of range [0..31] for chip e6052000.gpio
Fixes: 2a3cf6a359 ("gpiolib: return -ENOENT if no GPIO mapping exists")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191127095919.4214-1-geert+renesas@glider.be
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
There should be spaces between logical operators and their operands.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Prerequisite patch against GPIO library to register pin ranges in time.
* Second attempt to fix Intel Merrifield GPIO driver to utilize irqchip.
The following is an automated git shortlog grouped by driver:
gpiolib:
- Introduce ->add_pin_ranges() callback
merrifield:
- Pass irqchip when adding gpiochip
- Add GPIO <-> pin mapping ranges via callback
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEqaflIX74DDDzMJJtb7wzTHR8rCgFAl3MBkoACgkQb7wzTHR8
rCg8Ew//TacyTIH1Q6LLrGw92lsGl1F7Svl/dwM2Oz1Crhr2MgPpYAJfTLcYNVZL
j1TRfj8bHHdxKsK3cnabgwmjf4VYvEgQoY8PhJYhEw+VeKMZutHEVMKFiKtyzw0J
KjIj30RJ82pQxRXdqz1urSKbYNm85RSpaSlj3Tf/Qe5Kvww9d8BNQ0qd8zoJCZ8c
mgjNq3IpdPCvW11BJo6OtZfy4rM+99wOpp9uW2uCrgymsvJrZo/6mbPIb5S2SSIV
4a75QISPZR2RRPUPO5tMyU88icuBlEnWOyPYyk/2Y7VwrW716XLcKHo+qygTyia3
XH+MWHOqDjIBz8BcB2zXy1D5OBzttbNlUQ3PZqLiceX5+AelnQ3NW4SqT2WsLrI+
HHcSxgr+GhShdUGnYKr5PRr3JxbHiarEUsIDdJBWQsHYqT5MT2oi/YXlP65cnWdh
hFSwepwUK1VQY4dFHXE1hCbEQFg8GBJkQtXWw8ObzXhw+3Gae/B9TBfCHI1fg9rP
vsSaprenaIxMsc7h0ZK9B8gUZSCL+vGhxurh10KSu2+hMSqLPziR5CPh+eMxvTig
qbLym1tQAriKNLqdz47ZGPdcxC3XGXAJHKeS0wt23NFzSQ8jHJS+3+yLIHB7w2ae
7TpISEdDMqiF9mffzBzIxQdi17/FEukI0SOIPKoPq2tueNEHUhc=
=BRPx
-----END PGP SIGNATURE-----
Merge tag 'intel-gpio-v5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel into devel
intel-gpio for v5.5-1
* Prerequisite patch against GPIO library to register pin ranges in time.
* Second attempt to fix Intel Merrifield GPIO driver to utilize irqchip.
The following is an automated git shortlog grouped by driver:
gpiolib:
- Introduce ->add_pin_ranges() callback
merrifield:
- Pass irqchip when adding gpiochip
- Add GPIO <-> pin mapping ranges via callback
When IRQ chip is being added by GPIO library, the ACPI based platform expects
GPIO <-> pin mapping ranges to be initialized in order to correctly initialize
ACPI event mechanism on affected platforms. Unfortunately this step is missed.
Introduce ->add_pin_ranges() callback to fill the above mentioned gap.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Tested-by: Hans de Goede <hdegoede@redhat.com>
Add the GPIOHANDLE_SET_CONFIG_IOCTL to the gpio chardev.
The ioctl allows some of the configuration of a requested handle to be
changed without having to release the line.
The primary use case is the changing of direction for bi-directional
lines.
Based on initial work by Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Kent Gibson <warthog618@gmail.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Move validation of line handle flags into helper function.
This reduces the size and complexity of linehandle_create and allows the
validation to be reused elsewhere.
Signed-off-by: Kent Gibson <warthog618@gmail.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Allow pull up/down bias to be set on output lines.
Use case is for open source or open drain applications where
internal pull up/down may conflict with external biasing.
Signed-off-by: Kent Gibson <warthog618@gmail.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Allow pull up/down bias to be disabled, allowing the line to float
or to be biased only by external circuitry.
Use case is for where the bias has been applied previously, either
by default or by the user, but that setting may conflict with the
current use of the line.
Signed-off-by: Kent Gibson <warthog618@gmail.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Add support for pull up/down to lineevent_create.
Use cases include receiving asynchronous presses from a
push button without an external pull up/down.
Signed-off-by: Kent Gibson <warthog618@gmail.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Add pull-up/pull-down flags to the gpio line get and
set ioctl() calls. Use cases include a push button
that does not have an external resistor.
Addition use cases described by Limor Fried (ladyada) of
Adafruit in this PR for Adafruit_Blinka Python lib:
https://github.com/adafruit/Adafruit_Blinka/pull/59
Signed-off-by: Drew Fustini <drew@pdp7.com>
[Kent: added BIAS to GPIO flag names and restrict application to input
lines]
Signed-off-by: Kent Gibson <warthog618@gmail.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
This reverts commit 8c550e94b8.
This was prematurely applied and we need to back it out to merge
a better version of the development track for this feature.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
of_gpiochip_add(), when fails, calls gpiochip_remove_pin_ranges().
ADD:
gpiochip_add_data_with_key() ->
of_gpiochip_add() -> (ERROR path)
gpiochip_remove_pin_ranges()
At the same time of_gpiochip_remove() calls exactly the above mentioned
function unconditionally and so does gpiochip_remove().
REMOVE:
gpiochip_remove() ->
gpiochip_remove_pin_ranges()
of_gpiochip_remove() ->
gpiochip_remove_pin_ranges()
Since gpiochip_remove() calls gpiochip_remove_pin_ranges() unconditionally,
we have duplicate call to the same function when it's not necessary.
Move gpiochip_remove_pin_ranges() from of_gpiochip_add() to gpiochip_add()
to avoid duplicate calls and be consistent with the explicit call in
gpiochip_remove().
Fixes: e93fa3f243 ("gpiolib: remove duplicate pin range code")
Depends-on: f7299d441a ("gpio: of: Fix of_gpiochip_add() error path")
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The GPIO irqchip needs to initialize the valid mask
before initializing the IRQ hardware, because sometimes
the latter require the former to be executed first.
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
Reported-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20191030122914.967-1-linus.walleij@linaro.org
Acked-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
- only get the second IRQ when there is more than one IRQ in mxc
- move the code around in lineevent_create() for some shrinkage
- fix formatting for GPIO docs
- add DT binding for r8a774b1
- convert drivers that prevously used nocache ioremap() to using regular
devm_platform_ioremap_resource()
- remove some redundant error messages
- shrink object code in 104-idi-48e
- drop an unneeded warning from gpiolib-of
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEFp3rbAvDxGAT0sefEacuoBRx13IFAl2u/9UACgkQEacuoBRx
13J5NBAAglp/gJDyOdmOz+4u8sv0BqOR/01+gOFljuQkV4rUytjb2PXQ+g5aVrfe
l4Iqq0vWU16jUGp3WG48ITrYepSx0x4PaS3y/6r7cPTXrl6Ki4RLzR2a4yVSD6LD
XfKjhuLNV5T2L99tltzgIPihSn60a0gpIUc6/KlJQ8pmzuzgyyTMXWqjr128j9S0
qnIexsQNBl5dSvi8HolRmie5i3FScAQXwD3EnZPV6hb5FaDkhGrbyvGAGl7Uqz83
KekGOHlhPvvVLP/NnLoJn94UfD5p5kSlA1Ey9vEahzqj/IOQYwUubPs22bL8bIIB
UA3iJ/CKiWNAH6/W4NxxmwblIyENnA5Njeop32quXE8Jkttx42ZWuKwVl1UL6seP
E0Xv5r9xQmO4ZGuSR3G2JWJM0NiFBS7+dpIj/aBYw96eM7TO5Knfjq3LOPURyVNa
RViWhmA245PxtcNJBEo51CFYNnOvcBvwLcXkKvqIJipQTaYrZgWmpdI6YFRYoZ2Z
tWiBSVRZwyfRQuwsUs5vGTKmsq2X2LF91m/wsriNZGEdR8cZ+Ig14Stx94K8iM8U
p5xw0jCYSFoswvMjkV+pFFX/mlWwqebUSs38yuX8G+OMWctmjq+amcKMenDtwkEm
vYZe4/VgC6UZ4o3FVo34nOZg0rU9Pqvh0GMnJPcqiZvgS2beQLk=
=mQ1k
-----END PGP SIGNATURE-----
Merge tag 'gpio-v5.5-updates-for-linus-part-1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into devel
gpio updates for v5.5
- only get the second IRQ when there is more than one IRQ in mxc
- move the code around in lineevent_create() for some shrinkage
- fix formatting for GPIO docs
- add DT binding for r8a774b1
- convert drivers that prevously used nocache ioremap() to using regular
devm_platform_ioremap_resource()
- remove some redundant error messages
- shrink object code in 104-idi-48e
- drop an unneeded warning from gpiolib-of
After changing the drivers to use GPIO core to add an IRQ chip
it appears that some of them requires a hardware initialization
before adding the IRQ chip.
Add an optional callback ->init_hw() to allow that drivers
to initialize hardware if needed.
This change is a part of the fix NULL pointer dereference
brought to the several drivers recently.
Cc: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add pull-up/pull-down flags to the gpio line get and
set ioctl() calls. Use cases include a push button
that does not have an external resistor.
Addition use cases described by Limor Fried (ladyada) of
Adafruit in this PR for Adafruit_Blinka Python lib:
https://github.com/adafruit/Adafruit_Blinka/pull/59
Signed-off-by: Drew Fustini <drew@pdp7.com>
Link: https://lore.kernel.org/r/20190921102522.8970-1-drew@pdp7.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This introduces fwnode_gpiod_get_index() that iterates through common gpio
suffixes when trying to locate a GPIO within a given firmware node.
We also switch devm_fwnode_gpiod_get_index() to call
fwnode_gpiod_get_index() instead of iterating through GPIO suffixes on
its own.
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Link: https://lore.kernel.org/r/20190913032240.50333-3-dmitry.torokhov@gmail.com
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Move all the flags sanitization before any memory allocation in
lineevent_create() in order to remove a couple unneeded gotos.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
When emulating open-drain/open-source by not actively driving the output
lines - we're simply changing their mode to input. This is wrong as it
will then make it impossible to change the value of such line - it's now
considered to actually be in input mode. If we want to still use the
direction_input() callback for simplicity then we need to set FLAG_IS_OUT
manually in gpiod_direction_output() and not clear it in
gpio_set_open_drain_value_commit() and
gpio_set_open_source_value_commit().
Fixes: c663e5f567 ("gpio: support native single-ended hardware drivers")
Cc: stable@vger.kernel.org
Reported-by: Kent Gibson <warthog618@gmail.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
cycle:
Core changes:
- Fix errors in example code in the documentation.
New drivers:
- Add support for JZ4760, JZ4760B, X1000, X1000E and X1500 to
the Ingenic driver.
- Support Cirrus Logic Madera CS47L92 and CS47L15.
- Support Allwinner Sunxi V3S.
- Support Aspeed 2600 BMC.
- Support Qualcomm SC7180.
- Support Marvell MVEBU CS115.
Driver improvements:
- Clean up a few drivers to use the devm_platform_ioremap_resource()
helper.
- Pass the irqchip when registering the gpio_chip in some pin
controllers that are also GPIO controllers.
- Support suspend/resume in the Tegra driver.
- Support pull-up on the Broadcom BCM2711.
- The Intel driver can now request locked pads.
- Fix the UFS reset pin in the Qualcomm SDM845 driver.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAl2D6y0ACgkQQRCzN7AZ
XXNAfw//Zh0zkrwVSiDU7xgjIgLpngkmPeDoFZoPW5Uqh6G3KlabkE0y7CXZT2kd
hZU0v8CW/947t2zxNev6nNUPumfaTJsj5btVAvF8+QE2lnnbs3Id2mPVPK/mMUs+
bOVFkMMFvGzsY2TaKiJSgOiTe8LoUUl2tJ25mFRBwgtPWYJh2NLVwbzScv+KTBX2
Yy1UhltfWaobyPGgJucZn2yDbkZQeDLyKaExsL9jKBO9rAf8iwSOwkxEz5hLGRri
ejubLV2C5WDcAYIMO2WscFm/0Cxv8ooWBlGTG3+v3P1eaB7l7rYkGpVkoRJpS7gr
Qzf0z1PjVudCcwomkf7ZXJFVHCEkWe86oT4plII9TiZ0b5YpwxYA3Rzakrpb3K7E
gxCuMR1PQK9/2VcqtnXjV2N40KJNRhsAGx47YK3mZxFQun8ksLDTSwKCEPvQ5GT6
3CSYtqVkqgpRaj1MIe+QrFE5Y2bNPjYqXF8kqh5hz/2FWZErbaRuPuKscYh7x0Z4
wY157HEYTlSnSs3nHFtPO3qeXt0i2MNOKVpIlyKzUnafPoyxcnqaB/ZMt5Dp3ygX
NJI3xqULdSzXRpjj/oChCKzuNd9CmxO6yWMIK32f4Gdc3T1wmpBlOTIrHKUA5aZf
KN38L/8iGnzvOKC57552eFpTXaF4Plh2y7e0xQkq4eshhHpz8H8=
=2nNz
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is the bulk of pin control changes for the v5.4 kernel cycle:
Core changes:
- Fix errors in example code in the documentation.
New drivers:
- Add support for JZ4760, JZ4760B, X1000, X1000E and X1500 to the
Ingenic driver.
- Support Cirrus Logic Madera CS47L92 and CS47L15.
- Support Allwinner Sunxi V3S.
- Support Aspeed 2600 BMC.
- Support Qualcomm SC7180.
- Support Marvell MVEBU CS115.
Driver improvements:
- Clean up a few drivers to use the devm_platform_ioremap_resource()
helper.
- Pass the irqchip when registering the gpio_chip in some pin
controllers that are also GPIO controllers.
- Support suspend/resume in the Tegra driver.
- Support pull-up on the Broadcom BCM2711.
- The Intel driver can now request locked pads.
- Fix the UFS reset pin in the Qualcomm SDM845 driver"
* tag 'pinctrl-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (112 commits)
pinctrl: meson-gxbb: Fix wrong pinning definition for uart_c
pinctrl: sh-pfc: Unlock on error in sh_pfc_func_set_mux()
pinctrl: bcm: remove redundant assignment to pointer log
pinctrl: iproc: Add 'get_direction' support
pinctrl: iproc-gpio: Handle interrupts for multiple instances
pinctrl: iproc-gpio: Fix incorrect pinconf configurations
pinctrl: intel: mark intel_pin_to_gpio __maybe_unused
pinctrl: qcom: sdm845: Fix UFS_RESET pin
pinctrl: mvebu: add additional variant for standalone CP115
pinctrl: mvebu: Add CP110 missing pin functionality
dt-bindings: cp110: document the new CP115 pinctrl compatible
pinctrl: bcm2835: Pass irqchip when adding gpiochip
pinctrl: meson: meson: Add of_node_put() before return
pinctrl/gpio: Take MUX usage into account
dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150l support
dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150b support
dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150 support
pinctrl: amd: disable spurious-firing GPIO IRQs
pinctrl: rza2: Include the appropriate headers
pinctrl: rza2: Drop driver use of consumer flags
...
v5.4 kernel cycle.
Core changes:
- Support hierarchical GPIO irqchips. We now have three
consumers that can use this: Intel IXP4xx, ThunderX and
Qualcomm SPMI GPIO (in the pinctrl subsystem). The support
code has been long in the making and hashed out so it should
be easily adaptable for all hierarchical irqchip parents.
The code only gets compiled in if hierarchical irqchip
is used at the topmost irq controller at least, as the
hierarchical irqchip requires strict hierarchy all the
way up in the system.
- Determine the need for a "valid_mask" for GPIO lines on the
gpio_chip and conversely for the "valid_mask" for the GPIO
interrupt chip interrupt lines by looking for a
.init_valid_mask() callback in the main chip or GPIO interrupt
chip respectively. Allocate it with bitmap_alloc().
- Isolate the device tree/open firmware GPIO description code
out in its own file properly.
- Isolate the ACPI GPIO description code out in its own file
properly.
- Drop a whole lot of #ifdef:s in the main includes: it does
not hurt to keep the include items around, and we get
quicker and clearer compile failures if the appropriate
kernel symbols are not selected for drivers.
New/deleted drivers:
- New driver for Aspeed SGPIO.
- The KS8695 driver is deleted as the platform gets deleted
from arch/arm in this kernel cycle.
- The Cirrus Logic Madera driver now supports CS47L92 and
CS47L15.
- The Freescale MPC8xxx now supports LS1028A and LS1088A.
Driver improvements:
- We pass the GPIO irqchip intialization by directly filling
in the struct instead of using set-up functions (the new
way) for Intel MID, Lynxpoint, Merrifield, XLP, HLWD, Aspeed,
ZX, VF610, TQMX86, MT7621, Zynq and EP93xx.
Out-of-band changes:
- Fix a GPIO header inclusion in Unicore - no response from
maintainer.
- Drop FMC subsystem from MAINTAINERS - was deleted in the
GPIO tree last cycle so let's mop up the shards.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAl1/BO0ACgkQQRCzN7AZ
XXPiPw/9GPSYqvHuv37RJwUTiaygDleLLayCy73AsudopSeInAfcPIElJgW2/5oa
i5x4rdd81SpuReQWNKqqPjuDffdZvJW9rwuXU/LXsOk0fhWIe8BidUPISRPTYSJP
q3NpmBJG4opVmhWZ3yxnq9tPboabjdTikVkM90Nwpe3vpdKk/7GV5k/T8/18fXb6
bn7E6YaN6Qrt3jknb+eK+ne6zLv5/ncFIGqYvUPKeqi0MOs4JDc/YroK90MAMSrD
WvtOZl72bYKutxa42ZYf0lZVKhZHKMoigulEWczxVxwHSulxbMDbNa+CzNfunkjz
5iBDA34gzliCoA5NdcqMuQs44qkiRBS6ci9PRXBlW9QJuDHzpK5j4mKy2Kp5K2bQ
+FX1dAftsAQBEkqVqQs97kGIfE5z0hRsyH8+fLKH3tkZmfkLKjYAB+pwHIhAFwvV
f8WJ8Ay+gorvpWDwqjBeP2SnxFCE5GmgZHCfp0oJ1Kr/BM4hLPDT6RwvavDPO7uz
xMcJFH1ZS1HCdkuFKOboD+FpRHCDeL4IJvHpal3dcu3P4RMr16M3E+UAeQAwdnYM
AmqDYLbXyHdEszpk4uwc0nHt+gwie0CLfhuUvswJunnDkbwXiD4nj2c9ipaFsVLI
/KaZvUe44/I5ItRb8vGkpP6Z++QiVqJkmdO0Lxy+UEaV6jb7mfg=
=/TRI
-----END PGP SIGNATURE-----
Merge tag 'gpio-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO updates from Linus Walleij:
"This is the bulk of changes in the GPIO subsystem for the v5.4 kernel
cycle.
Core changes:
- Support hierarchical GPIO irqchips.
We now have three consumers that can use this: Intel IXP4xx,
ThunderX and Qualcomm SPMI GPIO (in the pinctrl subsystem).
The support code has been long in the making and hashed out so it
should be easily adaptable for all hierarchical irqchip parents.
The code only gets compiled in if hierarchical irqchip is used at
the topmost irq controller at least, as the hierarchical irqchip
requires strict hierarchy all the way up in the system.
- Determine the need for a "valid_mask" for GPIO lines on the
gpio_chip and conversely for the "valid_mask" for the GPIO
interrupt chip interrupt lines by looking for a .init_valid_mask()
callback in the main chip or GPIO interrupt chip respectively.
Allocate it with bitmap_alloc().
- Isolate the device tree/open firmware GPIO description code out in
its own file properly.
- Isolate the ACPI GPIO description code out in its own file
properly.
- Drop a whole lot of #ifdef:s in the main includes: it does not hurt
to keep the include items around, and we get quicker and clearer
compile failures if the appropriate kernel symbols are not selected
for drivers.
New/deleted drivers:
- New driver for Aspeed SGPIO.
- The KS8695 driver is deleted as the platform gets deleted from
arch/arm in this kernel cycle.
- The Cirrus Logic Madera driver now supports CS47L92 and CS47L15.
- The Freescale MPC8xxx now supports LS1028A and LS1088A.
Driver improvements:
- We pass the GPIO irqchip intialization by directly filling in the
struct instead of using set-up functions (the new way) for Intel
MID, Lynxpoint, Merrifield, XLP, HLWD, Aspeed, ZX, VF610, TQMX86,
MT7621, Zynq and EP93xx.
Out-of-band changes:
- Fix a GPIO header inclusion in Unicore - no response from
maintainer.
- Drop FMC subsystem from MAINTAINERS - was deleted in the GPIO tree
last cycle so let's mop up the shards"
* tag 'gpio-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (82 commits)
gpiolib: of: add a fallback for wlf,reset GPIO name
gpio: htc-egpio: Remove unused exported htc_egpio_get_wakeup_irq()
gpio: remove explicit comparison with 0
gpio: creg-snps: use devm_platform_ioremap_resource() to simplify code
gpio: devres: Switch to EXPORT_SYMBOL_GPL()
gpio: of: Switch to EXPORT_SYMBOL_GPL()
gpio: of: Make of_gpio_simple_xlate() private
gpio: of: Make of_get_named_gpiod_flags() private
gpio: aspeed: Add in ast2600 details to Aspeed driver
gpio: aspeed: Use ngpio property from device tree if available
gpio: aspeed: Setup irqchip dynamically
gpio/aspeed: Fix incorrect number of banks
gpio: aspeed: Update documentation with ast2600 controllers
gpio: Initialize the irqchip valid_mask with a callback
gpiolib: acpi: make acpi_can_fallback_to_crs() static
gpio: Fix further merge errors
gpio: Fix up merge collision in include file
gpio: of: Normalize return code variable name
gpio: gpiolib: Normalize return code variable name
gpio: ep93xx: Pass irqchip when adding gpiochip
...
