Commit Graph

9 Commits

Author SHA1 Message Date
Stephen Boyd
ff060019f4 Merge branches 'clk-stm32f4', 'clk-tegra', 'clk-at91', 'clk-sifive-fu540' and 'clk-spdx' into clk-next
- Support for STM32F769
 - Rework AT91 sckc DT bindings
 - Fix slow RC oscillator issue on sama5d3
 - AT91 sam9x60 PMC support
 - SiFive FU540 PRCI and PLL support

* clk-stm32f4:
  clk: stm32mp1: Add ddrperfm clock
  clk: stm32: Introduce clocks of STM32F769 board

* clk-tegra:
  clk: tegra: divider: Mark Memory Controller clock as read-only
  clk: tegra: emc: Replace BUG() with WARN_ONCE()
  clk: tegra: emc: Fix EMC max-rate clamping
  clk: tegra: emc: Support multiple RAM codes
  clk: tegra: emc: Don't enable EMC clock manually
  clk: tegra124: Remove lock-enable bit from PLLM
  clk: tegra: Fix PLLM programming on Tegra124+ when PMC overrides divider
  clk: tegra: Don't enable already enabled PLLs

* clk-at91:
  clk: at91: Mark struct clk_range as const
  clk: at91: add sam9x60 pmc driver
  dt-bindings: clk: at91: add bindings for SAM9X60 pmc
  clk: at91: add sam9x60 PLL driver
  clk: at91: master: Add sam9x60 support
  clk: at91: usb: Add sam9x60 support
  clk: at91: allow configuring generated PCR layout
  clk: at91: allow configuring peripheral PCR layout
  clk: at91: sckc: handle different RC startup time
  clk: at91: modernize sckc binding
  dt-bindings: clock: at91: new sckc bindings

* clk-sifive-fu540:
  clk: sifive: add a driver for the SiFive FU540 PRCI IP block
  clk: analogbits: add Wide-Range PLL library
  dt-bindings: clk: add documentation for the SiFive PRCI driver

* clk-spdx:
  clk: sunxi-ng: Use the correct style for SPDX License Identifier
  clk: sprd: Use the correct style for SPDX License Identifier
  clk: renesas: Use the correct style for SPDX License Identifier
  clk: qcom: Use the correct style for SPDX License Identifier
  clk: davinci: Use the correct style for SPDX License Identifier
  clk: actions: Use the correct style for SPDX License Identifier
2019-05-07 11:45:29 -07:00
Stephen Boyd
7b4c162e03 clk: at91: Mark struct clk_range as const
It's just some static data that doesn't get changed after being used.
Mark it const everywhere.

Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-04-25 14:16:26 -07:00
Alexandre Belloni
e4cfb823bd clk: at91: allow configuring generated PCR layout
The PCR register layout for GCLKCSS is changing for the future SoCs, allow
configuring it.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-04-25 12:34:03 -07:00
Alexandre Belloni
cb4f4949b1 clk: at91: allow configuring peripheral PCR layout
The PCR register actually changed layout for each SoC. By chance, this
didn't have impact on sama5d[2-4] support but since sama5d3, PID is seven
bits wide and sama5d4 and sama5d2 don't have DIV.

For the DT backward compatibility, keep the layout as is.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-04-25 12:34:03 -07:00
Matthias Wieloch
45b0668211 clk: at91: fix programmable clock for sama5d2
The prescaler formula of the programmable clock has changed for sama5d2.
Update the driver accordingly.

Fixes: a2038077de ("clk: at91: add sama5d2 PMC driver")
Cc: <stable@vger.kernel.org> # v4.20+
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[nicolas.ferre@microchip.com: adapt the prescaler range,
		fix clk_programmable_recalc_rate, split patch]
Signed-off-by: Matthias Wieloch <matthias.wieloch@few-bauer.de>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-03-18 12:50:31 -07:00
Stephen Boyd
bd5e2ea291 Merge branch 'clk-at91' into clk-next
* clk-at91:
  clk: at91: programmable: remove unneeded register read
  clk: at91: optimize clk_round_rate() for AUDIO_PLL
  clk: at91: enable AUDIOPLL as source for PCKx on SAMA5D2
2019-03-08 10:29:47 -08:00
Alexandre Belloni
65a91e2e59 clk: at91: fix masterck name
The master clock is actually named masterck earlier in the driver. Having
"mck" in the parent list means that it can never be selected.

Fixes: 1eabdc2f9d ("clk: at91: add at91sam9x5 PMCs driver")
Fixes: a2038077de ("clk: at91: add sama5d2 PMC driver")
Fixes: 084b696bb5 ("clk: at91: add sama5d4 pmc driver")
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: <stable@vger.kernel.org> # v4.20+
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-20 11:40:21 -08:00
Michał Mirosław
77977b8004 clk: at91: enable AUDIOPLL as source for PCKx on SAMA5D2
Datasheet for SAMA5D2x mentions 6 sources for PCKx, the last being AUDIOPLL.

Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-01-09 11:49:35 -08:00
Alexandre Belloni
a2038077de clk: at91: add sama5d2 PMC driver
Add a driver for the PMC clocks of the sama5d2

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
[sboyd@kernel.org: Make i signed to fix signedness bug]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 10:44:53 -07:00