The registers for the Samsung S3C serial port are currently defined in
the platform specific arch/arm/plat-samsung/include/plat/regs-serial.h
file, which is not visible to multiplatform capable drivers.
Unfortunately, it is not possible to move the file into a more local
place as we should normally try to, because the same registers
may be used in one of four places:
* In the driver itself
* In platform-independent ARM code for early debug output
* In platform_data definitions
* In the Samsung platform power management code
I have also found no way to logically split out a platform_data
file, other than possibly move everything into
include/linux/platform_data, which also felt wrong. The only
part of this file that makes sense to keep specific to the s3c24xx
platform are the virtual and physical addresses defined here,
which are needed in no other location.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
In order to be able to use more than 4GB address-cells and size-cells
have to be set to 2
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Lior Amsalem <alior@marvell.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This patch selects the devbus driver as part of the mvebu default
config, along with the required options to detect and support
CFI flash memories.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Plat'home Openblocks AX3 has a 128 MiB NOR flash device connected
to the Device Bus. This commit adds the device tree node to support this device.
The SoC supports a flexible and dynamic decoding window allocation scheme;
but since this feature is still not implemented we need to specify the window
base address in the device tree node itself.
This base address has been selected in a completely arbitrary fashion.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Armada XP Development Board DB-MV784MP-GP has a NOR flash device
connected to the Device Bus. This commit adds the device tree node
to support this device.
This SoC supports a flexible and dynamic decoding window allocation
scheme; but since this feature is still not implemented we need
to specify the window base address in the device tree node itself.
This base address has been selected in a completely arbitrary fashion.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Armada 370 and Armada XP SoC have a Device Bus controller to
handle NOR, NAND, SRAM and FPGA devices.
This patch adds the device tree node to enable the controller.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Bit 3 of the SR register is set if there is a tx underrun. If
this bit isn't set, we should loop on the tx ready bit until we
can transmit again. Otherwise we should skip the loop and
transmit immediately. The code is doing the opposite though,
checking for an underrun and then looping on the tx ready bit
causing us to never loop on the tx read bit when the tx buffer
may not be ready.
This doesn't seem to affect my 8960 device too often, but in some
cases I see a lost character or two from the decompressor prints.
This also matches what we do in the assembly in debug-macro.S.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
- Kirkwood
- a couple of small fixes for the Iomega ix2-200 board (ether and led)
- mvebu
- allow GPIO button to work on Mirabox when running SMP
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Merge tag 'mvebu_fixes_for_v3.9_round3' of git://git.infradead.org/users/jcooper/linux into fixes
From Jason Cooper <jason@lakedaemon.net>:
mvebu fixes for v3.9 round 3
- Kirkwood
- a couple of small fixes for the Iomega ix2-200 board (ether and led)
- mvebu
- allow GPIO button to work on Mirabox when running SMP
* tag 'mvebu_fixes_for_v3.9_round3' of git://git.infradead.org/users/jcooper/linux:
arm: mvebu: Fix the irq map function in SMP mode
Fix GE0/GE1 init on ix2-200 as GE0 has no PHY
ARM: Kirkwood: Fix typo in the definition of ix2-200 rebuild LED
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The s3c-fb driver requires header files from the samsung platforms
to find its platform_data definition, but this no longer works on
multiplatform kernels, so let's move the data into a new header
file under include/linux/platform_data.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: linux-fbdev@vger.kernel.org
Acked-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
- Remove sunxi.dtsi and only use one dtsi for each SoC
- Various compatible renamings to be consistent with the other platforms
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Merge tag 'sunxi-dt-for-3.10-3' of git://github.com/mripard/linux into next/dt
From Maxime Ripard:
SunXi dt additions for 3.10, take 3
- Remove sunxi.dtsi and only use one dtsi for each SoC
- Various compatible renamings to be consistent with the other platforms
* tag 'sunxi-dt-for-3.10-3' of git://github.com/mripard/linux:
ARM: sunxi: dt: Update watchdog compatible string
ARM: sunxi: dt: Update interrupt controller compatible string
ARM: sunxi: dt: Update timer compatible string
ARM: sunxi: dt: Reorganize the dtsi
Signed-off-by: Olof Johansson <olof@lixom.net>
- Remove sunxi.dtsi
- Switch to clocksource/irqchip device tree handlers
- Cleanup the watchdog code
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Merge tag 'sunxi-cleanup-for-3.10' of git://github.com/mripard/linux into next/cleanup
From Maxime Ripard:
Cleanups for Allwinner sunXi architecture:
- Remove sunxi.dtsi
- Switch to clocksource/irqchip device tree handlers
- Cleanup the watchdog code
* tag 'sunxi-cleanup-for-3.10' of git://github.com/mripard/linux:
ARM: sunxi: Rework the restart code
irqchip: sunxi: Rename sunxi to sun4i
irqchip: sunxi: Make use of the IRQCHIP_DECLARE macro
clocksource: sunxi: Rename sunxi to sun4i
clocksource: sunxi: make use of CLKSRC_OF
clocksource: sunxi: Cleanup the timer code
clocksource: make CLOCKSOURCE_OF_DECLARE type safe
Signed-off-by: Olof Johansson <olof@lixom.net>
Add/change conflict in drivers/clocksource/Makefile resolved.
Bringin in clk subsystem dependencies needed by sunxi.
* depends/clk-for-3.10: (26 commits)
clk: sunxi: drop an unnecesary kmalloc
clk: sunxi: drop CLK_IGNORE_UNUSED
clk: sunxi: Add support for AXI, AHB, APB0 and APB1 gates
clk: divider: Introduce CLK_DIVIDER_ALLOW_ZERO flag
clk: mvebu: Use common of_clk_init() function
clk: fix clk_mux::flags kerneldoc
clk: allow reentrant calls into the clk framework
clk: abstract locking out into helper functions
clk: zynq: Add missing zynq clk header
clk: sunxi: rename compatible strings
arm: sunxi: Add useful information about sunxi clocks
clk: arm: sunxi: Add a new clock driver for sunxi SOCs
clk: ux500: Fix prcmu clocks registration
ARM: imx: adapt clk_busy_mux to new clk_mux struct
clk: Add composite clock type
clk: add table lookup to mux
clk: Fix incorrect return type in clk.c
clk: prima2: fix return value check in sirfsoc_of_clk_init()
clk:SPEAr1340: Correct parent clock configuration
documentation: clk: fix couple of misspelling
...
* Clean up a couple of unneeded function declarations
* Remove imx specific cpufreq driver as generic cpufreq-cpu0 works well
as the replacement
* Remove platform ahci support
* Clean up unused ARCH/MACH Kconfig symbols
* Remove a couple of unused files
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Merge tag 'imx-cleanup-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/cleanup
From Shawn Guo:
The imx cleanup for 3.10:
* Clean up a couple of unneeded function declarations
* Remove imx specific cpufreq driver as generic cpufreq-cpu0 works well
as the replacement
* Remove platform ahci support
* Clean up unused ARCH/MACH Kconfig symbols
* Remove a couple of unused files
* tag 'imx-cleanup-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: i.MX: remove unused ARCH_* configs
ARM i.MX53: remove platform ahci support
ARM: imx: remove mx6q.h
ARM: imx: remove Makefile.boot
ARM: imx: clk-imx27: Do not register peripheral clock for SSI
ARM: imx: avic: Move avic_saved_mask_reg under CONFIG_PM
ARM: imx: Remove cpufreq driver
ARM: imx: remove pl310_get_save_ptr() declaration
ARM: imx: remove duplicated function declaration
Signed-off-by: Olof Johansson <olof@lixom.net>
* A bunch of fixes for sparse warings
* One fix for the typo in use of Kconfig symbol
MACH_EUKREA_CPUIMX27_USEUART4
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Merge tag 'imx-noncritical-fixes-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/fixes-non-critical
From Shawn Guo:
The imx noncritical fixes for 3.10:
* A bunch of fixes for sparse warings
* One fix for the typo in use of Kconfig symbol
MACH_EUKREA_CPUIMX27_USEUART4
* tag 'imx-noncritical-fixes-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: cpuimx27 and mbimx27: prepend CONFIG_ to Kconfig macro
ARM: mach-imx: mach-imx6q: Fix sparse warnings
ARM: mach-imx: src: Include "common.h
ARM: mach-imx: gpc: Include "common.h"
ARM: mach-imx: avic: Staticize *avic_base
ARM: mach-imx: tzic: Staticize *tzic_base
ARM: mach-imx: clk: Include "clk.h"
ARM: mach-imx: clk-busy: Staticize clk_busy_mux_ops
ARM: mach-imx: irq-common: Remove imx_irq_set_priority()
ARM: mach-imx: clk-gate2: Include "clk.h"
ARM: mach-imx: clk-pllv2: Staticize clk_pllv2_ops
ARM: mach-imx: clk-pllv1: Staticize clk_pllv1_ops
ARM: mach-imx: cpu-imx5: Include "common.h"
ARM: mach-imx: iomux-imx31: Staticize mxc_pin_alloc_map
ARM: mach-imx: mm-imx3: Staticize imx3_init_l2x0()
ARM: mach-imx: cpu: Include "common.h"
Signed-off-by: Olof Johansson <olof@lixom.net>
The ARM perf core code used to rely on the pmu node being
compatible with "arm,cortex-a9-pmu", even when the PMUs
of the different Cortex-A processors are not really
compatible... This is no longer required and actually
became harmful, so remove all the offending values
from Versatile Express DTS files.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Commit 92702df357 ("ARM: OMAP4: PM: fix PM regression introduced by recent
clock cleanup") makes the 'ocp2scp_usb_phy_phy_48m' as optional
functional clock causing regression in MUSB. But this 48MHz clock is a
mandatory clock for usb phy attached to ocp2scp and hence made as the main
clock for ocp2scp.
Cc: Keerthy <j-keerthy@ti.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
[paul@pwsan.com: add comment to the hwmod data to try to prevent any
future mistakes here]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fix the regression introduced by the commit 3202bf0157
"arm: mvebu: Improve the SMP support of the interrupt controller":
GPIO IRQ were no longer delivered to the CPUs.
To be delivered to a CPU an interrupt must be enabled at CPU level and
at interrupt source level. Before the offending patch, all the
interrupts were enabled at source level during map() function. Mask()
and unmask() was done by handling the per-CPU part. It was fine when
running in UP with only one CPU.
The offending patch added support for SMP, in this case mask() and
unmask() was done by handling the interrupt source level part. The
per-CPU level part was handled by the affinity API to select the CPU
which will receive the interrupt. (Due to some hardware limitation
only one CPU at a time can received a given interrupt).
For "normal" interrupt __setup_irq() was called when an irq was
registered. irq_set_affinity() is called from this function, which
enabled the interrupt on one of the CPUs. Whereas for GPIO IRQ which
were chained interrupts, the irq_set_affinity() was never called and
none of the CPUs was selected to receive the interrupt.
With this patch all the interrupt are enable on the current CPU during
map() function. Enabling the interrupts on a CPU doesn't depend
anymore on irq_set_affinity() and then the chained irq are not anymore
a special case. However the CPU which will receive the irq can still
be modify later using irq_set_affinity().
Tested with Mirabox (A370) and Openblocks AX3 (AXP), rootfs mounted
over NFS, compiled with CONFIG_SMP=y/N.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reported-by: Ryan Press <ryan@presslab.us>
Investigated-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Ryan Press <ryan@presslab.us>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
As multi-platform build is being adopted by more and more ARM platforms,
initcall function should be used very carefully. For example, when
CONFIG_ARM_OMAP2PLUS_CPUFREQ is built in the kernel, omap_cpufreq_init()
will be called on all the platforms to initialize omap-cpufreq driver.
Further, on OMAP, we now use Soc generic cpufreq-cpu0 driver using device
tree entries. To allow cpufreq-cpu0 and omap-cpufreq drivers to co-exist
for OMAP in a single image, we need to ensure the following:
1. With device tree boot, we use cpufreq-cpu0
2. With non device tree boot, we use omap-cpufreq
In the case of (1), we will have cpu OPPs and regulator registered
as part of the device tree nodes, to ensure that omap-cpufreq
and cpufreq-cpu0 don't conflict in managing the frequency of the
same CPU, we should not permit omap-cpufreq to be probed.
In the case of (2), we will not have the cpufreq-cpu0 device, hence
only omap-cpufreq will be active.
To eliminate this undesired these effects, we change omap-cpufreq
driver to have it instantiated as a platform_driver and register
"omap-cpufreq" device only when booted without device tree nodes on
OMAP platforms.
This allows the following:
a) Will only run on platforms that create the platform_device
"omap-cpufreq".
b) Since the platform_device is registered only when device tree nodes
are *not* populated, omap-cpufreq driver does not conflict with
the usage of cpufreq-cpu0 driver which is used on OMAP platforms when
device tree nodes are present.
Inspired by commit 5553f9e26f
(cpufreq: instantiate cpufreq-cpu0 as a platform_driver)
[robherring2@gmail.com: reported conflict of omap-cpufreq vs other
driver in an non-device tree supported boot]
Reported-by: Rob Herring <robherring2@gmail.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
The OPP library support is needed for exynos5440 cpu frequency
dynamic scaling driver.
Signed-off-by: Amit Daniel Kachhap <amit.daniel@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This patch moves cpufreq driver of ARM based sa11x0 platform to drivers/cpufreq.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Just like the OHCI counter part we just can remove the architecture
specific symbols which prevent these configuration symbols from being
selected by platforms/architectures requiring it. The original
implementation did not scale at all since it required each and every
single architecture to be added for these configuration symbols to be
selected. Now it is up to the EHCI driver and/or platform to select
these configuration symbols accordingly.
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'devel-samsung-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
From Kukjin Kim <kgene.kim@samsung.com>:
including various development for samsung for v3.10
* tag 'devel-samsung-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: replace cpumask by the corresponding macro
ARM: EXYNOS: handle properly the return values
ARM: EXYNOS: factor out the idle states
ARM: SAMSUNG: check processor type before cache restoration in resume
ARM: S3C64XX: Slow down mic detection rate for wm5102
ARM: S3C64XX: Clear DMA flags on channel request
ARM: EXYNOS: Clear ENABLE_WAKEUP_SW bit when entering suspend
ARM: EXYNOS: Remove hardcode wakeup unmask for EINT_0
ARM: EXYNOS: Add support for rtc wakeup
ARM: SAMSUNG: Export MIPI CSIS/DSIM PHY control functions
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The tegra assembly files are written for ARMv7 and are not compatible
with ARMv6, which leads to build warnings when compiling a dual
ARMv6/v7 kernel. Since this code is only ever run on Tegra ARMv7
hardware, we can tell the assembler which architecture level to
use.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The TWD and SCU configs are selected by default as long as
MSM_SCORPIONMP is false and/or MCT is false. Implementing the
logic this way certainly saves lines in the Kconfig but it
precludes those machines which select MSM_SCORPIONMP or MCT from
participating in the single zImage effort because when those
machines are combined with other SMP capable machines the TWD and
SCU are no longer selected by default.
Push the select out to the machine entries so that we can compile
these machines together and still select the appropriate configs.
Cc: Barry Song <baohua.song@csr.com>
Acked-by: David Brown <davidb@codeaurora.org>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Pawel Moll <pawel.moll@arm.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Acked-by: Simon Horman <horms@verge.net.au>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Tony Lindgren <tony@atomide.com>
Acked-by: Viresh Kumar <viresh.linux@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The only part of proc_dir_entry the code outside of fs/proc
really cares about is PDE(inode)->data. Provide a helper
for that; static inline for now, eventually will be moved
to fs/proc, along with the knowledge of struct proc_dir_entry
layout.
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
The OMAP5 idle driver can re-use most of OMAP4 CPUidle driver
implementation. Also the next derivative SOCs are going to re-use
the MPUSS so, same driver with minor updates can be re-used.
Prepare the code so that its easier to add CPUidle support for
OMAP5 devices.
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Current OMAP4 CPUIdle driver is using omap4_mpuss_read_prev_context_state()
to check whether the MPU cluster lost context or not before calling
cpu_cluster_pm_exit(). This was initially done an optimization for
corner cases, where if the cluster low power entry fails for some
reason, the cluster context restore gets skipped. However, since
reading the previous context is expensive (involving slow accesses to
the PRCM), it's better to avoid it and simply check the target cluster
state instead.
Moving forward, OMAP CPUidle drivers needs to be moved to drivers/idle/*
once the PRM/CM code gets moved to drivers. This patch also reduces one
dependency with platform code for idle driver movement.
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[khilman@linaro.org: minor changelog edits]
Signed-off-by: Kevin Hilman <khilman@linaro.org>
It is useful to know the CPU power state along with MPUSS power state
in a supported C-state. Since the data is available via sysfs, one can
avoid scrolling the source code for precise construction of C-state.
Reported-by: Nishanth Menon <nm@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
If the CPUidle device registration fails for some reason, we should
unregister the driver on error path.
Fix the code accordingly. Also when at it, check of the driver registration
failure too.
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
OMAP4 CPUidle driver registration call is under a loop which leads
to calling cpuidle_register_driver twice which is not intended.
Fix it by moving the driver registration outside the loop.
Reported-by: Nishanth Menon <nm@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
The TIME_VALID flag is specified for the different states but
the time residency computation is not done, no tk flag, no time
computation in the idle function.
Set the en_core_tk_irqen flag to activate it.
Cc: stable@vger.kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
A trivial patch to replace for_each_cpu(cpu_id, cpu_online_mask) by
the corresponding macro.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Amit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The cpuidle_register_driver return value is not checked.
The init function returns always -EIO when cpuidle_register_device
fails but the error could be different.
This patch fixes that by checking the cpuidle_register_driver properly
and returning the correct value when cpuidle_register_device fails.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Amit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The states are defined in the driver. We can get rid of the
intermediate cpuidle states initialization and the memcpy by
directly initializing the driver states.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Amit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The external pending interrupt register address (EINTPEND) offset is
0xa8, not 0x08. Without this patch the external interrupts are not
properly acknowledged, which may lead to an interrupt storm and the
system hang as soon as any external interrupt is requested.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Various new features are enabled:
* Tegra114 support.
* Various PMICs and related options for Tegra114 platforms.
* KEYBOARD_GPIO, mainly as a suspend wakeup source.
* tegra_defconfig is rebuilt based on v3.9-rc1, which causes various
layout changes.
This branch is based on v3.9-rc1.
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Merge tag 'tegra-for-3.10-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: tegra: defconfig changes
Various new features are enabled:
* Tegra114 support.
* Various PMICs and related options for Tegra114 platforms.
* KEYBOARD_GPIO, mainly as a suspend wakeup source.
* tegra_defconfig is rebuilt based on v3.9-rc1, which causes various
layout changes.
This branch is based on v3.9-rc1.
* tag 'tegra-for-3.10-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: defconfig updates
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This branch converts Tegra to support multi-platform/single-zImage.
One header is made accessible to drivers. The earlyprintk implementation
is moved to the multi-platform location. Some Kconfig changes are made
to enable multi-platform. Some dead files are deleted.
The APIs exposed in the now-global tegra-powergate.h should be replaced
with standard reset and power domain APIs in the future.
This branch is based on (part of) the previous soc pull request.
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Merge tag 'tegra-for-3.10-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/multiplatform
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: tegra: multi-platform conversion
This branch converts Tegra to support multi-platform/single-zImage.
One header is made accessible to drivers. The earlyprintk implementation
is moved to the multi-platform location. Some Kconfig changes are made
to enable multi-platform. Some dead files are deleted.
The APIs exposed in the now-global tegra-powergate.h should be replaced
with standard reset and power domain APIs in the future.
This branch is based on (part of) the previous soc pull request.
* tag 'tegra-for-3.10-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: convert to multi-platform
ARM: tegra: move <mach/powergate.h> to <linux/tegra-powergate.h>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch adds a cpus/cpu@0 node for imx51 with default operating
points for the cpufreq-cpu0 driver. There is currently no regulator
support, so the voltages are 0 here.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This adds the PATA device and the pinctrl group for to the i.MX51 dts.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Wandboard is a development board that has two variants: one version based
on mx6 dual lite and another one based on mx6 solo.
For more details about Wandboard, please refer to: http://www.wandboard.org/
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The sabreauto and sabresd boards are common for imx6q and imx6dl.
Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those
common parts.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add a pinctrl driver for i.MX6 SoloLite based on pinctrl-imx core
driver.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
The imx6dl is a derivative of imx6q with very limited difference. These
two SoCs are so compatible that they can be handled as one platform in
software. That said, we will not have target SOC_IMX6DL but just
reusing SOC_IMX6Q. That's why the pinctrl-imx6dl driver is added here
with symbol PINCTRL_IMX6Q controlling the build of it.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
The IOMUXC_AUDMUX_P4_INPUT_TXCLK_AMX_SELECT_INPUT must be configured as 1
instead of 0 to have AUD4 muxed on SD2 pins working.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The SRC in i.MX51 and i.MX53 is similar to the one in i.MX6q minus
the IPU2 reset line and multi core CPU reset/enable bits.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Also, link SRC to IPU via phandle.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add cpufreq-cpu0 platform device for imx5 DT init and register the clock
for imx5.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Adds cpufreq-cpu0 platform device for imx27 DT init and adds a clock
registration for cpufreq-cpu0 device.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The APF27Dev is a docking board for an APF27 SOM
Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The i.MX6 already has a devicetree node for the GPT, but not yet
has the clocks. Add them.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The GPT is the GPT timer found on i.MX SoCs. This patch adds the
devicetree node for it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The GPT is the GPT timer found on i.MX SoCs. This patch adds the
devicetree node for it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The GPT is the GPT timer found on i.MX SoCs.
Since this is the first user of the AIPS2 this patch also adds it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The GPT is the GPT timer found on i.MX SoCs.
This adds the missing GPT devicetree nodes. Also fixup the watchdog
register map size along the way. it's 0x1000, not 0x4000. This didn't
hurt before as the region was not occupied by another device, but now
overlaps with the GPT.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Similarly as it was done for mx6q, use a DT lookup in order to make maintainance
task for the clock devices easier.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add a second pinctrl group of pins for i2c2.
Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add ecspi2 group of pins for imx51.
Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The APF51Dev is a docking board for an APF51 SOM
Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Allow AUD3 to be used as audio output from the audmux block.
Signed-off-by: Sean Cross <xobs@kosagi.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Currently, all imx pinctrl drivers maintain a big array of struct
imx_pin_reg which hard-codes data like register offset and mux mode
setting for each pin function. Every time a new imx SoC support is
added, we need to add such a big mount of data. With moving to single
kernel build, it's only matter of time to be blamed on memory consuming.
With DTC pre-processor support in place, the patch moves all these data
into device tree by redefining the PIN_FUNC_ID in imxXX-pinfunc.h and
changing the PIN_FUNC_ID parsing code a little bit.
The pin id gets re-numbered based on mux register offset, or config
register offset if the pin has no mux register, so that kernel can
identify the pin id from register offsets provided by device tree.
As a bonus point of the change, those arbitrary magic numbers standing
for particular PIN_FUNC_ID in device tree sources are now replaced by
macros to improve the readability of dts files.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Replace /include/ (dtc) with #include (C pre-processor) for all imx DT
files, so that gcc -E handles the entire include tree, and hence any of
those files can #include some other file e.g. for constant definitions.
This allows future use of #defines and header files in order to define
names for various constants, such as pinctrl settings. Use of those
features will increase the readability of the device tree files.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add ARM Cortex A9 Performance Monitor Unit (PMU) support.
On i.MX6 a combined interrupt on hardware line #126 is used
(i.MX6 TRM: Performance Unit interrupt).
For more details see Documentation/devicetree/bindings/arm/pmu.txt
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Due to NR_IRQS being incorrectly defined not all IRQ domains can
be registered for S3C2440. It causes following errors on a s3c2440
SoC based board:
NR_IRQS:89
S3C2440: IRQ Support
irq: clearing pending status 00000002
------------[ cut here ]------------
WARNING: at kernel/irq/irqdomain.c:234 0xc0056ed0()
...
irq: could not create irq-domain
...
s3c2410-wdt s3c2410-wdt: failed to install irq (-22)
s3c2410-wdt: probe of s3c2410-wdt failed with error -22
...
samsung-uart s3c2440-uart.0: cannot get irq 74
Fix this by increasing NR_IRQS to at least (IRQ_S3C2443_AC97 + 1)
if CPU_S3C2440 is selected, so the subintc IRQ domain gets properly
registered.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
information. Also enable few HW errata workarounds for omap4.
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Merge tag 'omap-for-v3.10/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
From Tony Lindgren <tony@atomide.com>:
Changes needed for enabling SOC_BUS for the SoC revision
information. Also enable few HW errata workarounds for omap4.
* tag 'omap-for-v3.10/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (236 commits)
ARM: OMAP4: Enable fix for Cortex-A9 erratas
ARM: OMAP2+: Export SoC information to userspace
ARM: OMAP2+: SoC name and revision unification
ARM: OMAP2+: Move common part of late init into common function
Includes an update to Linux 3.9-rc6
Conflicts:
arch/arm/mach-omap2/cclock44xx_data.c
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This branch includes major development on the core Tegra SoC support code
in the mach-tegra directory:
* SMP support for Tegra114.
* Exposes SoC chip ID and revision through standard sysfs files.
* System-level suspend/resume for Tegra20/30. At present, this only
supports "LP2" mode (CPU power-down), but provides the basis to
implement "LP0"/"LP1" (various levels of core/chip power-down) in the
hopefully near future.
* A minor cleanup of a duplicate include, which was introduced in this
branch.
This branch is based on the previous cleanup pull request.
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Merge tag 'tegra-for-3.10-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: tegra: core SoC support development
This branch includes major development on the core Tegra SoC support code
in the mach-tegra directory:
* SMP support for Tegra114.
* Exposes SoC chip ID and revision through standard sysfs files.
* System-level suspend/resume for Tegra20/30. At present, this only
supports "LP2" mode (CPU power-down), but provides the basis to
implement "LP0"/"LP1" (various levels of core/chip power-down) in the
hopefully near future.
* A minor cleanup of a duplicate include, which was introduced in this
branch.
This branch is based on the previous cleanup pull request.
* tag 'tegra-for-3.10-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: pm: remove duplicated include from pm.c
ARM: tegra: cpuidle: remove redundant parameters for powered-down mode
ARM: tegra: pm: add platform suspend support
ARM: dt: tegra: add bindings of power management configurations for PMC
ARM: tegra: irq: add wake up handling
gpio: tegra: add gpio wakeup source handling
ARM: tegra: moving the CPU power timer function to PMC driver
ARM: tegra: add clock source of PMC to device trees
ARM: tegra: add speedo-based process id for Tegra114
ARM: tegra: expose chip ID and revision
ARM: tegra: bring up secondary CPU for Tegra114
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* It enables the multiplatform build for mach-mxs platform.
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Merge tag 'mxs-multiplatform-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/multiplatform
From Shawn Guo <shawn.guo@linaro.org>:
The mxs multiplatform support for 3.10:
* It enables the multiplatform build for mach-mxs platform.
* tag 'mxs-multiplatform-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: mxs: enable multiplatform build
ARM: mxs: rename debug-macro.S for multiplatform build
ARM: mxs: call mxs_pm_init() as a machine_desc hook
Conflicts:
arch/arm/Kconfig.debug
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Linus Walleij <linus.walleij@linaro.org>:
Ux500 multiplatform support. This tag builds upon the MFD-specific base
tag "ux500-multiplatform-mfd". This removes all <mach/*> dependencies
and makes the ux500 fully multi-platform.
* tag 'ux500-multiplatform-asoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: build hotplug.o for ARMv7-a
ARM: ux500: move to multiplatform
ARM: ux500: make remaining headers local
ARM: ux500: make irqs.h local to platform
ARM: ux500: get rid of <mach/[hardware|db8500-regs].h>
staging: ste_rmi4: kill platform_data hack
ARM: ux500: move mach/msp.h to <linux/platform_data/*>
clk: ux500: pass clock base adresses in init call
ARM: ux500: make debug macro stand-alone
ARM: ux500: move debugmacro to debug includes
ARM: ux500: split out prcmu initialization
mfd: db8500-prcmu: drop unused includes
ARM: ux500: move PM-related PRCMU functions to machine
mfd: db8500-prcmu: get base address from resource
mfd: prcmu: pass a base and size with the early initcall
Conflicts:
arch/arm/Kconfig
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Clean up timer code and move it into drivers/clocksource
* Clean up icoll code and move it into drivers/irqchip
* Clean up clock code to not include <mach/*> headers
* Clean up rtc-stmp3xxx, mxs-lradc and mxs-saif to not include <mach/*>
headers
* Clean up mach-mxs code to get it prepared for multiplatform support
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Merge tag 'mxs-cleanup-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/cleanup
From Shawn Guo <shawn.guo@linaro.org>:
The mxs cleanup for 3.10:
* Clean up timer code and move it into drivers/clocksource
* Clean up icoll code and move it into drivers/irqchip
* Clean up clock code to not include <mach/*> headers
* Clean up rtc-stmp3xxx, mxs-lradc and mxs-saif to not include <mach/*>
headers
* Clean up mach-mxs code to get it prepared for multiplatform support
* tag 'mxs-cleanup-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6: (26 commits)
clocksource: mxs_timer: Add semicolon at end of line
ARM: mxs: remove unused headers
ARM: mxs: merge imx23 and imx28 into one machine_desc
ARM: mxs: remove common.h
ARM: mxs: move mxs_get_ocotp() into mach-mxs.c
ARM: mxs: remove mm.c
ARM: mxs: use debug_ll_io_init for low-level debug
ARM: mxs: get ocotp base address from device tree
ARM: mxs: remove system.c
ARM: mxs: get reset address from device tree
ARM: mxs: remove empty hardware.h
ASoC: mxs-saif: remove mach header inclusion
iio: mxs-lradc: remove unneeded mach header inclusion
rtc: stmp3xxx: use stmp_reset_block() instead
clk: mxs: remove the use of mach level IO accessor
clk: mxs: get base address from device tree
ARM: mxs: remove unneeded mach-types.h inclusion
ARM: mxs: move icoll driver into drivers/irqchip
ARM: mxs: call stmp_reset_block() in icoll
ARM: mxs: get icoll base address from device tree
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'v3.9-rc5' into next/cleanup
This is a dependency for the mxs/cleanup branch.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This branch includes various cleanup of the core Tegra support.
* Unification of the separate board-dt-tegra*.c files into a single
tegra.c, now that everything is DT-driven and basically identical.
* Use of_clk_get() in the Tegra clocksource driver so that clocks are
described in DT rather than hard-coding clock names.
* Some cleanup of the PMC-related code, with the aim that the PMC
"driver" contains more of the code that touches PMC registers, rather
than spreading PMC register accesses through other files.
* Conversion of the "PMC" driver to acquire resources describe in device
tree rather than hard-coding them.
* Use of common code for the CPU sleep TLB invalidation.
This branch is based on the previous fixes pull request.
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Merge tag 'tegra-for-3.10-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/cleanup
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: tegra: cleanup
This branch includes various cleanup of the core Tegra support.
* Unification of the separate board-dt-tegra*.c files into a single
tegra.c, now that everything is DT-driven and basically identical.
* Use of_clk_get() in the Tegra clocksource driver so that clocks are
described in DT rather than hard-coding clock names.
* Some cleanup of the PMC-related code, with the aim that the PMC
"driver" contains more of the code that touches PMC registers, rather
than spreading PMC register accesses through other files.
* Conversion of the "PMC" driver to acquire resources describe in device
tree rather than hard-coding them.
* Use of common code for the CPU sleep TLB invalidation.
This branch is based on the previous fixes pull request.
* tag 'tegra-for-3.10-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: use setup_mm_for_reboot rather than explicit pgd switch
ARM: tegra: replace the CPU power on function with PMC call
ARM: tegra: pmc: add power on function for secondary CPUs
ARM: tegra: pmc: convert PMC driver to support DT only
ARM: tegra: fix the PMC compatible string in DT
ARM: tegra: pmc: add specific compatible DT string for Tegra30 and Tegra114
ARM: tegra: refactor tegra{20,30}_boot_secondary
clocksource: tegra: move to of_clk_get
ARM: tegra: Unify Device tree board files
ARM: tegra: Rename board-dt-tegra20.c to tegra.c
ARM: tegra: Unify tegra{20,30,114}_init_early()
Conflicts:
drivers/clocksource/tegra20_timer.c
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
OMAP PM fixes for v3.10
Note that this has a dependency to omap-for-v3.10/cleanup-v2-signed.
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Merge tag 'omap-for-v3.10/fixes-pm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup
From Tony Lindgren <tony@atomide.com>:
Non-critical PM fix via Kevin Hilman <khilman@linaro.org>:
OMAP PM fixes for v3.10
Note that this has a dependency to omap-for-v3.10/cleanup-v2-signed.
* tag 'omap-for-v3.10/fixes-pm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP4+: PM: Restore CPU power state to ON with clockdomain force wakeup method
Signed-off-by: Arnd Bergmann <arnd@arndb.de<
This branch contains a variety of small build and run-time fixes that
weren't important enough for 3.9.
* Enable CPU errata WARs in secondary reset handler as a preparation
for multi-platform support, and a related fix.
* Don't touch DBLGAR in reset/resume handlers, so enable the code to
run on A15 cores.
* Minor build fixes.
* A fix to the Tegra clock driver.
* Some error-handling fixes.
This branch is based on the previous fixes-for-mmc pull request.
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Merge tag 'tegra-for-3.10-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/fixes-non-critical
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: tegra: minor fixes
This branch contains a variety of small build and run-time fixes that
weren't important enough for 3.9.
* Enable CPU errata WARs in secondary reset handler as a preparation
for multi-platform support, and a related fix.
* Don't touch DBLGAR in reset/resume handlers, so enable the code to
run on A15 cores.
* Minor build fixes.
* A fix to the Tegra clock driver.
* Some error-handling fixes.
This branch is based on the previous fixes-for-mmc pull request.
* tag 'tegra-for-3.10-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: powergate: Don't error out if new state == old state
ARM: tegra: Export tegra_powergate_sequence_power_up()
memory: tegra30: Fix build error w/o PM
ARM: tegra: fix ignored return value of regulator_enable
ARM: tegra: fix the logical detection of power on sequence of warm boot CPUs
ARM: tegra: Fix unchecked return value
ARM: tegra: don't unlock MMIO access to DBGLAR
clk: tegra: No 7.1 super clk dividers on Tegra20
ARM: tegra: remove save/restore of CPU diag register
ARM: tegra: add CPU errata WARs to Tegra reset handler
ARM: dts: tegra: fix the activate polarity of cd-gpio in mmc host
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The i.MX53 ahci platform support is unused in mainline. To demotivate
people using it just remove it from the tree.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* A couple imx35 clock fixes for regressions caused by common clock
framework conversion. The admux and iomux get disabled by common
clock framework late initcall, and hence causes problems.
* Add missing twd clock lookup in device tree. This becomes required
since commit bd60345 (ARM: use device tree to get smp_twd clock)
forces all DT boot to find lookup from device tree.
* Fix imx6q ldb_di clock parents mismatch per reference manual.
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Merge tag 'imx-fixes-3.9-5' of git://git.linaro.org/people/shawnguo/linux-2.6 into fixes
From Shawn Guo <shawn.guo@linaro.org>:
The imx fixes for 3.9, take 5:
* A couple imx35 clock fixes for regressions caused by common clock
framework conversion. The admux and iomux get disabled by common
clock framework late initcall, and hence causes problems.
* Add missing twd clock lookup in device tree. This becomes required
since commit bd60345 (ARM: use device tree to get smp_twd clock)
forces all DT boot to find lookup from device tree.
* Fix imx6q ldb_di clock parents mismatch per reference manual.
* tag 'imx-fixes-3.9-5' of git://git.linaro.org/people/shawnguo/linux-2.6: (217 commits)
ARM i.MX6: Fix ldb_di clock selection
ARM: imx: provide twd clock lookup from device tree
ARM: imx35 Bugfix admux clock
ARM: clk-imx35: Bugfix iomux clock
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
According to the recent i.MX6 Quad technical reference manual, mode 0x4 (100b)
of the CCM_CS2DCR register (address 0x020C402C) bits [11-9] and [14-12] select
the PLL3 clock, and not the PLL3 PFD1 540M clock. In our code, the PLL3 root
clock is named 'pll3_usb_otg', select this instead of the 540M clock.
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
While booting from device tree, imx6q used to provide twd clock lookup
by calling clk_register_clkdev() in clock driver. However, the commit
bd60345 (ARM: use device tree to get smp_twd clock) forces DT boot to
look up the clock from device tree. It causes the failure below when
twd driver tries to get the clock, and hence kernel has to calibrate the
local timer frequency.
smp_twd: clock not found -2
...
Calibrating local timer... 396.13MHz.
Fix the regression by providing twd clock lookup from device tree, and
remove the unused twd clk_register_clkdev() call from clock driver.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The admux clock seems to be the audmux clock as tests show. audmux does
not work without this clock enabled. Currently imx35 does not register a
clock device for audmux. This patch adds this registration. imx-audmux
driver already handles a clock device, so no changes are necessary
there.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Cc: stable@vger.kernel.org
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch enables iomuxc_gate clock. It is necessary to be able to
reconfigure iomux pads. Without this clock enabled, the
clk_disable_unused function will disable this clock and the iomux pads
are not configurable anymore. This happens at every boot. After a reboot
(watchdog system reset) the clock is not enabled again, so all iomux pad
reconfigurations in boot code are without effect.
The iomux pads should be always configurable, so this patch always
enables it.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Cc: stable@vger.kernel.org
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The pull request adds support for MMC/SD and regulator on DA850 EVM.
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Merge tag 'davinci-for-v3.10/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
From Sekhar Nori <nsekhar@ti.com>:
v3.10 DT updates for DaVinci
The pull request adds support for MMC/SD and regulator on DA850 EVM.
* tag 'davinci-for-v3.10/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: da850: override mmc DT node device name
ARM: davinci: da850: add mmc DT entries
mmc: davinci_mmc: add DT support
ARM: davinci: da850: add tps6507x regulator DT data
ARM: regulator: add tps6507x device tree data
Merged into soc branch rather than DT branch to avoid circular dependencies.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
a) adds support for eHRPWM clocks
b) Fix the way MMC/SD IP versions are communicated to driver
in preparation for DT support
c) Minor cleanup in debug-macro.S
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Merge tag 'davinci-for-v3.10/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
From Sekhar Nori <nsekhar@ti.com>:
v3.10 SoC updates for DaVinci
a) adds support for eHRPWM clocks
b) Fix the way MMC/SD IP versions are communicated to driver
in preparation for DT support
c) Minor cleanup in debug-macro.S
* tag 'davinci-for-v3.10/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: remove test for undefined Kconfig macro
ARM: davinci: mmc: derive version information from device name
ARM: davinci: da850: add ECAP & EHRPWM clock nodes
ARM: davinci: clk framework support for enable/disable functionality
Includes an update to Linux 3.9-rc5
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
In order to convert the Tegra MMC driver to using mmc_of_parse(), some
bugs in the Tegra device-tree content need to be fixed first; it's
currently wrong but unused, and mmc_of_parse() causes that data to be
used for the first time.
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Merge tag 'tegra-for-3.10-fixes-for-mmc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/dt
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: tegra: DT-related fixes needed by the MMC tree
In order to convert the Tegra MMC driver to using mmc_of_parse(), some
bugs in the Tegra device-tree content need to be fixed first; it's
currently wrong but unused, and mmc_of_parse() causes that data to be
used for the first time.
* tag 'tegra-for-3.10-fixes-for-mmc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: dts: tegra: fix the activate polarity of cd-gpio in mmc host
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
have an Ethernet interface.
Little fixes mainly related to at91sam9x5 DT, IIO ADC bindings,
pinctrl for at91sam9260/g20 DT and the RTC addition.
Addition of the Acme Systems Aria G25 board.
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Merge tag 'at91-dt' of git://github.com/at91linux/linux-at91 into next/dt
From Nicolas Ferre <nicolas.ferre@atmel.com>:
One macb DT node move for 9x5 family: 9g15 doesn't
have an Ethernet interface.
Little fixes mainly related to at91sam9x5 DT, IIO ADC bindings,
pinctrl for at91sam9260/g20 DT and the RTC addition.
Addition of the Acme Systems Aria G25 board.
* tag 'at91-dt' of git://github.com/at91linux/linux-at91:
ARM: at91/at91sam9260.dtsi: fix u(s)art pinctrl encoding
ARM: at91: dts: add adc resolution stuff
ARM: at91: add Acme Systems Aria G25 board
ARM: at91/dt: fix macb node declaration
ARM: at91: remove partial parameter in bootargs for at91sam9x5ek.dtsi
ARM: at91/trivial: fix model name for SAM9G15-EK
ARM: at91/trivial: typos in compatible property
ARM: at91/at91sam9x5: add RTC node
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This branch (patch) converts BCM2835 to support being built into a
multi-platform single zImage. This mostly entails a few small Kconfig
tweaks, move the earlyprintk implementation to the standard multi-
platform location, and deleting some unnecessary files.
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Merge tag 'bcm2835-for-3.10-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi into next/multiplatform
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: bcm2835: convert to multi-platform
This branch (patch) converts BCM2835 to support being built into a
multi-platform single zImage. This mostly entails a few small Kconfig
tweaks, move the earlyprintk implementation to the standard multi-
platform location, and deleting some unnecessary files.
* tag 'bcm2835-for-3.10-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi:
ARM: bcm2835: convert to multi-platform
Conflicts:
arch/arm/Kconfig
arch/arm/Kconfig.debug
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This enables the fixes for the below erratas
applicable for OMAP4 Socs.
754322: Faulty MMU translations following ASID switch
775420: A data cache maintenance operation which aborts,
followed by an ISB, without any DSB in-between,
might lead to deadlock
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
In some situations it is useful for userspace to
know some SoC-specific information. For example,
this may be used for deciding what kernel module to
use or how to better configure some settings etc.
This patch exports OMAP SoC information to userspace
using existing in Linux kernel SoC infrastructure.
This information can be read under
/sys/devices/socX directory
Signed-off-by: Ruslan Bilovol <ruslan.bilovol@ti.com>
[tony@atomide.com: updated for multiplatform changes]
Signed-off-by: Tony Lindgren <tony@atomide.com>
This is a long story where for each new generation of
OMAP we used different approaches for creating
strings for SoCs names and revisions that this patch
fixes. It makes future exporting of this information
to SoC infrastructure easier.
Signed-off-by: Ruslan Bilovol <ruslan.bilovol@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The TIME_VALID flag is specified for the different states but
the time residency computation is not done, no tk flag, no time
computation in the idle function.
Set the en_core_tk_irqen flag to activate it.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
The davinci_enter_idle is called from the cpuidle with the
cpuidle_wrap_enter function. This one does the time compution
for entering and exiting the idle function and then we call
again cpuidle_wrap_enter for cpu_do_idle. This is wrong, we
are calling recursively cpuidle_wrap_enter for nothing and
furthermore reenabling the local irq.
Remove this and replace it by the cpu_do_idle function.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
dev->state_count is initialized automatically by
cpuidle_register_device().
When drv->state_count is equal to dev->state_count, no need to init
this field, so removing it.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Initialize the idle states directly in the driver structure.
That prevents extra structure declaration and memcpy at init time.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Remove the shmobile_enter_wfi function which is the same as the
common WFI enter function from the arm cpuidle driver defined
with the ARM_CPUIDLE_WFI_STATE macro.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Add the __init section for the functions which are called
at init time.
Signed-off-by: Daniel Lezcano <daniel.linaro.org>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
In the early days, the A10 and A13 shared quite some code. Nowadays it
shares less and less code, the A31 diverging even more, so it doesn't
make much sense to continue to maintain this structure, just use one
DTSI for every SoC, and that's it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Allwinner sun6i (A31) has a slightly different watchdog, that
doesn't allow to use the already existing restart code.
Rework a bit the restart code to allow to plug in more easily different
restart handlers depending on the device tree.
In the past, we were also meaning sunxi as a generic name covering all
Allwinner SoCs. This won't be true anymore with the A31 (sun6i) that
differs pretty much from sun4i and sun5i, and we will end up having
sunxi, for sun4i and sun5i, and sun6i, which is neither consistent nor
convenient. So, while we're at it, also change sunxi to sun4i.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This allows to remove some boilerplate code. At the same time, call the
set_handle_irq function in the initialization function of the irqchip,
so that we can remove it from the machine declaration.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
During the introduction of the Allwinner SoC platforms, sunxi was
initially meant as a generic name for all the variants of the Allwinner
SoC.
It was ok at the time of the support of only the A10 and A13 that
looks pretty much the same, but it's beginning to be troublesome with
the future addition of the Allwinner A31 (sun6i) that is quite
different, and would introduce some weird logic, where sunxi would
actually mean in some case sun4i and sun5i but without sun6i...
Moreover, it makes the compatible strings naming scheme not consistent
with other architectures, where usually for this kind of compability, we
just use the oldest SoC name that has this IP, so let's do just this.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Using CLKSRC_OF allows to remove the SoC specific sunxi_timer.h header,
and instead of using a custom init function in the machine definition
use the standard clocksource_of_init function.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
- Rename the clock compatible introduced in the first pull request for 3.10
- Complete the UART support for A13 and A10
- Adds clock gates support
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Merge tag 'sunxi-dt-for-3.10-2' of git://github.com/mripard/linux into next/dt
From Maxime Ripard <maxime.ripard@free-electrons.com>:
ARM: sunxi: dt additions for 3.10, take 2
- Rename the clock compatible introduced in the first pull request for 3.10
- Complete the UART support for A13 and A10
- Adds clock gates support
* tag 'sunxi-dt-for-3.10-2' of git://github.com/mripard/linux:
arm: sunxi: Add clock to pinctrl node
arm: sunxi: use the right clock phandles for UARTs
arm: sunxi: Add clock definitions for AXI, AHB, APB0, APB1 gates
ARM: sunxi: cubieboard: Add UART muxing
ARM: sunxi: hackberry: Add UART muxing
ARM: sunxi: dt: Add A10 UARTs to the dtsi.
ARM: sunxi: dt: Add uart3 dt node
ARM: sunxi: dt: Move uart0 to sun4i-a10.dtsi
ARM: sunxi: Rename uart nodes to serial
ARM: sunxi: dt: Use clocks property instead of clock-frequency for the UARTs
arm: sunxi: rename clock compatible strings
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This branch (patch) updates bcm2835_defconfig to enable new features that
were added this kernel cycle. Namely, the SPI controller and HW random
number generator.
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Merge tag 'bcm2835-for-3.10-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi into next/soc
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: bcm2835: defconfig updates
This branch (patch) updates bcm2835_defconfig to enable new features that
were added this kernel cycle. Namely, the SPI controller and HW random
number generator.
* tag 'bcm2835-for-3.10-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi:
ARM: bcm2835: defconfig updates
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This branch adds two devices to the BCM2835 SoC device tree: the SPI
controller and the HW random number generator.
The SPI controller isn't actually instantiated in the Raspberry Pi
device tree, since there are no on-board SPI devices; it's up to the
end-user to modify their own device-tree to describe whatever they
have attached.
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Merge tag 'bcm2835-for-3.10-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi into next/dt
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: bcm2835: device tree updates
This branch adds two devices to the BCM2835 SoC device tree: the SPI
controller and the HW random number generator.
The SPI controller isn't actually instantiated in the Raspberry Pi
device tree, since there are no on-board SPI devices; it's up to the
end-user to modify their own device-tree to describe whatever they
have attached.
* tag 'bcm2835-for-3.10-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi:
ARM: bcm2835: add Broadcom BCM2835 RNG to the device tree
ARM: bcm2835: add SPI device to DT
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Michal Simek <michal.simek@xilinx.com>:
It enables pmu support for zynq.
* 'zynq/core' of git://git.xilinx.com/linux-xlnx:
arm: zynq: Add support for pmu
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
For OMAP2+ SoCs, convert the SHA/MD5 and AES accelerator integration
code and data to use hwmod and omap_device. This is a prerequisite for
moving the hwmod code out of arch/arm.
Basic test logs are available at:
http://www.pwsan.com/omap/testlogs/sham_aes_integration_devel_3.10/20130330155313/
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Merge tag 'omap-for-v3.10/crypto-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
From Tony Lindgren <tony@atomide.com>:
Omap crypto related bus level changes via Paul Walmsley <paul@pwsan.com>:
For OMAP2+ SoCs, convert the SHA/MD5 and AES accelerator integration
code and data to use hwmod and omap_device. This is a prerequisite for
moving the hwmod code out of arch/arm.
Basic test logs are available at:
http://www.pwsan.com/omap/testlogs/sham_aes_integration_devel_3.10/20130330155313/
* tag 'omap-for-v3.10/crypto-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: AM33XX: hwmod: Update and uncomment AES0 module data
ARM: AM33XX: Add aes0 crypto clock data
ARM: OMAP2+: Only manually add hwmod data when DT not used.
ARM: OMAP2+: Remove unnecessary message when no AES IP is present
ARM: OMAP3xxx: hwmod: Convert AES crypto device data to hwmod
ARM: OMAP2xxx: hwmod: Convert AES crypto devcie data to hwmod
ARM: AM33XX: hwmod: Update and uncomment SHA0 module data
ARM: AM33XX: Add sha0 crypto clock data
ARM: OMAP2+: Only manually add hwmod data when DT not used.
ARM: OMAP2+: Remove unnecessary message when no SHA IP is present
ARM: OMAP3xxx: hwmod: Convert SHAM crypto device data to hwmod
ARM: OMAP2xxx: hwmod: Add DMA support for SHAM module
ARM: OMAP2xxx: hwmod: Convert SHAM crypto device data to hwmod
ARM: OMAP2+: clock data: Remove CK_* flags
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Mostly clock and PM related with removal of now unused
DMA channel definitions. The clock change to use SoC
specific lists will make it a little bit easier to
add support for new SoCs variants without having to patch
all over the place.
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Merge tag 'omap-for-v3.10/cleanup-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup
From Tony Lindgren <tony@atomide.com>:
Clean up related changes for v3.10 merge window.
Mostly clock and PM related with removal of now unused
DMA channel definitions. The clock change to use SoC
specific lists will make it a little bit easier to
add support for new SoCs variants without having to patch
all over the place.
* tag 'omap-for-v3.10/cleanup-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP4: Fix the init code to have OMAP4460 errata available in DT build
ARM: OMAP4: PM: Now remove L4 per clockdomain static depedency with MPU
ARM: OMAP4: PM: Remove L4 wakeup depedency with MPU since errata fix exist now
ARM: OMAP4+: Move the CPU wakeup prepare code under smp_prepare_cpus()
ARM: OMAP4+: Remove out of placed smp_wmb() in secondary wakeup code
ARM: OMAP4+: Remove un-necessary cacheflush in secondary CPU boot path
ARM: OMAP4+: Remove the un-necessary cache flush from hotplug code
ARM: OMAP2+: PM: Remove bogus fiq_[enable/disable] tuple
ARM: OMAP4+: Use common scratchpad SAR RAM offsets for all architectures
ARM: OMAP2+: Remove unused DMA channel definitions
ARM: OMAP1: Remove unused DMA channel definitions
ARM: OMAP2+: clock data: Remove CK_* flags
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
of these fixes are needed to support omap5 es2 version that includes
PM features while the earlier version es1 did not.
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Merge tag 'omap-for-v3.10/fixes-non-critical-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/fixes-non-critical
From Tony Lindgren <tony@atomide.com>:
Non critical omap fixes for v3.10 merge window. A big chunk
of these fixes are needed to support omap5 es2 version that includes
PM features while the earlier version es1 did not.
* tag 'omap-for-v3.10/fixes-non-critical-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: fix typo "CONFIG_BRIDGE_DVFS"
ARM: OMAP1: remove "config MACH_OMAP_HTCWIZARD"
ARM: OMAP: dpll: enable bypass clock only when attempting dpll bypass
ARM: OMAP2+: powerdomain: avoid testing whether an unsigned char is less than 0
ARM: OMAP2+: hwmod: Remove unused _HWMOD_WAKEUP_ENABLED flag
ARM: OMAP2+: am335x: Change the wdt1 func clk src to per_32k clk
ARM: OMAP2+: AM33xx: hwmod: Add missing sysc definition to wdt1 entry
Contains an update to 3.9-rc5
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Remove trailing semicolon from register-access macros.
Signed-off-by: Johan Hovold <jhovold@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
- A couple mxs boards that run I2C at 400 kHz experience some unstable
issue occasionally. Slow down the clock speed to have I2C work
reliably.
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Merge tag 'mxs-fixes-3.9-4' of git://git.linaro.org/people/shawnguo/linux-2.6 into fixes
From Shawn Guo <shawn.guo@linaro.org>:
The mxs fixes for 3.9, take 4:
- A couple mxs boards that run I2C at 400 kHz experience some unstable
issue occasionally. Slow down the clock speed to have I2C work
reliably.
* tag 'mxs-fixes-3.9-4' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: mxs: Slow down the I2C clock speed
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fix a few trivial typos in panic, warning and debug messages.
Signed-off-by: Johan Hovold <jhovold@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Use the generic idle loop and replace enable/disable_hlt with the
respective core functions.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Paul McKenney <paulmck@linux.vnet.ibm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Reviewed-by: Cc: Srivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Russell King <linux@arm.linux.org.uk>
Tested-by: Kevin Hilman <khilman@linaro.org> # OMAP
Link: http://lkml.kernel.org/r/20130321215233.826238797@linutronix.de
enable/disable_hlt() does not need to be exported and can be killed on
architectures which do not use it at all.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Paul McKenney <paulmck@linux.vnet.ibm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Reviewed-by: Cc: Srivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com>
Cc: Magnus Damm <magnus.damm@gmail.com>
Link: http://lkml.kernel.org/r/20130321215233.377959540@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
The only user of Kconfig symbol EXYNOS_DEV_DRM was removed in commit
0a9d5ac307 ("ARM: EXYNOS: removing exynos-drm device registration
from non-dt platforms"). It is safe to remove this symbol too.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch changes the name of USB ohci header from 'usb-exynos.h'
to 'usb-ohci-exynos.h'. This is because this header file has
the platdata for only EXYNOS OHCI.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch removes the usage of DMACH_DT_PROP and dt_dmach_prop
from dma code as the new generic dma dt binding support has been
added.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
There is currently no users of these definitions so remove them.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
If we try to build this file in a multiplatform configuration with
ARMv6 enabled, gas complains about the dsb operation being undefined.
Adding -march=armv7-a is safe because that code is only ever run
on ux500, which is Cortex-A9.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Nothing is holding us up any more, and we can make ux500 coexist
with the rest of the platforms. The timex.h and uncompress.h
headers are no longer needed now.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
mach/setup.h and mach/devices.h are only needed from inside of mach-ux500
now, so we can simply move them out of the include/mach directory.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
With the PRCMU out of the way, nothing outside of mach-ux500
uses mach/irqs.h any more, so we can make it a local header file,
including the two sub-headers.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This removes <mach/hardware.h> and <mach/db8500-regs.h>
from the Ux500, merging them into the local include
"db8500-regs.h" in mach-ux500. There is some impact
outside the ux500 machine, but most of it is dealt with
in earlier patches.
Contains portions of a clean-up patch from Arnd Bergmann.
Cc: Samuel Ortiz <sameo@linux.intel.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
There is only one instance of the platform data for synaptics_i2c_rmi4
in the mainline kernel, so there is no point of pretending its
variable here. The only member that has a dependency on the platform
is actually the interrupt number, and there is a field in the
i2c_client structure that gets initialized from the board info,
so we can trivially move the board_into into the platform without
knowledge of the platform_data structure.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This header file only contains platform data structure definitions,
so it's straightforward to move.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[Delete one include rather than move it]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The ux500 clock driver was including <mach/db8500-regs.h>
which will not work when building for multiplatform support
since <mach/*> is going away.
Pass the base adresses in the init call instead.
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Mike Turquette <mturquette@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This pushes the knowledge of physical addresses down into
the debug macro so we can get rid of the <mach/hardware.h>
dependency.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This moves the Ux500 debug macro to the debug headers to
make way for multiplatform support.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This untangles the final bits of the prcmu code from the platform
code:
* The IRQ_PRCMU_* definitions move from irqs-db8500.h into prcmu.c
because they are only of local significance.
* u8500_thsens_device goes into the prcmu, because it uses a PRCMU
IRQ that the platform does not see.
* IRQ_DB8500_AB8500 and IRQ_PRCMU_BASE go into the platform data
because the PRCMU does not see it.
Acked-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[Fixed a oneliner bug]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
We are trying to decompose and decentralize the code in
the DB8500 PRCMU out into subdrivers. The code moved in
this patch concerns a group of functions used for
decoupling and recoupling the IRQs from the GIC. During
sleep and idle the Ux500 system will transfer all IRQ
handling to the PRCMU using these functions.
Basically we are left with the two alternatives of code
placement as:
- arch/arm/mach-ux500/pm.c - this because the code is
closely related to the GIC, and takes ownership of
some of the registers from the PRCMU related to this
PM functionality.
- drivers/mfd/db8500-prcmu-pm.c - because the code is
affecting stuff in the PRCMU register range. But then
this code needs to remap and handle GIC registers.
This patch implementation is taking the first approach.
Currently the cpuidle driver is the only piece of code
using this set of functions, but it will later also be
used by the suspend/resume code which is currently under
review.
The header file is moved to:
<linux/platform_data/arm-ux500-pm.h>
The function prototypes need to be placed in a globally
visible header since the CPUidle code is planned to move
out to drivers/cpuidle.
Acked-by: Samuel Ortiz <sameo@linux.intel.com>
Acked-by: Rickard Andersson <rickard.andersson@stericsson.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
We cannot use a global variable stored in <mach/hardware.h> to
find the base address of the PRCMU. The real resource is already
there from the board, so use this to look up the base address
instead.
Currently the patch is kept minimal so as not to interfere with
other work being done on refactoring this driver, but at a later
point the defines using (prcmu_base + 0xnnn) need to be replaced
by pure offset defined for (0xnnn) and the base inlined with the
readl()/writel() and similar codepaths.
Acked-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch will make an early remapping of the PRCMU, to be
used when setting up the clocks, that will call down into parts
of the PRCMU driver before it is probed.
Going forward this will be removed like this:
- The mailbox subsystem need to be merged.
http://marc.info/?l=linux-kernel&m=136314559201983&w=2
- At this point the PRCMU clock code can be moved over to the
ux500 clock driver in drivers/clk/ux500/* and maintained
there in a decentralized manner.
- This early initcall and PRCMU base parameters become part of
the ux500_clk_init() call instead.
Cc: Suman Anna <s-anna@ti.com>
Cc: Loic Pallardy <loic.pallardy@st.com>
Acked-by: Samuel Ortiz <sameo@linux.intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch moves cpufreq driver of ARM based integrator platform to
drivers/cpufreq.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This patch moves cpufreq driver of ARM based pxa2xx platform to drivers/cpufreq.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Eric Miao <eric.y.miao@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This patch moves cpufreq driver of ARM based pxa3xx platform to drivers/cpufreq.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Eric Miao <eric.y.miao@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This patch moves cpufreq driver of ARM based davinci platform to
drivers/cpufreq.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This patch moves cpufreq driver of ARM based tegra platform to drivers/cpufreq.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Let's do the changes properly and fix the same problem everywhere, not
just for one case.
Cc: <stable@vger.kernel.org> # kernels containing 15e0d9e37c or equivalent
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Conflicts:
drivers/nfc/microread/mei.c
net/netfilter/nfnetlink_queue_core.c
Pull in 'net' to get Eric Biederman's AF_UNIX fix, upon which
some cleanups are going to go on-top.
Signed-off-by: David S. Miller <davem@davemloft.net>
Here is the big Gadget & PHY pull request. Many of us have
been really busy lately getting multiple drivers to a better
position.
Since this pull request is so large, I will divide it in sections
so it's easier to grasp what's included.
- cleanups:
. UDC drivers no longer touch gadget->dev, that's now udc-core
responsibility
. Many more UDC drivers converted to usb_gadget_map/unmap_request()
. UDC drivers no longer initialize DMA-related fields from gadget's
device structure
. UDC drivers don't touch gadget.dev.driver directly
. UDC drivers don't assign gadget.dev.release directly
. Removal of some unused DMA_ADDR_INVALID
. Introduction of CONFIG_USB_PHY
. All phy drivers have been moved to drivers/usb/phy and renamed to
a common naming scheme
. Fix PHY layer so it never returns a NULL pointer, also fix all
callers to avoid using IS_ERR_OR_NULL()
. Sparse fixes all over the place
. drivers/usb/otg/ has been deleted
. Marvel drivers (mv_udc, ehci-mv, mv_otg and mv_u3d) improved clock
usage
- new features:
. UDC core now provides a generic way for tracking and reporting
UDC's state (not attached, resuming, suspended, addressed,
default, etc)
. twl4030-usb learned that it shouldn't be enabled during init
. Full DT support for DWC3 has been implemented
. ab8500-usb learned about pinctrl framework
. nop PHY learned about DeviceTree and regulators
. DWC3 learned about suspend/resume
. DWC3 can now be compiled in host-only and gadget-only (as well as
DRD) configurations
. UVC now enables streaming endpoint based on negotiated speed
. isp1301 now implements the PHY API properly
. configfs-based interface for gadget drivers which will lead to
the removal of all code which just combines functions together
to build functional gadget drivers.
. f_serial and f_obex were converted to new configfs interface while
maintaining old interface around.
- non-critical fixes:
. UVC gadget driver got fixes for Endpoint usage and stream calculation
. ab8500-usb fixed unbalanced clock and regulator API usage
. twl4030-usb got a fix for when OMAP3 is booted with cable connected
. fusb300_udc got a fix for DMA usage
. UVC got fixes for two assertions of the USB Video Class Compliance
specification revision 1.1
. build warning issues caused by recent addition of __must_check to
regulator API
These are all changes which deserve a mention, all other changes are related
to these one or minor spelling fixes and other similar tasks.
Signed-of-by: Felipe Balbi <balbi@ti.com>
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Merge tag 'usb-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
Felipe writes:
usb: patches for v3.10 merge window
Here is the big Gadget & PHY pull request. Many of us have
been really busy lately getting multiple drivers to a better
position.
Since this pull request is so large, I will divide it in sections
so it's easier to grasp what's included.
- cleanups:
. UDC drivers no longer touch gadget->dev, that's now udc-core
responsibility
. Many more UDC drivers converted to usb_gadget_map/unmap_request()
. UDC drivers no longer initialize DMA-related fields from gadget's
device structure
. UDC drivers don't touch gadget.dev.driver directly
. UDC drivers don't assign gadget.dev.release directly
. Removal of some unused DMA_ADDR_INVALID
. Introduction of CONFIG_USB_PHY
. All phy drivers have been moved to drivers/usb/phy and renamed to
a common naming scheme
. Fix PHY layer so it never returns a NULL pointer, also fix all
callers to avoid using IS_ERR_OR_NULL()
. Sparse fixes all over the place
. drivers/usb/otg/ has been deleted
. Marvel drivers (mv_udc, ehci-mv, mv_otg and mv_u3d) improved clock
usage
- new features:
. UDC core now provides a generic way for tracking and reporting
UDC's state (not attached, resuming, suspended, addressed,
default, etc)
. twl4030-usb learned that it shouldn't be enabled during init
. Full DT support for DWC3 has been implemented
. ab8500-usb learned about pinctrl framework
. nop PHY learned about DeviceTree and regulators
. DWC3 learned about suspend/resume
. DWC3 can now be compiled in host-only and gadget-only (as well as
DRD) configurations
. UVC now enables streaming endpoint based on negotiated speed
. isp1301 now implements the PHY API properly
. configfs-based interface for gadget drivers which will lead to
the removal of all code which just combines functions together
to build functional gadget drivers.
. f_serial and f_obex were converted to new configfs interface while
maintaining old interface around.
- non-critical fixes:
. UVC gadget driver got fixes for Endpoint usage and stream calculation
. ab8500-usb fixed unbalanced clock and regulator API usage
. twl4030-usb got a fix for when OMAP3 is booted with cable connected
. fusb300_udc got a fix for DMA usage
. UVC got fixes for two assertions of the USB Video Class Compliance
specification revision 1.1
. build warning issues caused by recent addition of __must_check to
regulator API
These are all changes which deserve a mention, all other changes are related
to these one or minor spelling fixes and other similar tasks.
Signed-of-by: Felipe Balbi <balbi@ti.com>
While waking up CPU from off state using clock domain force wakeup, restore
the CPU power state to ON state before putting CPU clock domain under
hardware control. Otherwise CPU wakeup might fail. The change is recommended
for all OMAP4+ devices though the PRCM weakness was observed on OMAP5
devices first.
As a result of weakness, lock-up is observed inside the hardware state
machine of local CPU PRCM and results are UN-predictable as per designers.
In software testing, we have seen hard-locks most of the time where system
gets frozen. With power domain state restored, system behaves correctly.
So update the code accordingly.
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
The recent dtc+cpp support allows header files and C pre-processor
defines/macros to be used when compiling device tree files. These
headers will typically define various constants that are part of the
device tree bindings.
The original patch which set up the dtc+cpp include path only considered
using those headers from device tree files. However, most are also
useful for kernel code which needs to interpret the device tree.
In both the DT files and the kernel, I'd like to include the DT-related
headers in the same way, for example, <dt-bindings/gpio/tegra-gpio.h>.
That will simplify any text which discusses the DT header locations.
Creating a <dt-bindings/> for kernel source to use is as simple as
placing files into include/dt-bindings/.
However, when compiling DT files, the include path should be restricted
so that only the dt-bindings path is available; arbitrary kernel headers
shouldn't be exposed. For this reason, create a specific include
directory for use by dtc+cpp, and symlink dt-bindings from there to the
actual location of include/dt-bindings/. For want of a better location,
place this "include chroot" into the existing dts/ directory.
arch/*/boot/dts/include/dt-bindings -> ../../../../../include/dt-bindings
Some headers used by device tree files may not be useful to the kernel;
they may be used simply to aid in constructing the DT file (e.g. macros
to create a node), but not define any information that the kernel needs
to share. These may be placed directly into arch/*/boot/dts/ along with
the DT files themselves.
Acked-by: Michal Marek <mmarek@suse.cz>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This patch modifies platform data structure of max8952 driver to
use pointer to regulator_init_data struct instead of embedding it.
This is a prerequisite for adding Device Tree support for the driver.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The port controller needs the apb0_pio clock enabled to be able to
work. This commit declares that on the device tree.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
All the UARTs are connected to clock gates; now that our clock driver
is able to handle them, make the switch.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit adds the corresponding DT bindings for all the AXI,
AHB, APB0 and APB1 gates.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add the ADC low and high resolution configuration and which one to use.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Macb0 node cannot be activated in generic sam9x5ek.dtsi file
as the sam9g15 does not have one.
Move the macb0 & macb1 activation in board .dts file that
support them.
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Remove files that are not needed by multiplatform build, and make
necessary changes on Kconfig to enable multiplatform build.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The device_initcall is not a friend of multiplatform build. Call
mxs_pm_init() as a machine_desc hook instead of device_initcall.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Now that a display timing binding is available, convert our almost identical
binding to use the standard binding.
This patch converts the vt8500 and wm8505 framebuffer drivers and
associated dts/dtsi files to use the standard binding as defined in
bindings/video/display-timing.txt.
There are two side-effects of making this conversion:
1) The fb node should now be in the board file, rather than the soc file as
the display-timing node is a child of the fb node.
2) We still require a bits per pixel property to initialize the framebuffer
for the different lcd panels. Rather than including this as part of the
display timing, it is moved into the framebuffer node.
I have also taken the opportunity to alphabetise the includes of each
driver to avoid double-ups.
Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Zynq is standard PMU with 2 interrupt per core.
There is also access via register which is not used right now.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Only cortex-a9 based samsung platforms have l2x0 cache controller. Hence check
the same before restoring the cache in resume.
This is needed for single kernel image.
Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
A slightly slower rate provides more reliable jack detection during
slower insertions.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch clears the DMA flags when a DMA channel is requested. This is
necessary because otherwise the channel may inherit incompatible
settings from its last usage.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Setting this bit to 0 causes the system to wait until suspended
to use the wakeup masks. With it being set high previously,
masked interrupts were being received and processed before the
EINT_WAKEUP_MASK was configured.
Signed-off-by: Jonathan Kliegman <kliegs@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
For legacy reasons EINT_0 was being forced on for all
exynos systems as a wake interrupt. For boards that need
EINT_0 they should probably enable it with enable_irq_wake
Signed-off-by: Jonathan Kliegman <kliegs@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
S3C2412 boards are already under "if CPU_S3C2412" condition, so
additional dependencies on this symbol can be removed.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
S3C2410 boards are already under "if CPU_S3C2410" condition, so
additional dependencies on this symbol can be removed.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Board options are already under "if ARCH_S3C24XX" condition, so
additional dependencies on this symbol can be removed.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
