Commit Graph

33 Commits

Author SHA1 Message Date
Wolfram Sang
a528fab6cc Merge tag 'topic/designware-baytrail-2017-03-02' of git://anongit.freedesktop.org/git/drm-intel into i2c/for-next
Pull immutable branch as a common base for further development:

"Baytrail PMIC vs. PMU race fixes from Hans de Goede

This time the right version (v4), with the compile fix."
2017-03-22 09:32:44 +01:00
Zhangfei Gao
ab809fd81f i2c: designware: add reset interface
Some platforms like hi3660 need do reset first to allow accessing registers

Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: Ramiro Oliveira <ramiro.oliveira@synopsys.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-03-08 18:15:18 +01:00
Hans de Goede
fd476fa22a i2c: designware-baytrail: Add support for cherrytrail
The cherrytrail punit has the pmic i2c bus access semaphore at a
different register address.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Takashi Iwai <tiwai@suse.de>
Tested-by: Takashi Iwai <tiwai@suse.de>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Acked-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20170210102802.20898-9-hdegoede@redhat.com
2017-03-02 15:46:34 +01:00
Hans de Goede
086cb4afef i2c: designware-baytrail: Disallow the CPU to enter C6 or C7 while holding the punit semaphore
On my cherrytrail tablet with axp288 pmic, just doing a bunch of repeated
reads from the pmic, e.g. "i2cdump -y 14 0x34" would lookup the tablet in
1 - 3 runs guaranteed.

This seems to be causes by the cpu trying to enter C6 or C7 while we hold
the punit bus semaphore, at which point everything just hangs.

Avoid this by disallowing the CPU to enter C6 or C7 before acquiring the
punit bus semaphore.

BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=109051
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Tested-by: Takashi Iwai <tiwai@suse.de>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Acked-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20170210102802.20898-7-hdegoede@redhat.com
2017-03-02 15:46:33 +01:00
Hans de Goede
86524e5402 i2c: designware: Rename accessor_flags to flags
Rename accessor_flags to flags, so that we can use the field for
other flags too. This is a preparation patch for adding cherrytrail
support to the punit semaphore code.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Tested-by: Takashi Iwai <tiwai@suse.de>
Acked-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20170210102802.20898-4-hdegoede@redhat.com
2017-03-02 15:46:31 +01:00
Jarkko Nikula
12688dc21f Revert "i2c: designware: detect when dynamic tar update is possible"
This reverts commit 63d0f0a695.

It caused a regression on platforms where I2C controller is synthesized
with dynamic TAR update disabled. Detection code is testing is bit
DW_IC_CON_10BITADDR_MASTER in register DW_IC_CON read-only but fails to
restore original value in case bit is read-write.

Instead of fixing this we revert the commit since it was preparation for
the commit 0317e6c0f1 ("i2c: designware: do not disable adapter after
transfer") which was also reverted.

Reported-by: Shah Nehal-Bakulchandra <Nehal-bakulchandra.Shah@amd.com>
Reported-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Acked-By: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: <stable@vger.kernel.org> # v4.9+
Fixes: 63d0f0a695 ("i2c: designware: detect when dynamic tar update is possible")
Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-02-14 22:10:26 +01:00
Alexander Stein
f06122f0bd i2c: designware: Consolidate default functionality bits
Use a common place for default functionality bits for both platform
and pci driver.

Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-11-29 20:19:56 +01:00
Lucas De Marchi
63d0f0a695 i2c: designware: detect when dynamic tar update is possible
This adapter can be synthesized with dynamic tar update enabled or disabled.
When enabled it is not necessary to disable the adapter to change the slave
address in some situations, which saves some time per transaction.

There is no direct register to know if this feature is enabled but we can do it
indirectly by writing to the 10BIT_ADDR field in IC_CON: this field is
read only when dynamic tar update is enabled.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Tested-by: Christian Ruppert <christian.ruppert@alitech.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-08-26 00:42:15 +02:00
Weifeng Voon
b6e67145f1 i2c: designware: Enable high speed mode
This patch enabled high speed mode. High speed mode can be turn on by
setting the clk_freq to 3400000. High speed HCNT and LCNT are needed
as there is no default value provided.

Signed-off-by: Weifeng Voon <weifeng.voon@intel.com>
Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-08-26 00:42:07 +02:00
Weifeng Voon
a92ec1746f i2c: designware: get fast plus and high speed *CNT configuration
I2C designware controller can run at fast mode plus and high speed. This
patch adds the capability to get the HCNT, LCNT configuration via
FPCN (fast plus) and HSCN (high speed) ACPI method.

Signed-off-by: Weifeng Voon <weifeng.voon@intel.com>
Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-08-26 00:42:03 +02:00
Weifeng Voon
19c0a5399f i2c: designware: Move clk_freq into struct dw_i2c_dev
I2c designware controller operate speed is configured in the register
IC_CON. Previously the operate speed is determined by a local variable
clk_freq. This patch will move the local variable clk_freq into struct
dw_i2c_dev. This change will ease the set and get of the clk_freq.

Signed-off-by: Weifeng Voon <weifeng.voon@intel.com>
Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-08-26 00:42:02 +02:00
Andy Shevchenko
ed1bf03470 i2c: designware-pci: Make bus number allocation robust
On some platforms, such as Intel Medfield, the I2C slave devices are enumerated
through SFI tables where bus numbering is expected to be defined in the OS.
Make the bus number allocation robust for such platforms.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-06-19 19:34:16 +02:00
Baruch Siach
e3c9765008 i2c: designware: remove redundant lock
The per adapter bus_lock already projects from concurrent calls to the
master_xfer callback. No need to add a driver internal lock.

Also, rephrase a comment to drop mention of this lock.

Reported-by: Rongrong Zou <zourongrong@gmail.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-02-12 20:40:12 +01:00
Xiangliang Yu
2d244c8148 i2c: designware: fix IO timeout issue for AMD controller
Because of some hardware limitation, AMD I2C controller can't
trigger pending interrupt if interrupt status has been changed
after clearing interrupt status bits. Then, I2C will lost
interrupt and IO timeout.

According to hardware design, this patch implements a workaround
to disable i2c controller interrupt and re-enable i2c interrupt
before exiting ISR.

To reduce the performance impacts on other vendors, use unlikely
function to check flag in ISR.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org
2015-12-12 18:00:16 +01:00
Jarkko Nikula
d80d134182 i2c: designware: Move common probe code into i2c_dw_probe()
There is some code duplication in i2c-designware-platdrv and
i2c-designware-pcidrv probe functions. What is even worse that duplication
requires i2c_dw_xfer(), i2c_dw_func() and i2c_dw_isr() i2c-designware-core
functions to be exported.

Therefore move common code into new i2c_dw_probe() and make functions above
local to i2c-designware-core.

While merging the code patch does following functional changes:

- I2C Adapter name will be "Synopsys DesignWare I2C adapter". Previously it
  was used for platform and ACPI devices but PCI device used
  "i2c-designware-pci".
- Using device name for interrupt name. Previous it was platform device name,
  ACPI device name or "i2c-designware-pci".
- Error code from devm_request_irq() and i2c_add_numbered_adapter() will be
  printed in case of error.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-15 14:09:37 +02:00
Jarkko Nikula
8a43745952 i2c: designware: Make dw_readl() and dw_writel() static
dw_readl() and dw_writel() are not used outside of i2c-designware-core and
they are not exported so make them static and remove their forward
declaration.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-15 14:08:22 +02:00
Jarkko Nikula
f6ed2b79dc i2c: designware: Remove unused functions
i2c_dw_is_enabled() became unused by the commit be58eda775
("i2c: designware-pci: Cleanup driver power management") and
i2c_dw_enable() by the commit 3a48d1c08f ("i2c: prevent spurious
interrupt on Designware controllers").

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-15 14:08:00 +02:00
Jarkko Nikula
c335631a68 i2c: designware: Remove interrupt clearing from i2c_dw_pci_probe()
There is no need to clear interrupts in i2c_dw_pci_probe() since only place
where interrupts are unmasked is i2c_dw_xfer_init() and there interrupts
are always cleared after commit 2a2d95e9d6 ("i2c: designware: always
clear interrupts before enabling them").

This allows to cleanup the code and replace i2c_dw_clear_int() in
i2c_dw_xfer_init() by direct register read as there are no other callers.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-15 14:07:19 +02:00
David Box
894acb2f82 i2c: designware: Add Intel Baytrail PMIC I2C bus support
This patch implements an I2C bus sharing mechanism between the host and platform
hardware on select Intel BayTrail SoC platforms using the X-Powers AXP288 PMIC.

On these platforms access to the PMIC must be shared with platform hardware. The
hardware unit assumes full control of the I2C bus and the host must request
access through a special semaphore. Hardware control of the bus also makes it
necessary to disable runtime pm to avoid interfering with hardware transactions.

Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-01-26 12:26:25 +01:00
David Box
c0601d285e i2c: designware: Add i2c bus locking support
Adds support for acquiring and releasing a hardware bus lock in the i2c
designware core transfer function. This is needed for i2c bus controllers
that are shared with but not controlled by the kernel.

Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-01-26 12:26:16 +01:00
Wolfram Sang
ca1f8da9ac i2c: remove FSF address
We have a central copy of the GPL for that. Some addresses were already
outdated.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
2014-11-07 18:35:33 +01:00
Romain Baeriswyl
6468276b22 i2c: designware: make SCL and SDA falling time configurable
This patch allows to set independantly SCL and SDA falling times.
The tLOW period is computed by taking into account the SCL falling time.
The tHIGH period is computed by taking into account the SDA falling time.

For instance in case the margin on tLOW is considered too small, it can
be increased by increasing the SCL falling time which is by default set
at 300ns.

The same applies for tHIGH period with the help of SDA falling time.

Signed-off-by: Romain Baeriswyl <romainba@abilis.com>
Reviewed-by: Christian Ruppert <christian.ruppert@abilis.com>
Acked-by: Shinya Kuribayashi <skuribay@pobox.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-03-09 09:29:08 +01:00
Mika Westerberg
defc0b2fb5 i2c: designware: make HCNT/LCNT values configurable
The DesignWare I2C controller has high count (HCNT) and low count (LCNT)
registers for each of the I2C speed modes (standard and fast). These
registers are programmed based on the input clock speed in the driver.

The current code calculates these values based on the input clock speed and
tries hard to meet the I2C bus timing requirements. This could result
non-optimal values with regarding to the bus speed. For example on Intel
BayTrail we get bus speed of 315.41kHz which is ~20% slower than we would
expect (400kHz) in fast mode (even though the timing requirements are met).

This patch makes it possible for the platform code to pass more optimal
HCNT/LCNT values to the core driver if they are known beforehand. If these
are not set we use the calculated and more conservative values.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Shinya Kuribayashi <skuribay@pobox.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2013-08-28 11:11:10 +02:00
Christian Ruppert
9803f86894 i2c-designware: make SDA hold time configurable
This patch makes the SDA hold time configurable through device tree.

Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com>
Signed-off-by: Pierrick Hascoet <pierrick.hascoet@abilis.com>
Acked-by: Vineet Gupta <vgupta@synopsys.com> for arch/arc bits
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2013-06-26 16:02:06 +02:00
Josef Ahmad
e6f34cea56 i2c: designware: fix RX FIFO overrun
i2c_dw_xfer_msg() pushes a number of bytes to transmit/receive
to/from the bus into the TX FIFO.
For master-rx transactions, the maximum amount of data that can be
received is calculated depending solely on TX and RX FIFO load.

This is racy - TX FIFO may contain master-rx data yet to be
processed, which will eventually land into the RX FIFO. This
data is not taken into account and the function may request more
data than the controller is actually capable of storing.

This patch ensures the driver takes into account the outstanding
master-rx data in TX FIFO to prevent RX FIFO overrun.

Signed-off-by: Josef Ahmad <josef.ahmad@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org
2013-05-17 10:33:11 +02:00
Stefan Roese
a8a9f3fef1 i2c: designware: Add support for 16bit register access
The STM SPEAr platform can only access the i2c controller register
via 16bit read/write functions. This patch adds support to
automatically detect this 16bit access mode.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-05-12 14:28:11 +02:00
Dirk Brandewie
18dbdda89f i2c-designware: Add runtime power management support
Add runtime power management to the PCI driver.

Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 11:03:53 +01:00
Dirk Brandewie
fe20ff5c7e i2c-designware: Add support for Designware core behind PCI devices.
Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 11:03:52 +01:00
Dirk Brandewie
f3fa9f3da5 i2c-designware: Push all register reads/writes into the core code.
Move all register manipulation code into the core, also move register
offset definitions to i2c-designware-core.c since the bus specific
portions of the driver no longer need/use them.

Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 11:03:51 +01:00
Dirk Brandewie
e18563fc56 i2c-designware: move controller config to bus specific portion of driver
With multiple I2C adapters possible in the system each running at
(possibly) different speeds we need to move the controller
configuration bit field to the adapter.

Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 11:03:50 +01:00
Dirk Brandewie
2fa8326b4b i2c-designware: move i2c functionality bit field to be adapter specific
The functionality of the adapter depends on the configuration of the
IP block at silicon compile time and is adapter specific.

Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 11:03:50 +01:00
Dirk Brandewie
1d31b58f64 i2c-designware: Move retriveving the clock speed out of core code.
The clock frequecy supplied to the IP core is specific to a single
instance of the driver.  This patch makes it possible to have multiple
Designware I2C cores in the system possibly running at different core
frequencies.

Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 11:03:49 +01:00
Dirk Brandewie
2373f6b974 i2c-designware: split of i2c-designware.c into core and bus specific parts
This patch splits i2c-designware.c into three pieces:
     i2c-designware-core.c, contains the code that interacts directly
     with the core.

     i2c-designware-platdrv.c, contains the code specific to the
     platform driver using the core.

     i2c-designware-core.h contains the definitions and declareations
     shared by i2c-designware-core.c and i2c-designware-platdrv.c.

This patch is the first in a set to allow multiple instances of the
designware I2C core in the system.

Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 11:03:39 +01:00