* Add node for the audio codec
* Enable Tegra's I2S1 controller and DAS
* Add node for top-level sound complex
Signed-off-by: Stephen Warren <swarren@nvidia.com>
According to the device's datasheet, it can support an interrupt too.
However, the existing board file doesn't specify an interrupt, and I
don't have the schematics, so I can't add an interrupts property. The
current Linux driver doesn't support anyway.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add the known i2c devices on seaboard to the i2c table.
Also rename the temperature sensor device node, and mark it as a nct1008
instead of an adt7461 (which it is -- the chips are compatible though).
Signed-off-by: Olof Johansson <olof@lixom.net>
[swarren: Removed isl29018 from patch; it's already there now. Fixed
interrupts properties now that Tegra GPIO is an interrupt controller.
Moved smart-battery to the correct I2C bus.]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The I2C2 controller can be routed to either pingroup DDC or PTA. Seaboard
actually uses this as an I2C bus mux, and devices are connected to both
pingroups. This change statically assigns the I2C2 controller to pingroup
PTA, so that on-board devices can be accessed. The DDC pingroup is used
for EDID/DDC accesses which are not yet required, given the absence of
any Tegra graphics support. I2C muxing will be supported later.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This I2C bus is used for EDID/DDC reads and other "slow" I2C devices.
This requires a 100KHz SCL (clock) rate.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add the device info for ALS and proximity sensor for tegra
boards cardhu, ventana and seaboard.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
[swarren: s/PZ02/PZ2/ in .dts files, s/seabridge/seaboard/ in commit
description]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Ensure that the USB ULPI signals are not tri-stated, and have no pull-
up or pull-down.
Ensure that the pingroup hosting the USB ULPI reset signal (GPIO PV0 or
PV1 depending on the board, so UAC) is not tri-stated, and has no pull-
up or pull-down.
This change appears larger than it is due to the grouping and sorting of
the pin configuration data.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
ULPI PHYs have a reset signal, and different boards use a different GPIO
for this task. Add a property to device tree to represent this.
I'm not sure if adding this property to the EHCI controller node is
entirely correct; perhaps eventually we should have explicit separate
nodes for the various PHYs. However, we don't have that right now, so this
binding seems like a reasonable choice.
Cc: <devicetree-discuss@lists.ozlabs.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: <linux-usb@vger.kernel.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Not all boards use GPIO_PV0 as the ULPI PHY reset signal. Instead of
hard-coding this GPIO into devices.c, make the board files set it
explicitly. This will allow the PHY code to differentiate between set and
unset values, and hence know when to read the value from device tree.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
pll_p_out4 is used on all/most Tegra boards to drive the cdev2 output pin
to provide a reference clock to a ULPI USB PHY. This reference clock must
run at 24MHz, and the cdev2 output has no additional dividers.
Remove board-paz00.c's now-duplicate initialization of this clock.
Reported-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Commit 40f9cf0 "ARM: tegra: reparent sclk to pll_c_out1" changed the
rate of hclk. Since pclk is derived from that, and only has integer
dividers, the pclk rate needs to change in the same fashion, from 54MHz
to 60MHz.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
pll_p_out4 needs to be used for other purposes. Reparent sclk so that
it runs from pll_c. Change sclk's rate to 120MHz from 108MHz since this
is the lowest precise rate that can be achieved by dividing the pll_c
rate without reducing the sclk rate. (600/5=120, 600/5.5=109.0909...,
600/6=100).
Signed-off-by: Stephen Warren <swarren@nvidia.com>
pll_c will be used as a clock source. Fill in tegra_pll_c_freq_table[]
so that it's possible to explicitly initialize the PLL.
NVIDIA's downstream nv-3.1 kernel and the ChromeOS kernel have different
pll_c tables. nv-3.1 contains entries for 522MHz and 598MHz output,
whereas the ChromeOS kernel contains entries for 600MHz output. I chose
to upstream the ChromeOS values for now, since the 600MHz rate appears
to match the default rate of this PLL when the HW boots, and it's not
clear to me why 522 or 598MHz are more useful.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Olof Johansson <olofj@chromium.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
[swarren: wrote commit description]
Add WM8903 codec nodes, and top-level sound complex node for basic
analog audio over headset jack and internal speakers.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
Both the Tegra30 I2S and AHUB modules used clocks, and hence currently
require AUXDATA in order to get specific device names so that clock
lookups work.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
Set up the audio clock tree for Tegra30 in an equivalent fashion to the
existing setup for Tegra20.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
pll_a uses pll_p_out1 as its parent. Therefore this clock needs to be
initialized to make sure pll_a has a known input clock. Failure to do so
will cause the system to crash early in the bootup.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The Tegra30 AHUB driver must call tegra_periph_reset_deassert() for all
devices on the AHUB's configlink bus. The AHUB driver must be able to
call clk_get_sys() to retrieve the clock parameter for this function.
Add the necessary clock aliases to allow this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
Rather than having a single tegra-pinctrl driver that determines whether
it's running on Tegra20 or Tegra30, instead have separate drivers for
each that call into utility functions to implement the majority of the
driver. This change is based on review feedback of the SPEAr pinctrl
driver, which had originally copied to Tegra driver structure.
This requires that the two drivers have unique names. Update a couple
spots in arch/arm/mach-tegra for the name change.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
This adds a complete pinmux configuration to all Tegra20 device tree
files. This allows removal of board-dt-tegra20.c's use of the pinmux
board files, and the special device tree handling in board-pinmux.c.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
This adds a minimal pinmux configuration to the Tegra Cardhu device
tree. Initially, just the built-in eMMC and SD card slot are configured.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net
The pinctrl driver is now active and used by all boards. Remove the
old pinmux driver.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
* Rename old pinmux and new pinctrl platform driver and DT match table
entries, so the new driver gets instantiated.
* Re-write board-pinmux.c, so that it uses pinctrl APIs to configura the
pinmux.
* Re-write board-*-pinmux.c so that the pinmux configuration tables are
in pinctrl format.
Ventana's pin mux table needed some edits on top of the basic format
conversion, since some mux options that were previously marked as
reserved are now valid in the new pinctrl driver. Attempting to use the
old reserved names will result in a failure. Specifically, groups lpw0,
lpw2, lsc1, lsck, and lsda were changed from function rsvd4 to displaya,
and group pta was changed from function rsvd2 to hdmi.
All boards' pin mux tables needed some edits on top of the based format
conversion, since function i2c was split into i2c1 (first general I2C
controller) and i2cp (power I2C controller) to better align function
definitions with HW blocks.
Due to the split of mux tables into pure mux and pull/tristate tables,
many entries in the separate Seaboard/Ventana tables could be merged
into the common table, since the entries differed only in the portion
in one of the tables, not both.
Most pin groups allow configuration of mux, tri-state, and pull. However,
some don't allow pull configuration, which is instead configured by new
groups that only allow pull configuration. This is a reflection of the
true HW capabilities, which weren't fully represented by the old pinmux
driver. This required adding new pull table entries for those new groups,
and setting many other entries' pull configuration to
TEGRA_PINCONFIG_DONT_SET.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
Recent pinctrl discussions concluded that gpiolib APIs should in fact do
whatever is required to mux a GPIO onto pins, by calling pinctrl APIs if
required. This change implements this for the Tegra GPIO driver, and removes
calls to the Tegra-specific APIs from drivers and board files.
Cc: Chris Ball <cjb@laptop.org>
Cc: linux-mmc@vger.kernel.org
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Chris Ball <cjb@laptop.org> # for sdhci-tegra.c
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
Don't call gpio_request() or gpio_direction_input() for ISL29018_IRQ.
This pin is only used as an IRQ, and hence no GPIO configuration should
be necessary; the GPIO/IRQ driver should (and does) perform any required
setup when the IRQ is requested.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
Instead of having board files manually request and initialize USB VBUS
GPIOs, fill in the USB driver's platform data and have it do it.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
Add a vbus_gpio field to platform data. This mirrors the device tree
property nvidia,vbus-gpio. This makes the VBUS GPIO handling identical
between booting with board files and device tree; the driver always does
it.
This removes the need for board files to request and initialize the GPIO
early during their boot process, perhaps even before the GPIO driver is
ready to process the request.
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: linux-usb@vger.kernel.org
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
Pull ARM fixes from Russell King:
"Nothing too disasterous, the biggest thing being the removal of the
regulator support for vcore in the AMBA driver; only one SoC was using
this and it got broken during the last merge window, which then
started causing problems for other people. Mutual agreement was
reached for it to be removed."
* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
ARM: 7386/1: jump_label: fixup for rename to static_key
ARM: 7384/1: ThumbEE: Disable userspace TEEHBR access for !CONFIG_ARM_THUMBEE
ARM: 7382/1: mm: truncate memory banks to fit in 4GB space for classic MMU
ARM: 7359/2: smp_twd: Only wait for reprogramming on active cpus
ARM: 7383/1: nommu: populate vectors page from paging_init
ARM: 7381/1: nommu: fix typo in mm/Kconfig
ARM: 7380/1: DT: do not add a zero-sized memory property
ARM: 7379/1: DT: fix atags_to_fdt() second call site
ARM: 7366/3: amba: Remove AMBA level regulator support
ARM: 7377/1: vic: re-read status register before dispatching each IRQ handler
ARM: 7368/1: fault.c: correct how the tsk->[maj|min]_flt gets incremented
The 'max' range needs to be unsigned, since the size of the user address
space is bigger than 2GB.
We know that 'count' is positive in 'long' (that is checked in the
caller), so we will truncate 'max' down to something that fits in a
signed long, but before we actually do that, that comparison needs to be
done in unsigned.
Bug introduced in commit 92ae03f2ef ("x86: merge 32/64-bit versions of
'strncpy_from_user()' and speed it up"). On x86-64 you can't trigger
this, since the user address space is much smaller than 63 bits, and on
x86-32 it works in practice, since you would seldom hit the strncpy
limits anyway.
I had actually tested the corner-cases, I had only tested them on
x86-64. Besides, I had only worried about the case of a pointer *close*
to the end of the address space, rather than really far away from it ;)
This also changes the "we hit the user-specified maximum" to return
'res', for the trivial reason that gcc seems to generate better code
that way. 'res' and 'count' are the same in that case, so it really
doesn't matter which one we return.
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
c5905afb0 ("static keys: Introduce 'struct static_key'...") renamed
struct jump_label_key to struct static_key. Fixup ARM for this to
eliminate these build warnings:
include/linux/jump_label.h:113:2:
warning: passing argument 1 of 'arch_static_branch' from incompatible pointer type
include/asm/jump_label.h:17:82:
note: expected 'struct jump_label_key *' but argument is of type 'struct static_key *'
Signed-off-by: Rabin Vincent <rabin@rab.in>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Currently when ThumbEE is not enabled (!CONFIG_ARM_THUMBEE) the ThumbEE
register states are not saved/restored at context switch. The default state
of the ThumbEE Ctrl register (TEECR) allows userspace accesses to the
ThumbEE Base Handler register (TEEHBR). This can cause unexpected behaviour
when people use ThumbEE on !CONFIG_ARM_THUMBEE kernels, as well as allowing
covert communication - eg between userspace tasks running inside chroot
jails.
This patch sets up TEECR in order to prevent user-space access to TEEHBR
when !CONFIG_ARM_THUMBEE. In this case, tasks are sent SIGILL if they try to
access TEEHBR.
Cc: stable@vger.kernel.org
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
If a bank of memory spanning the 4GB boundary is added on a !CONFIG_LPAE
kernel then we will hang early during boot since the memory bank will
have wrapped around to zero.
This patch truncates memory banks for !LPAE configurations when the end
address is not representable in 32 bits.
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
During booting of cpu1, there is a short window where cpu1
is online, but not active where cpu1 is occupied by waiting
to become active. If cpu0 then decides to schedule something
on cpu1 and wait for it to complete, before cpu0 has set
cpu1 active, we have a deadlock.
Typically it's this CPU frequency transition that happens at
this time, so let's just not wait for it to happen, it will
happen whenever the CPU eventually comes online instead.
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: stable@kernel.org
Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Reviewed-by: Rickard Andersson <rickard.andersson@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* A handful of warning and build fixes for Qualcomm MSM
* Build/warning and bug fixes for Samsung Exynos
* A fix from Rob Herring that removes misplaced interrupt-parent
properties from a few device trees
* A fix to OMAP dealing with cpufreq build errors, removing some of the
offending code since it was redundant anyway
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJPiwhZAAoJEIwa5zzehBx30A0P/RkEOmm7eSWj9sDMW0zTvdoO
MDPIxp/D3gyUtp0IJlrikyGm+si8NlBFgz4O35np9NWmE/eek6ZDjF359Oj0SI2n
/G21xjZT26TQevJtOXprWf3VhdUnCN3VQMiqJpB+doUuJdp7sHyOXdo6c3h76q9V
cqOxtxb0gZFF6MxQpqOG1i1VaL8G1h697NeiUKJWKpgu3HIdzaA02T8X5YSRDTwU
MMmAIa2004oaYMvJJJWWfWa2m7gkCUqwnCTupn9vJGKwA7dv/GPK2BakXYy9ChgE
Rm2K/ddIQck7OwctP8MBj2Y7Pu2D3z762xqq1V43WpVgVknNsHZLEKeMrUcRTuVW
N6bkvAQ30eAQ6Q/BoE22ihtm3K1lY+mkyvc+8UUA0Ph3qN5FTNrrjCCZgSp2KHUM
6Y7vmAAS89kC0ocjS+3VwRktP2FUyAQDuMiDuaNSwga3vdnf0WsDlCP0Cwn2mK6t
pugBlX9ZShXzuVd68LvAkRSlFvqnexjyQlgkl/vuyfg2YAEgjDx9J2ngBrAwxUDa
glwNv8njO2q4B7RWUd+jhXxPH2KI+7xaPHZ4PbyKpE0xK5qgstMmROQFQKloGnaI
UtOt9i9clv2N8sCv6f6lwNw0P1f4Qt4KjBphquolMBTtTNwS4RDOywitDk7d8rc7
6nngNhd+UTCqfyQ4rCHn
=OWRk
-----END PGP SIGNATURE-----
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull "ARM: a few more SoC fixes for 3.4-rc" from Olof Johansson:
- A handful of warning and build fixes for Qualcomm MSM
- Build/warning and bug fixes for Samsung Exynos
- A fix from Rob Herring that removes misplaced interrupt-parent
properties from a few device trees
- A fix to OMAP dealing with cpufreq build errors, removing some of the
offending code since it was redundant anyway
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: OMAP: clock: cleanup CPUfreq leftovers, fix build errors
ARM: dts: remove blank interrupt-parent properties
ARM: EXYNOS: Fix Kconfig dependencies for device tree enabled machine files
ARM: EXYNOS: Remove broken config values for touchscren for NURI board
ARM: EXYNOS: set fix xusbxti clock for NURI and Universal210 boards
ARM: EXYNOS: fix regulator name for NURI board
ARM: SAMSUNG: make SAMSUNG_PM_DEBUG select DEBUG_LL
ARM: msm: Fix section mismatches in proc_comm.c
video: msm: Fix section mismatches in mddi.c
arm: msm: trout: fix compile failure
arm: msm: halibut: remove unneeded fixup
ARM: EXYNOS: Add PDMA and MDMA physical base address defines
ARM: S5PV210: Fix compiler warning in dma.c file
ARM: EXYNOS: Fix compile error in exynos5250-cpufreq.c
ARM: EXYNOS: Add missing definition for IRQ_I2S0
ARM: S5PV210: fix unused LDO supply field from wm8994_pdata
Now that we have OPP layer, and OMAP CPUfreq driver is using it, we no
longer need/use the clock framework code for filling up CPUfreq
tables. Remove it.
Removing this code also eliminates build errors when CPU_FREQ_TABLE
support is not enabled.
Thanks to Russell King for pointing out the parts I missed under
plat-omap in the original version and also pointing out the build
errors when CPUFREQ_TABLE support was not enabled.
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
These were incorrectly introduced and can cause problems for of_irq_init.
The correct way to define a root controller is no interrupt-parent set at
all or the interrupt-parent is set to the root controller itself when
inherited from a parent node.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Tested-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Add config dependency for Exynos4 and Exynos5 device tree enabled machine
files on config options ARCH_EXYNOS4 and ARCH_EXYNOS5 respectively.
Enabling machine support without proper ARCH support enabled is incorrect.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The atmel_mxt_ts driver has been extended to support more 'configuration
objects' in commit 81c88a711 ("Input: atmel_mxt_ts - update object list"),
what broke the configuration values for NURI board. These values are
optional anyway, so remove them to get the driver working correctly.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
On some versions of NURI and UniversalC210 boards, camera clocks are
routed directly to xusbxti clock source. This patch sets the correct
value for this clock to let usb and camera sensors to work correctly and
avoid division by zero on driver's probe.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Regulator names should not contain slash to avoid issues with debugfs.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
When selecting SAMSUNG_PM_DEBUG, it complains about a missing printascii()
function if you do not select DEBUG_LL, so make the former select the latter.
Signed-off-by: Maurus Cuelenaere <mcuelenaere@gmail.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Pull system.h fixups for less common arch's from Paul Gortmaker:
"Here is what is hopefully the last of the system.h related fixups.
The fixes for Alpha and ia64 are code relocations consistent with what
was done for the more mainstream architectures. Note that the
diffstat lines removed vs lines added are not the same since I've
fixed some of the whitespace issues in the relocated code blocks.
However they are functionally the same. Compile tested locally, plus
these two have been in linux-next for a while.
There is also a trivial one line system.h related fix for the Tilera
arch from Chris Metcalf to fix an implict include.."
* 'systemh-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/paulg/linux:
irq_work: fix compile failure on tile from missing include
ia64: populate the cmpxchg header with appropriate code
alpha: fix build failures from system.h dismemberment
The invocation of softirq is now handled by irq_exit(), so there is no
need for sparc64 to invoke it on the trap-return path. In fact, doing so
is a bug because if the trap occurred in the idle loop, this invocation
can result in lockdep-RCU failures. The problem is that RCU ignores idle
CPUs, and the sparc64 trap-return path to the softirq handlers fails to
tell RCU that the CPU must be considered non-idle while those handlers
are executing. This means that RCU is ignoring any RCU read-side critical
sections in those handlers, which in turn means that RCU-protected data
can be yanked out from under those read-side critical sections.
The shiny new lockdep-RCU ability to detect RCU read-side critical sections
that RCU is ignoring located this problem.
The fix is straightforward: Make sparc64 stop manually invoking the
softirq handlers.
Reported-by: Meelis Roos <mroos@linux.ee>
Suggested-by: David Miller <davem@davemloft.net>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Tested-by: Meelis Roos <mroos@linux.ee>
Cc: stable@vger.kernel.org
Signed-off-by: David S. Miller <davem@davemloft.net>
The DS driver registers as a subsys_initcall() but this can be too
early, in particular this risks registering before we've had a chance
to allocate and setup module_kset in kernel/params.c which is
performed also as a subsyts_initcall().
Register DS using device_initcall() insteal.
Signed-off-by: David S. Miller <davem@davemloft.net>
Cc: stable@vger.kernel.org
