We no longer put the top-level PCI controller device into the
PCI layer device list. So pbm->pci_bus->self is always NULL.
Therefore, use direct PCI config space accesses to get at
the PCI controller's PCI_STATUS register.
Tested by Meelis Roos.
Signed-off-by: David S. Miller <davem@davemloft.net>
As noticed by Russell King, we were not setting this properly
to the number of entries, but rather the total size.
This results in the core dumping code allocating waayyyy too
much memory.
Signed-off-by: David S. Miller <davem@davemloft.net>
We need to pass IRQF_SHARED, otherwise we get things like:
IRQ handler type mismatch for IRQ 33
current handler: PSYCHO_UE
Call Trace:
[000000000048394c] request_irq+0xac/0x120
[00000000007c5f6c] psycho_scan_bus+0x98/0x158
[00000000007c2bc0] pcibios_init+0xdc/0x12c
[0000000000426a5c] do_one_initcall+0x1c/0x160
[00000000007c0180] kernel_init+0x9c/0xfc
[0000000000427050] kernel_thread+0x30/0x60
[00000000006ae1d0] rest_init+0x10/0x60
on e3500 and similar systems.
On a single board, the UE interrupts of two Psycho nodes
are funneled through the same interrupt, from of_debug=3
dump:
/pci@b,4000: direct translate 2ee --> 21
...
/pci@b,2000: direct translate 2ee --> 21
Decimal "33" mentioned above is the hex "21" mentioned here.
Thanks to Meelis Roos for dumps and testing.
Signed-off-by: David S. Miller <davem@davemloft.net>
As noticed by Russell King, we were not setting this properly
to the number of entries, but rather the total size.
This results in the core dumping code allocating waayyyy too
much memory.
Signed-off-by: David S. Miller <davem@davemloft.net>
1) Several exported symbols need extern decls, they are exported
not for C code but for assembler routines.
2) PAGE_EXEC isn't used, delete
3) Several larger than 32-bit constants need "UL" markers
Signed-off-by: David S. Miller <davem@davemloft.net>
1) set_brkpt() is referenced by nothing and hasn't been used by anyone
to my knowledge for many many years. So just delete it.
2) add extern decl for do_sparc64_fault() in asm/pgtable_64.h
Signed-off-by: David S. Miller <davem@davemloft.net>
This was just needed to work around an ancient gcc bug that
we don't care about any more.
It was also causing a sparse warnings:
arch/sparc64/mm/tlb.c:22:52: warning: Using plain integer as NULL pointer
Signed-off-by: David S. Miller <davem@davemloft.net>
1) Declare pci_poke_* in pci_impl.h
2) of_create_pci_dev() should be static
3) ->setup_msi_irq() wants an unsigned int pointer not a plain
int one
4) void value expression return in arch_teardown_msi_irq()
Signed-off-by: David S. Miller <davem@davemloft.net>
1) Using "clock" as a local variable shadows a global variable of
the same name declared in linux/clocksource.h
2) rtc_cmos_resource should be static
Signed-off-by: David S. Miller <davem@davemloft.net>
Lots of shadowed local variables and global_reg_snapshot[] needs
an extern declaration in asm/ptrace_64.h.
Signed-off-by: David S. Miller <davem@davemloft.net>
Otherwise sparse doesn't work. The 32 vs. 64 header ifdef
used under arch/sparc/include/asm/ is:
#if defined(__sparc__) && defined(__arch64__)
And that doesn't work for sparse unless we give it __arch64__
Signed-off-by: David S. Miller <davem@davemloft.net>
The IOMMU and streaming cache error interrogation is moved here
as well as the PCI error interrupt handler.
Signed-off-by: David S. Miller <davem@davemloft.net>
These are very similar chips, in fact they are identical in some
macro blocks.
So start commonizing code which they can share. We begin with
the IOMMU initialization sequence.
Signed-off-by: David S. Miller <davem@davemloft.net>
It is just used as a parent to encapsulate two PBM objects.
But that layout is only really relevant and necessary for
psycho PCI controllers, which unlike all the others share
a single IOMMU instance between sibling PCI busses.
Signed-off-by: David S. Miller <davem@davemloft.net>
Use the IMAP offset calculation for OBIO devices as documented in the
programmer's manual. Which is "0x10000 + ((ino & 0x1f) << 3)"
Signed-off-by: David S. Miller <davem@davemloft.net>
When a CPU is offlined, we leave the timer interrupts disabled
because fixup_irqs() does not explicitly take care of that case.
Fix this by invoking tick_ops->disable_irq().
Based upon analysis done by Paul E. McKenney.
Signed-off-by: David S. Miller <davem@davemloft.net>
Correctly calculate offset to the year register for
Mostek RTC.
Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl>
Signed-off-by: David S. Miller <davem@davemloft.net>
Make sparc64 refrain from clearing a given to-be-offlined CPU's bit in the
cpu_online_mask until it has processed pending irqs. This change
prevents other CPUs from being blindsided by an apparently offline CPU
nevertheless changing globally visible state.
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
When I switched sparc64 over to the generic helpers for
smp_call_function(), I didn't convert the dinky call_lock
we had.
Use ipi_call_lock() and ipi_call_unlock().
Signed-off-by: David S. Miller <davem@davemloft.net>
The device nodes that sit above 'esp' and 'le' on SBUS lack a 'ranges'
property, but we should pass the translation up to the parent node so
that the SBUS level ranges get applied.
Based upon a bug report from Robert Reif.
Signed-off-by: David S. Miller <davem@davemloft.net>
This mirrors the of_device_id[] changes done in
fd098316ef ("sparc: Annotate
of_device_id arrays with const or __initdata.")
Signed-off-by: David S. Miller <davem@davemloft.net>
Three main things:
1) Make prober an arch initcall instead of using hard-coded invocation
from paging_init()
2) Shrink table size, the fpu ident stuff was never used.
3) Use named struct initialized in table.
Signed-off-by: David S. Miller <davem@davemloft.net>
This driver is now limited to just doing the basic clock board and FHC
chip initialization and registering the platform devices for the
per-board LEDs, which are driven by the new LEDS_STARFIRE driver.
The IRQ register handling is already confined purely to the device
tree code.
Signed-off-by: David S. Miller <davem@davemloft.net>