Commit Graph

26 Commits

Author SHA1 Message Date
Raul E Rangel
d942070575 drm/amd/powerplay: fix struct init in renoir_print_clk_levels
drivers/gpu/drm/amd/powerplay/renoir_ppt.c:186:2: error: missing braces
around initializer [-Werror=missing-braces]
  SmuMetrics_t metrics = {0};
    ^

Fixes: 8b8031703b ("drm/amd/powerplay: implement sysfs for getting dpm clock")

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-11-06 16:27:48 -05:00
chen gong
42ce4b666d drm/amdgpu/powerplay: modify the parameters of SMU_MSG_PowerUpVcn to 0
The parameters what SMU_MSG_PowerUpVcn need is 0, not 1

Signed-off-by: chen gong <curry.gong@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-25 16:50:11 -04:00
Evan Quan
6c45e480fe drm/amd/powerplay: clear the swSMU code layer
With this cleanup, the APIs from amdgpu_smu.c will map to
ASIC specific ones directly. Those can be shared around
all SMU V11/V12 ASICs will be put in smu_v11_0.c and
smu_v12_0.c respectively.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-25 16:50:10 -04:00
Evan Quan
18c1d3cee4 drm/amd/powerplay: split out those internal used swSMU APIs V2
Those swSMU APIs used internally are moved to smu_internal.h while
others are kept in amdgpu_smu.h.

V2: give a better name smu_internal.h for the place to hold
    those internal APIs

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-25 16:50:09 -04:00
Evan Quan
3697b339c6 drm/amd/powerplay: add lock protection for swSMU APIs V2
This is a quick and low risk fix. Those APIs which
are exposed to other IPs or to support sysfs/hwmon
interfaces or DAL will have lock protection. Meanwhile
no lock protection is enforced for swSMU internal used
APIs. Future optimization is needed.

V2: strip the lock protection for all swSMU internal APIs

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Acked-by: Feifei Xu <Feifei.Xu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-25 16:50:09 -04:00
Alex Deucher
0e04ad7d18 drm/amdgpu/powerplay: use local renoir array sizes for clock fetching
To avoid walking past the end of the arrays since the PP_SMU
defines don't match the renoir defines.

Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-25 16:48:14 -04:00
Prike Liang
ad7ce43c5e drm/amdgpu/powerplay: implement interface pp_power_profile_mode
implement get_power_profile_mode for getting power profile mode status.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-17 16:30:58 -04:00
Hersen Wu
7bbdbe4059 drm/amdgpu/powerplay: add renoir funcs to support dc
there are two paths for renoir dc access smu.
one dc access smu directly using bios smc
interface: set disply, dprefclk, etc.
another goes through pplib for get dpm clock
table and set watermmark.

Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-15 15:50:55 -04:00
Prike Liang
ef5af37a15 drm/amd/powerplay: update the interface for getting dpm full scale clock frequency
Update get_dpm_uclk_limited to get more clock type full scale dpm frequency.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03 09:11:04 -05:00
Prike Liang
2cf8d416d3 drm/amd/powerplay: implement the interface for setting sclk/uclk profile_peak level
Add the interface for setting sclk and uclk peak frequency.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03 09:11:04 -05:00
Prike Liang
ea286ed728 drm/amd/powerplay: implement interface set_power_profile_mode() (v2)
v1:
Add set_power_profile_mode() for none manual dpm level case setting power profile mode.

v2:
After input power profile update successfully need can update the smu profile mode.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03 09:11:04 -05:00
Prike Liang
2e5294fe14 drm/amd/powerplay: add the interfaces for getting and setting profiling dpm clock level
implement get_profiling_clk_mask and force_clk_levels for forcing dpm clk to limit value.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03 09:11:04 -05:00
Prike Liang
665499c619 drm/amd/powerplay: add interface for getting workload type
The workload type was got from the input of power profile mode.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03 09:11:04 -05:00
Prike Liang
47e56b5318 drm/amd/powerplay: add interface for forcing and unforcing dpm limit value
That's base function for forcing and unforcing dpm limit value.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03 09:11:04 -05:00
Prike Liang
af1ec44f9a drm/amd/powerplay: bypass dpm_context null pointer check guard for some smu series
For now APU has no smu_dpm_context structure for containing default/current related dpm tables,
thus will needn't initialize smu_dpm_context to aviod APU null pointer issue.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03 09:11:04 -05:00
Prike Liang
08dac62f3e drm/amd/powerplay: implement VCN power gating control interface
VCN Gate/Ungate by processing the SMU power up/down message, otherwise
S3 will resume failed as JPEG always power off during start VCN stage.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-03 09:10:59 -05:00
Prike Liang
75a8957f80 drm/amd/powerplay: Add the interface for geting dpm current power state
implement the sysfs power_dpm_state

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-16 09:59:07 -05:00
Prike Liang
6ab3b9e313 drm/amd/powerplay: implement sysfs for getting dpm clock
With the common interface print_clk_levels can get the following dpm clock:

-pp_dpm_dcefclk
-pp_dpm_fclk
-pp_dpm_mclk
-pp_dpm_sclk
-pp_dpm_socclk

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-13 17:49:19 -05:00
Kevin Wang
871e5e7219 drm/amd/powerplay: replace smu->table_count with SMU_TABLE_COUNT in smu (v2)
fix bellow patch issue:
drm/amd/powerplay: introduce smu table id type to handle the smu table
for each asic
----
"This patch introduces new smu table type, it's to handle the
 different smu table
 defines for each asic with the same smu ip."

before:
use smu->table_count to represent the actual table count in smc firmware
use actual table count to check smu function parameter about smu table
after:
use logic table count "SMU_TABLE_COUNT" to check function parameter
because table id already mapped in smu driver,
and smu function will use logic table id not actual table id to check func parameter.

v2: squash in warning fix

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-13 17:48:16 -05:00
Prike Liang
eee3258e8f drm/amd/powerplay: add the interface for getting ultimate frequency v3
add the get_dpm_ultimate_freq for supporting different swSMU.
-v2:
        Handle the unsupported clock type and read smc message failed case and return error code.
        Move the smu12 uclk frequency retrieved logic to renoir ppt.
-v3:
        Use goto clause to handle invalidate clk index.
        Add the limited tag for smu_get_dpm_uclk to avoid other likewise interface introduced.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:32 -05:00
Aaron Liu
723d473537 drm/amd/powerplay: add DPMCLOCKS table implementation
This patch adds add DPMCLOCKS table implementation
Rename smu_populate_smc_pptable to smu_populate_smc_tables

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:38:05 -05:00
Aaron Liu
049284bd52 drm/amd/powerplay: init smu tables for rn
Initialize smu tables for renoir:
WATERMARKS/DPMCLOCKS/SMU_METRICS

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:38:01 -05:00
Aaron Liu
1405ac8f92 drm/amd/powerplay: add smu tables for rn
add and map smu tables for renoir

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:37:57 -05:00
Aaron Liu
b560451208 drm/amd/powerplay: using valid mapping check for rn
Check whether the message mapping is valid

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:37:53 -05:00
Aaron Liu
0a3c84243d drm/amd/powerplay: udpate smu_v12_0_check_fw_version (v2)
This interface support SMU_MSG_GetDriverIfVersion
and SMU_MSG_GetSmuVersion checking.

v2: squash in driver_if changes (Alex)

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:37:23 -05:00
Aaron Liu
9eb75d62a2 drm/amdgpu/powerplay: add initial renoir_ppt.c for renoir (v3)
Add renoir_ppt and map ppsmc to amdgpu_smu.h

v2: squash in ppsmc updates (Alex)
v3: squash in driver_if updates (Alex)

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:36:48 -05:00