Commit Graph

925 Commits

Author SHA1 Message Date
Stephen Boyd
ffd3b1c880 Merge branches 'clk-samsung', 'clk-hisi3670' and 'clk-at91-div-0' into clk-next
- Hisilicon 3670 SoC support

* clk-samsung:
  dt-bindings: clock: samsung: Add SPDX license identifiers
  clk: samsung: Use clk_hw API for calling clk framework from clk notifiers
  clk: samsung: exynos5420: Enable PERIS clocks for suspend
  clk: samsung: exynos5420: Define CLK_SECKEY gate clock only or Exynos5420
  clk: samsung: exynos5433: Keep sclk_uart clocks enabled in suspend
  clk: samsung: Remove obsolete code for Exynos4412 ISP clocks
  clk: samsung: exynos5433: Add suspend state for TOP, CPIF & PERIC CMUs
  clk: samsung: Use NOIRQ stage for Exynos5433 clocks suspend/resume
  clk: samsung: exynos5420: Use generic helper for handling suspend/resume
  clk: samsung: exynos4: Use generic helper for handling suspend/resume
  clk: samsung: Add support for setting registers state before suspend
  clk: samsung: exynos5250: Use generic helper for handling suspend/resume
  clk: samsung: s5pv210: Use generic helper for handling suspend/resume
  clk: samsung: s3c64xx: Use generic helper for handling suspend/resume
  clk: samsung: s3c2443: Use generic helper for handling suspend/resume
  clk: samsung: s3c2412: Use generic helper for handling suspend/resume
  clk: samsung: s3c2410: Use generic helper for handling suspend/resume
  clk: samsung: Remove excessive include

* clk-hisi3670:
  clk: hisilicon: Add clock driver for Hi3670 SoC
  dt-bindings: clk: hisilicon: Add bindings for Hi3670 clk

* clk-at91-div-0:
  clk: at91: Fix division by zero in PLL recalc_rate()
2018-10-18 15:41:36 -07:00
Stephen Boyd
5d3a48fe2c Merge branches 'clk-qcom-sdm845-camcc' and 'clk-mtk-unused' into clk-next
- Qualcomm SDM845 camera clock controller

* clk-qcom-sdm845-camcc:
  clk: qcom: Add camera clock controller driver for SDM845
  dt-bindings: clock: Introduce QCOM Camera clock bindings

* clk-mtk-unused:
  clk: mediatek: remove unused array audio_parents
2018-10-18 15:39:01 -07:00
Stephen Boyd
bf4503ccf3 dt-bindings: clock: Document qcom,krait-cc
The Krait clock controller controls the krait CPU and the L2 clocks
consisting a primary mux and secondary mux. Add document for that.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Tested-by: Craig Tatlor <ctatlor97@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 13:15:01 -07:00
Stephen Boyd
1f924faa8b dt-bindings: clock: Document qcom,hfpll
Adds bindings document for qcom,hfpll instantiated within
the Krait processor subsystem as separate register region.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Tested-by: Craig Tatlor <ctatlor97@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 13:14:42 -07:00
Alexandre Belloni
d425ad81ea dt-bindings: clk: at91: Document new PMC binding
Document the new PMC binding with only one PMC node for all the PMC clocks
instead of one node per clock as this proved to be problematic.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 10:44:33 -07:00
Paul Cercueil
067b6dedeb dt-bindings: clock: ingenic: Explicitly list compatible strings
This is better than letting the other developers wondering what are the
supported strings.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-16 15:19:22 -07:00
Shefali Jain
652f1813c1 clk: qcom: gcc: Add global clock controller driver for QCS404
Add the clocks supported in global clock controller which clock the
peripherals like BLSPs, SDCC, USB, MDSS etc. Register all the clocks
to the clock framework for the clients to be able to request for them.

Signed-off-by: Shefali Jain <shefjain@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Co-developed-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Anu Ramanathan <anur@codeaurora.org>
[bamse, vkoul: rebase and tidyup for upstream]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
[sboyd@kernel.org: Lowercase hex]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-16 15:13:54 -07:00
Taniya Das
f2a76a2955 clk: qcom: Add Global Clock controller (GCC) driver for SDM660
Add support for the global clock controller found on SDM660
based devices. This should allow most non-multimedia device
drivers to probe and control their clocks.
Based on CAF implementation.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
[craig: rename parents to fit upstream, and other cleanups]
Signed-off-by: Craig Tatlor <ctatlor97@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
[sboyd@kernel.org: Rename gcc_660 to gcc_sdm660 and fix numbering of
defines to avoid duplicates]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-16 15:06:43 -07:00
Manivannan Sadhasivam
3b6b13ede0 dt-bindings: clk: hisilicon: Add bindings for Hi3670 clk
Add devicetree bindings for HiSilicon Hi3670 clock controller.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-16 14:46:56 -07:00
Manivannan Sadhasivam
46b5dfab75 dt-bindings: clock: Add reset controller bindings for Actions Semi Owl SoCs
Add Reset Controller bindings to clock bindings for Actions Semi Owl
SoCs, S700 and S900.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-16 14:40:58 -07:00
Fabrizio Castro
7c0043c0a4 dt-bindings: clock: renesas: cpg-mssr: Document r8a774c0
This patch documents RZ/G2E (a.k.a. R8A774C0) bindings for the
Clock Pulse Generator driver.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-09-19 16:44:43 +02:00
Biju Das
bbd71915ee dt-bindings: clock: renesas: cpg-mssr: Document r8a7744 binding
Add binding documentation for the RZ/G1N (R8A7744) Clock Pulse
Generator driver.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-09-19 16:36:53 +02:00
Oleksij Rempel
af04a9cd9a dt-bindings: imx6q-clock: add new fsl,pmic-stby-poweroff property
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-09-12 09:01:19 +08:00
Chris Brandt
fde35c9c7d clk: renesas: cpg-mssr: Add R7S9210 support
Add support for the R7S9210 (RZ/A2) Clock Pulse Generator and Module
Standby.

The Module Standby HW in the RZ/A series is very close to R-Car HW, except
for how the registers are laid out.
The MSTP registers are only 8-bits wide, there are no status registers
(MSTPSR), and the register offsets are a little different. Since the RZ/A
hardware manuals refer to these registers as the Standby Control Registers,
we'll use that name to distinguish the RZ/A type from the R-Car type.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Acked-by: Rob Herring <robh@kernel.org> # DT bits
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-09-11 12:01:07 +02:00
Amit Nischal
f40c467523 dt-bindings: clock: Introduce QCOM Camera clock bindings
Add device tree bindings for camera clock controller for
Qualcomm Technology Inc's SDM845 SoCs.

Signed-off-by: Amit Nischal <anischal@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-08-30 18:26:45 -07:00
Biju Das
331a53e05b clk: renesas: cpg-mssr: Add r8a774a1 support
Add RZ/G2M (R8A774A1) Clock Pulse Generator / Module Standby and Software
Reset support.

Based on the Table 8.2b of "RZ/G Series, 2nd Generation User's Manual:
Hardware ((Rev. 0.61, June 12, 2018)".

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-08-27 17:00:19 +02:00
Linus Torvalds
2f34a64aea ARM: Device-tree updates
Business as usual -- the bulk of our changes are to devicetree files
 with new hardware support, new SoCs and platforms, and new board types.
 
 New SoCs/platforms:
  - Raspberry Pi Compute Module (CM1) and IO board
  - i.MX6SSL from NXP
  - Renesas RZ/N1D SoC (R9A06G032), Dual Cortex-A7 with Ethernet, CAN and
    PLC interfaces
  - TI AM654 SoC, Quad Cortex-A53, safety subsystem with Cortex-R5
    controllers, communication and PRU subsystem and lots of other
    interfaces (PCIe, USB3, etc).
 
 New boards and systems:
  - Several Atmel at91-based boards from Laird
  - Marvell Armada388-based Helios4 board from SolidRun
  - Samsung Aires-based phones (s5pv210)
  - Allwinner A64-based Pinebook laptop
 
 In addition to the above, there's the usual amount of new devices
 described on existing platforms, fixes and tweaks and new minor variants
 of boards/platforms.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM device-tree updates from Olof Johansson:
 "Business as usual -- the bulk of our changes are to devicetree files
  with new hardware support, new SoCs and platforms, and new board
  types.

  New SoCs/platforms:
   - Raspberry Pi Compute Module (CM1) and IO board
   - i.MX6SSL from NXP
   - Renesas RZ/N1D SoC (R9A06G032), Dual Cortex-A7 with Ethernet, CAN
     and PLC interfaces
   - TI AM654 SoC, Quad Cortex-A53, safety subsystem with Cortex-R5
     controllers, communication and PRU subsystem and lots of other
     interfaces (PCIe, USB3, etc).

  New boards and systems:
   - Several Atmel at91-based boards from Laird
   - Marvell Armada388-based Helios4 board from SolidRun
   - Samsung Aires-based phones (s5pv210)
   - Allwinner A64-based Pinebook laptop

  In addition to the above, there's the usual amount of new devices
  described on existing platforms, fixes and tweaks and new minor
  variants of boards/platforms"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (478 commits)
  arm64: dts: sdm845: Add tsens nodes
  arm64: dts: msm8996: thermal: Initialise via DT and add second controller
  arm64: dts: sprd: Add one suspend timer
  arm64: dts: sprd: Add SC27XX ADC device
  arm64: dts: sprd: Add SC27XX eFuse device
  arm64: dts: sprd: Add SC27XX vibrator device
  arm64: dts: sprd: Add SC27XX breathing light controller device
  arm64: dts: meson-axg: add spdif-dit codec
  arm64: dts: meson-axg: add lineout codec
  arm64: dts: meson-axg: add linein codec
  arm64: dts: meson-axg: add tdm interfaces
  arm64: dts: meson-axg: add tdmout formatters
  arm64: dts: meson-axg: add tdmin formatters
  arm64: dts: meson-axg: add spdifout
  arm64: dts: rockchip: add led support for Firefly-RK3399
  arm64: dts: rockchip: remove deprecated Type-C PHY properties on rk3399
  arm64: dts: rockchip: add power button support for Firefly-RK3399
  ARM: dts: aspeed: Add coprocessor interrupt controller
  arm64: dts: meson-axg: add audio arb reset controller
  arm64: dts: meson-axg: add usb power regulator
  ...
2018-08-23 14:02:22 -07:00
Linus Torvalds
f3ea496213 ARM: SoC driver updates
Some of the larger changes this merge window:
  - Removal of drivers for Exynos5440, a Samsung SoC that never saw
    widespread use.
  - Uniphier support for USB3 and SPI reset handling
  - Syste control and SRAM drivers and bindings for Allwinner platforms
  - Qualcomm AOSS (Always-on subsystem) reset controller drivers
  - Raspberry Pi hwmon driver for voltage
  - Mediatek pwrap (pmic) support for MT6797 SoC
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Olof Johansson:
 "Some of the larger changes this merge window:

   - Removal of drivers for Exynos5440, a Samsung SoC that never saw
     widespread use.

   - Uniphier support for USB3 and SPI reset handling

   - Syste control and SRAM drivers and bindings for Allwinner platforms

   - Qualcomm AOSS (Always-on subsystem) reset controller drivers

   - Raspberry Pi hwmon driver for voltage

   - Mediatek pwrap (pmic) support for MT6797 SoC"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (52 commits)
  drivers/firmware: psci_checker: stash and use topology_core_cpumask for hotplug tests
  soc: fsl: cleanup Kconfig menu
  soc: fsl: dpio: Convert DPIO documentation to .rst
  staging: fsl-mc: Remove remaining files
  staging: fsl-mc: Move DPIO from staging to drivers/soc/fsl
  staging: fsl-dpaa2: eth: move generic FD defines to DPIO
  soc: fsl: qe: gpio: Add qe_gpio_set_multiple
  usb: host: exynos: Remove support for Exynos5440
  clk: samsung: Remove support for Exynos5440
  soc: sunxi: Add the A13, A23 and H3 system control compatibles
  reset: uniphier: add reset control support for SPI
  cpufreq: exynos: Remove support for Exynos5440
  ata: ahci-platform: Remove support for Exynos5440
  soc: imx6qp: Use GENPD_FLAG_ALWAYS_ON for PU errata
  soc: mediatek: pwrap: add mt6351 driver for mt6797 SoCs
  soc: mediatek: pwrap: add pwrap driver for mt6797 SoCs
  soc: mediatek: pwrap: fix cipher init setting error
  dt-bindings: pwrap: mediatek: add pwrap support for MT6797
  reset: uniphier: add USB3 core reset control
  dt-bindings: reset: uniphier: add USB3 core reset support
  ...
2018-08-23 13:52:46 -07:00
Linus Torvalds
db06f826ec The new and exciting feature this time around is in the clk core.
We've added duty cycle support to the clk API so that clk signal
 duty cycle ratios can be adjusted while taking into account things
 like clk dividers and clk tree hierarchy. So far only one SoC has
 implemented support for this, but I expect there will be more to
 come in the future.
 
 Outside of the core, we have the usual pile of clk driver updates
 and additions. The Amlogic meson driver got the most lines in the
 diffstat this time around because it added support for a whole bunch
 of hardware and duty cycle configuration. After that the Rockchip PX30,
 Qualcomm SDM845, and Renesas SoC drivers fill in a majority of the diff.
 We're left with the collection of non-critical fixes after that. Overall
 it looks pretty quiet this time.
 
 Core:
  - Clk duty cycle support
  - Proper CLK_SET_RATE_GATE support throughout the tree
 
 New Drivers:
  - Actions Semi Owl series S700 SoC clk driver
  - Qualcomm SDM845 display clock controller
  - i.MX6SX ocram_s clk support
  - Uniphier NAND, USB3 PHY, and SPI clk support
  - Qualcomm RPMh clk driver
  - i.MX7D mailbox clk support
  - Maxim 9485 Programmable Clock Generator
  - Expose 32 kHz PLL on PXA SoCs
  - imx6sll GPIO clk gate support
  - Atmel at91 I2S audio clk support
  - SI544/SI514 clk on/off support
  - i.MX6UL GPIO clock gates in CCM CCGR
  - Renesas Crypto Engine clocks on R-Car H3
  - Renesas clk support for the new RZ/N1D SoC
  - Allwinner A64 display engine clock support
  - Support for Rockchip's PX30 SoC
  - Amlogic Meson axg PCIe and audio clocks
  - Amlogic Meson GEN CLK on gxbb, gxl and axg
 
 Updates:
  - Remove an unused variable from Exynos4412 ISP driver
  - Fix a thinko bug in SCMI clk division logic
  - Add missing of_node_put()s in some i.MX clk drivers
  - Tegra SDMMC clk jitter improvements with high speed signaling modes
  - SPDX tagging for qcom and cs2000-cp drivers
  - Stop leaking con ids in __clk_put()
  - Fix a corner case in fixed factor clk probing where node is in DT but
    parent clk is registered much later
  - Marvell Armada 3700 clk_pm_cpu_get_parent() had an invalid return value
  - i.MX clk init arrays removed in place of CLK_IS_CRITICAL
  - Convert to CLK_IS_CRITICAL for i.MX51/53 driver
  - Fix Tegra BPMP driver oops when xlating a NULL clk
  - Proper default configuration for vic03 and vde clks on Tegra124
  - Mark Tegra memory controller clks as critical
  - Fix array bounds clamp in Tegra's emc determine_rate() op
  - Ingenic i2s bit update and allow UDC clk to gate
  - Fix name of aspeed SDC clk define to have only one 'CLK'
  - Fix i.MX6QDL video clk parent
  - Critical clk markings for qcom SDM845
  - Fix Stratix10 mpu_free_clk and sdmmc_free_clk parents
  - Mark Rockchip's pclk_rkpwm_pmu as critical clock, due to it supplying
    the pwm used to drive the logic supply of the rk3399 core.
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "The new and exciting feature this time around is in the clk core.
  We've added duty cycle support to the clk API so that clk signal duty
  cycle ratios can be adjusted while taking into account things like clk
  dividers and clk tree hierarchy. So far only one SoC has implemented
  support for this, but I expect there will be more to come in the
  future.

  Outside of the core, we have the usual pile of clk driver updates and
  additions. The Amlogic meson driver got the most lines in the diffstat
  this time around because it added support for a whole bunch of
  hardware and duty cycle configuration. After that the Rockchip PX30,
  Qualcomm SDM845, and Renesas SoC drivers fill in a majority of the
  diff. We're left with the collection of non-critical fixes after that.
  Overall it looks pretty quiet this time.

  Core:
   - Clk duty cycle support
   - Proper CLK_SET_RATE_GATE support throughout the tree

  New Drivers:
   - Actions Semi Owl series S700 SoC clk driver
   - Qualcomm SDM845 display clock controller
   - i.MX6SX ocram_s clk support
   - Uniphier NAND, USB3 PHY, and SPI clk support
   - Qualcomm RPMh clk driver
   - i.MX7D mailbox clk support
   - Maxim 9485 Programmable Clock Generator
   - expose 32 kHz PLL on PXA SoCs
   - imx6sll GPIO clk gate support
   - Atmel at91 I2S audio clk support
   - SI544/SI514 clk on/off support
   - i.MX6UL GPIO clock gates in CCM CCGR
   - Renesas Crypto Engine clocks on R-Car H3
   - Renesas clk support for the new RZ/N1D SoC
   - Allwinner A64 display engine clock support
   - support for Rockchip's PX30 SoC
   - Amlogic Meson axg PCIe and audio clocks
   - Amlogic Meson GEN CLK on gxbb, gxl and axg

  Updates:
   - remove an unused variable from Exynos4412 ISP driver
   - fix a thinko bug in SCMI clk division logic
   - add missing of_node_put()s in some i.MX clk drivers
   - Tegra SDMMC clk jitter improvements with high speed signaling modes
   - SPDX tagging for qcom and cs2000-cp drivers
   - stop leaking con ids in __clk_put()
   - fix a corner case in fixed factor clk probing where node is in DT
     but parent clk is registered much later
   - Marvell Armada 3700 clk_pm_cpu_get_parent() had an invalid return
     value
   - i.MX clk init arrays removed in place of CLK_IS_CRITICAL
   - convert to CLK_IS_CRITICAL for i.MX51/53 driver
   - fix Tegra BPMP driver oops when xlating a NULL clk
   - proper default configuration for vic03 and vde clks on Tegra124
   - mark Tegra memory controller clks as critical
   - fix array bounds clamp in Tegra's emc determine_rate() op
   - Ingenic i2s bit update and allow UDC clk to gate
   - fix name of aspeed SDC clk define to have only one 'CLK'
   - fix i.MX6QDL video clk parent
   - critical clk markings for qcom SDM845
   - fix Stratix10 mpu_free_clk and sdmmc_free_clk parents
   - mark Rockchip's pclk_rkpwm_pmu as critical clock, due to it
     supplying the pwm used to drive the logic supply of the rk3399
     core"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (85 commits)
  clk: rockchip: Add pclk_rkpwm_pmu to PMU critical clocks in rk3399
  clk: cs2000-cp: convert to SPDX identifiers
  clk: scmi: Fix the rounding of clock rate
  clk: qcom: Add display clock controller driver for SDM845
  clk: mvebu: armada-37xx-periph: Remove unused var num_parents
  clk: samsung: Remove unused mout_user_aclk400_mcuisp_p4x12 variable
  clk: actions: Add S700 SoC clock support
  dt-bindings: clock: Add S700 support for Actions Semi Soc's
  clk: actions: Add missing REGMAP_MMIO dependency
  clk: uniphier: add clock frequency support for SPI
  clk: uniphier: add more USB3 PHY clocks
  clk: uniphier: add NAND 200MHz clock
  clk: tegra: make sdmmc2 and sdmmc4 as sdmmc clocks
  clk: tegra: Add sdmmc mux divider clock
  clk: tegra: Refactor fractional divider calculation
  clk: tegra: Fix includes required by fence_udelay()
  clk: imx6sll: fix missing of_node_put()
  clk: imx6ul: fix missing of_node_put()
  clk: imx: add ocram_s clock for i.mx6sx
  clk: mvebu: armada-37xx-periph: Fix wrong return value in get_parent
  ...
2018-08-15 21:41:21 -07:00
Stephen Boyd
ac7da1b787 Merge branches 'clk-actions-s700', 'clk-exynos-unused', 'clk-qcom-dispcc-845', 'clk-scmi-round' and 'clk-cs2000-spdx' into clk-next
* clk-actions-s700:
  :  - Actions Semi Owl series S700 SoC clk driver
  clk: actions: Add S700 SoC clock support
  dt-bindings: clock: Add S700 support for Actions Semi Soc's
  clk: actions: Add missing REGMAP_MMIO dependency

* clk-exynos-unused:
  :  - Remove an unused variable from Exynos4412 ISP driver
  clk: samsung: Remove unused mout_user_aclk400_mcuisp_p4x12 variable

* clk-qcom-dispcc-845:
  :  - Qualcomm SDM845 display clock controller
  clk: qcom: Add display clock controller driver for SDM845
  dt-bindings: clock: Introduce QCOM Display clock bindings
  clk: qcom: Move frequency table macro to common file

* clk-scmi-round:
  :  - Fix a thinko bug in SCMI clk division logic
  clk: scmi: Fix the rounding of clock rate

* clk-cs2000-spdx:
  clk: cs2000-cp: convert to SPDX identifiers
2018-08-14 23:00:15 -07:00
Stephen Boyd
032405a754 Merge branches 'clk-imx6-ocram', 'clk-missing-put', 'clk-tegra-sdmmc-jitter', 'clk-allwinner' and 'clk-uniphier' into clk-next
* clk-imx6-ocram:
  :  - i.MX6SX ocram_s clk support
  clk: imx: add ocram_s clock for i.mx6sx

* clk-missing-put:
  :  - Add missing of_node_put()s in some i.MX clk drivers
  clk: imx6sll: fix missing of_node_put()
  clk: imx6ul: fix missing of_node_put()

* clk-tegra-sdmmc-jitter:
  :  - Tegra SDMMC clk jitter improvements with high speed signaling modes
  clk: tegra: make sdmmc2 and sdmmc4 as sdmmc clocks
  clk: tegra: Add sdmmc mux divider clock
  clk: tegra: Refactor fractional divider calculation
  clk: tegra: Fix includes required by fence_udelay()

* clk-allwinner:
  clk: sunxi-ng: add A64 compatible string
  dt-bindings: add compatible string for the A64 DE2 CCU
  clk: sunxi-ng: r40: Export video PLLs
  clk: sunxi-ng: r40: Allow setting parent rate to display related clocks
  clk: sunxi-ng: r40: Add minimal rate for video PLLs

* clk-uniphier:
  :  - Uniphier NAND, USB3 PHY, and SPI clk support
  clk: uniphier: add clock frequency support for SPI
  clk: uniphier: add more USB3 PHY clocks
  clk: uniphier: add NAND 200MHz clock
2018-08-14 22:58:53 -07:00
Stephen Boyd
d16adaf0b9 Merge branches 'clk-mvebu-spdx', 'clk-meson', 'clk-imx7d-mu', 'clk-imx-init-array-cleanup' and 'clk-rockchip' into clk-next
* clk-mvebu-spdx:
  clk: mvebu: armada-37xx-periph: switch to SPDX license identifier

* clk-meson:
  clk: meson: add gen_clk
  clk: meson: gxbb: remove HHI_GEN_CLK_CTNL duplicate definition
  clk: meson-axg: add clocks required by pcie driver
  clk: meson: remove unused clk-audio-divider driver
  clk: meson: stop rate propagation for audio clocks
  clk: meson: axg: add the audio clock controller driver
  clk: meson: add axg audio sclk divider driver
  clk: meson: add triple phase clock driver
  clk: meson: add clk-phase clock driver
  clk: meson: clean-up meson clock configuration
  clk: meson: remove obsolete register access
  clk: meson: expose GEN_CLK clkid
  clk: meson-axg: add pcie and mipi clock bindings
  dt-bindings: clock: add meson axg audio clock controller bindings
  clk: meson: audio-divider is one based
  clk: meson-gxbb: set fclk_div2 as CLK_IS_CRITICAL

* clk-imx7d-mu:
  :  - i.MX7D mailbox clk support
  clk: imx7d: add IMX7D_MU_ROOT_CLK

* clk-imx-init-array-cleanup:
  :  - i.MX clk init arrays removed in place of CLK_IS_CRITICAL
  clk: imx6sx: remove clks_init_on array
  clk: imx6sl: remove clks_init_on array
  clk: imx6q: remove clks_init_on array

* clk-rockchip:
  clk: rockchip: Add pclk_rkpwm_pmu to PMU critical clocks in rk3399
  clk: rockchip: fix clk_i2sout parent selection bits on rk3399
  clk: rockchip: add clock controller for px30
  clk: rockchip: add support for half divider
  dt-bindings: add bindings for px30 clock controller
  clk: rockchip: add dt-binding header for px30
2018-08-14 22:58:45 -07:00
Stephen Boyd
ea4f7872c7 Merge branches 'clk-ingenic-fixes', 'clk-max9485', 'clk-pxa-32k-pll', 'clk-aspeed' and 'clk-imx6sll-gpio' into clk-next
* clk-ingenic-fixes:
  :  - Ingenic i2s bit update and allow UDC clk to gate
  clk: ingenic: Add missing flag for UDC clock
  clk: ingenic: Fix incorrect data for the i2s clock

* clk-max9485:
  :  - Maxim 9485 Programmable Clock Generator
  clk: Add driver for MAX9485
  dts: clk: add devicetree bindings for MAX9485

* clk-pxa-32k-pll:
  :  - Expose 32 kHz PLL on PXA SoCs
  clk: pxa: export 32kHz PLL

* clk-aspeed:
  :  - Fix name of aspeed SDC clk define to have only one 'CLK'
  clk: aspeed: Fix SDCLK name

* clk-imx6sll-gpio:
  :  - imx6sll GPIO clk gate support
  clk: imx6sll: add GPIO LPCGs
2018-08-14 22:58:39 -07:00
Stephen Boyd
b183c6887a Merge branches 'clk-imx6-video-parent', 'clk-qcom-sdm845-criticals', 'clk-renesas', 'clk-stratix10-fixes' and 'clk-atmel-i2s' into clk-next
* clk-imx6-video-parent:
  :  - Fix i.MX6QDL video clk parent
  clk: imx6: fix video_27m parent for IMX6QDL_CLK_CKO1_SEL

* clk-qcom-sdm845-criticals:
  :  - critical clk markings for qcom SDM845
  clk: qcom: Enable clocks which needs to be always on for SDM845

* clk-renesas:
  clk: renesas: Renesas R9A06G032 clock driver
  dt-bindings: clock: renesas,r9a06g032-sysctrl: documentation
  dt-bindings: clock: Add the r9a06g032-sysctrl.h file
  clk: renesas: r8a7795: Add CCREE clock
  clk: renesas: r8a7795: Add CR clock

* clk-stratix10-fixes:
  :  - Fix Stratix10 mpu_free_clk and sdmmc_free_clk parents
  clk: socfpga: stratix10: fix the sdmmc_free_clk mux
  clk: socfpga: stratix10: fix the parents of mpu_free_clk

* clk-atmel-i2s:
  :  - Atmel at91 I2S audio clk support
  clk: at91: add I2S clock mux driver
  dt-bindings: clk: at91: add an I2S mux clock
2018-08-14 22:58:35 -07:00
Olof Johansson
ea537363c7 Amlogic 64-bit DT changes for v4.19, round 2
- new SoC: S905W
 - new boards: based on S905W: Amlogic P281, Oranth Tanix TX3 Mini
 - AXG: add DT for new audio clock controller
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Merge tag 'amlogic-dt64-2-1' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt

Amlogic 64-bit DT changes for v4.19, round 2
- new SoC: S905W
- new boards: based on S905W: Amlogic P281, Oranth Tanix TX3 Mini
- AXG: add DT for new audio clock controller

* tag 'amlogic-dt64-2-1' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  ARM64: dts: meson-gxl: add support for the Oranth Tanix TX3 Mini
  ARM64: dts: meson-gxl: add support for the S905W SoC and the P281 board
  dt-bindings: arm: amlogic: Add support for the Oranth Tanix TX3 Mini
  dt-bindings: arm: amlogic: Add support for GXL S905W and the P281 board
  dt-bindings: add vendor prefix for Shenzhen Oranth Technology Co., Ltd.
  ARM64: dts: meson-axg: add the audio clock controller
  clk: meson: expose GEN_CLK clkid
  clk: meson-axg: add pcie and mipi clock bindings
  dt-bindings: clock: add meson axg audio clock controller bindings

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-07-25 23:53:39 -07:00
Saravanan Sekar
d0e45d686a dt-bindings: clock: Add S700 support for Actions Semi Soc's
Add clock bindings constants for action S700
Maintain common clock dt-bindings for Actions Semi SoC's
S700 and S900.

Signed-off-by: Parthiban Nallathambi <pn@denx.de>
Signed-off-by: Saravanan Sekar <sravanhome@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-07-25 16:40:53 -07:00
Rob Herring
791d3ef2e1 dt-bindings: remove 'interrupt-parent' from bindings
'interrupt-parent' is often documented as part of define bindings, but
it is really outside the scope of a device binding. It's never required
in a given node as it is often inherited from a parent node. Or it can
be implicit if a parent node is an 'interrupt-controller' node. So
remove it from all the binding files.

Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
2018-07-25 14:09:39 -06:00
Krzysztof Kozlowski
fb174b27e8 clk: samsung: Remove support for Exynos5440
The Exynos5440 is not actively developed, there are no development
boards available and probably there are no real products with it.
Remove wide-tree support for Exynos5440.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Sylwester Nawrocki <snawrocki@kernel.org>
2018-07-24 18:43:52 +02:00
Taniya Das
6c79d12e94 dt-bindings: clock: Introduce QCOM Display clock bindings
Add device tree bindings for display clock controller for Qualcomm
Technology Inc's SDM845 SoCs.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-07-06 16:46:22 -07:00
Daniel Mack
18df02fb79 dts: clk: add devicetree bindings for MAX9485
This patch adds the devicetree bindings for MAX9485, a programmable audio
clock generator.

Signed-off-by: Daniel Mack <daniel@zonque.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-07-06 11:27:24 -07:00
Codrin Ciubotariu
5f273c0d9f dt-bindings: clk: at91: add an I2S mux clock
The I2S mux clock can be used to select the I2S input clock. The
available parents are the peripheral and the generated clocks.

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-07-06 11:11:16 -07:00
Elaine Zhang
97752d2343 dt-bindings: add bindings for px30 clock controller
Add devicetree bindings for Rockchip cru which found on
Rockchip SoCs.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-07-03 20:50:30 +02:00
Icenowy Zheng
f7486bc38c
dt-bindings: add compatible string for the A64 DE2 CCU
The Allwinner A64 SoC has a DE2 CCU like the one in the DE2 of Allwinner
H5 SoC.

Add a compatible string for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-06-27 20:27:44 +02:00
Michel Pollet
e4b08e1f3e dt-bindings: clock: renesas,r9a06g032-sysctrl: documentation
The Renesas R9A06G032 SYSCTRL node description.

Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-06-25 11:09:19 +02:00
Jerome Brunet
372401efd9 dt-bindings: clock: add meson axg audio clock controller bindings
Export the clock ids dt-bindings usable by the consumers of the clock
controller and add the documentation for the device tree bindings of
the audio clock controller of the A113 based SoCs.

Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2018-06-22 12:59:05 +02:00
Alexandre Belloni
1e259703f9 dt-bindings: clk: at91: Document all the PMC compatibles
Add missing PMC compatibles to the list of available compatibles.

Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2018-06-20 11:50:27 +02:00
Mauro Carvalho Chehab
34962fb807 docs: Fix more broken references
As we move stuff around, some doc references are broken. Fix some of
them via this script:
	./scripts/documentation-file-ref-check --fix

Manually checked that produced results are valid.

Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Takashi Iwai <tiwai@suse.de>
Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Miguel Ojeda <miguel.ojeda.sandonis@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Acked-by: Jonathan Corbet <corbet@lwn.net>
2018-06-15 18:11:26 -03:00
Linus Torvalds
721afaa2ae ARM: Device-tree updates
As always, a large number of DT updates. Too many to enumerate them all,
 but at a glance:
 
 New SoCs introduced in this release:
 
  - Amlogic:
    + Meson 8M2 SoC, a.k.a. S812. A quad Cortex-A9 SoC used in some set
      top boxes and other products.
 
  - Mediatek:
    + MT7623A, which is a flavor of the MT7623 family with other on-chip
      ethernet options.
 
  - Qualcomm:
    + SDM845, a.k.a Snapdragon 845, an 4+4-core Kryo 385/845
      (Cortex-A75/A55 derivative) SoC that's one of the current high-end
      mobile SoCs.
 
      It's great to see mainline support for it. So far, you
      can't do much with it, since a lot of peripherals are not yet in the
      DTs but driver support for USB, GPU and other pieces are starting to
      trickle in. This might end up being a well-supported SoC upstream if
      the momentum keeps up.
 
  - Renesas:
    + R8A77990, a.k.a R-Car E3, a new automotive entertainment-targeted
      SoC. Currently only one Cortex-A53 CPU is enabled, we are eagerly
      awaiting more. So far, basic drivers such as serial, gpios, PMU and
      ethernet are enabled.
    + R8A77470, a.k.a. RZ/G1C, a new dual Cortex-A7 SoC with PowerVR
      GPU. Same here, basic set of drivers such as serial, gpios and ethernet
      enabled, and SMP support is also forthcoming.
 
  - STMicroelectronics:
    + STM32F469, very similar tih STM32F429 but with display support
 
 Enhancements to SoCs/platforms (DTS contents, some driver portions might
 not be in yet):
 
  - Allwinner sun8i (h3/a33/a83t) SMP, DVFS tweaks, misc
  - Amlogic Meson: I2C, UFS, TDM, GPIO external interrupts, MMC resets
  - Hisilicon hi3660: Thermal cooling, CPU frequency scaling, mailbox interfaces
  - Marvell Berlin2CD: SMP support, thermal sensors
  - Mediatek MT7623: Highspeed DMA, audio support
  - Qualcomm IPQ8074 PCIe support, MSM8996 UFS support
  - Renesas: Watchdog and PMU support across many platforms
  - Rockchip RK3399: USB3 OTG support
  - Samsung Exynos: Audio-over-HDMI on Odroid X/X2/U3
  - STMicro STM32: Lots of peripherals added to STM32MP175C
  - Uniphier: Ethernet support
 
 New boards:
 
  - Allwinner A20: Olimex A20-SOM-EVB-eMMC variant
  - Allwinner H2+: Libre Computer ALL-H3-CC (h2+ version)
  - Allwinner A33: Nintendo NES/SuperNES Classic Edition
  - Aspeed: S2600WF, Inventec Lanyang BMC, Portwell Neptune
  - Berlin2CD: Valve Steam Link
  - Broadcom BCM5301X: Luxul XAP-1610 and XWR-3150 V1
  - Broadcom: Raspberry Pi 3 B+
  - Mediatek MT7623N and MT7623A: reference boards
  - Meson 8M2: Tronsmart MXIII Plus
  - NXP i.MX: Engicam i.CoreM6, DHCOM iMX6 SOM, BTicino i.MX6DL Mamoj
  - Qualcomm MSM8974: Sony Xperia Z1 Compact support
  - Qualcomm SDM845: MTP development board
  - Renesas: Ebisu R8A77990 board
  - Renesas RZ/G1C: iwg23s: iWave G235-SDB
  - TI am335x: Pocketbeagle support
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC device tree updates from Olof Johansson:
 "As always, a large number of DT updates. Too many to enumerate them
  all, but at a glance:

  New SoCs introduced in this release:

   - Amlogic:
      + Meson 8M2 SoC, a.k.a. S812. A quad Cortex-A9 SoC used in some
        set top boxes and other products.

   - Mediatek:
      + MT7623A, which is a flavor of the MT7623 family with other
        on-chip ethernet options.

   - Qualcomm:
      + SDM845, a.k.a Snapdragon 845, an 4+4-core Kryo 385/845
        (Cortex-A75/A55 derivative) SoC that's one of the current
        high-end mobile SoCs.

        It's great to see mainline support for it. So far, you can't do
        much with it, since a lot of peripherals are not yet in the DTs
        but driver support for USB, GPU and other pieces are starting to
        trickle in. This might end up being a well-supported SoC
        upstream if the momentum keeps up.

   - Renesas:
      + R8A77990, a.k.a R-Car E3, a new automotive
        entertainment-targeted SoC. Currently only one Cortex-A53 CPU is
        enabled, we are eagerly awaiting more. So far, basic drivers
        such as serial, gpios, PMU and ethernet are enabled.
      + R8A77470, a.k.a. RZ/G1C, a new dual Cortex-A7 SoC with PowerVR
        GPU. Same here, basic set of drivers such as serial, gpios and
        ethernet enabled, and SMP support is also forthcoming.

   - STMicroelectronics:
      + STM32F469, very similar tih STM32F429 but with display support

  Enhancements to SoCs/platforms (DTS contents, some driver portions
  might not be in yet):
   - Allwinner sun8i (h3/a33/a83t) SMP, DVFS tweaks, misc
   - Amlogic Meson: I2C, UFS, TDM, GPIO external interrupts, MMC resets
   - Hisilicon hi3660: Thermal cooling, CPU frequency scaling, mailbox interfaces
   - Marvell Berlin2CD: SMP support, thermal sensors
   - Mediatek MT7623: Highspeed DMA, audio support
   - Qualcomm IPQ8074 PCIe support, MSM8996 UFS support
   - Renesas: Watchdog and PMU support across many platforms
   - Rockchip RK3399: USB3 OTG support
   - Samsung Exynos: Audio-over-HDMI on Odroid X/X2/U3
   - STMicro STM32: Lots of peripherals added to STM32MP175C
   - Uniphier: Ethernet support

  New boards:
   - Allwinner A20: Olimex A20-SOM-EVB-eMMC variant
   - Allwinner H2+: Libre Computer ALL-H3-CC (h2+ version)
   - Allwinner A33: Nintendo NES/SuperNES Classic Edition
   - Aspeed: S2600WF, Inventec Lanyang BMC, Portwell Neptune
   - Berlin2CD: Valve Steam Link
   - Broadcom BCM5301X: Luxul XAP-1610 and XWR-3150 V1
   - Broadcom: Raspberry Pi 3 B+
   - Mediatek MT7623N and MT7623A: reference boards
   - Meson 8M2: Tronsmart MXIII Plus
   - NXP i.MX: Engicam i.CoreM6, DHCOM iMX6 SOM, BTicino i.MX6DL Mamoj
   - Qualcomm MSM8974: Sony Xperia Z1 Compact support
   - Qualcomm SDM845: MTP development board
   - Renesas: Ebisu R8A77990 board
   - Renesas RZ/G1C: iwg23s: iWave G235-SDB
   - TI am335x: Pocketbeagle support"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (448 commits)
  ARM: dts: aspeed: Fix hwrng register address
  arm64: dts: sprd: whale2: Add the rtc enable clock for watchdog
  arm64: dts: sprd: Add GPIO and GPIO keys device nodes
  arm64: dts: sprd: fix typo in 'remote-endpoint'
  arm64: dts: apq8096-db820c: Removed bt-en-1-8v regulator
  arm64: dts: fix regulator property name for wlan pcie endpoint
  arm64: dts: qcom: msm8996: Use UFS_GDSC for UFS
  ARM: dts: pxa3xx: fix MMC clocks
  ARM: pxa: dts: add pin definitions for extended GPIOs
  ARM: pxa: dts: add gpio-ranges to gpio controller
  ARM: dts: ipq8074: Enable few peripherals for hk01 board
  ARM: dts: ipq8074: Add pcie nodes
  ARM: dts: ipq8074: Add peripheral nodes
  ARM: dts: ipq4019: Add qcom-ipq4019-ap.dk07.1-c2 board file
  ARM: dts: ipq4019: Add qcom-ipq4019-ap.dk07.1-c1 board file
  ARM: dts: ipq4019: Add ipq4019-ap.dk07.1 common data
  ARM: dts: ipq4019: Add qcom-ipq4019-ap.dk04.1-c3 board file
  ARM: dts: ipq4019: Add ipq4019-ap.dk04.1-c1 board file
  ARM: dts: ipq4019: Add ipq4019-ap.dk04.dtsi
  ARM: dts: ipq4019: Change the max opp frequency
  ...
2018-06-11 17:57:38 -07:00
Stephen Boyd
b2ac878acd Merge branches 'clk-davinci-psc-da830', 'clk-renesas', 'clk-at91-recalc', 'clk-davinci' and 'clk-meson' into clk-next
* clk-davinci-psc-da830:
  clk: davinci: psc-da830: fix USB0 48MHz PHY clock registration

* clk-renesas:
  clk: renesas: cpg-mssr: Add support for R-Car E3
  clk: renesas: Add r8a77990 CPG Core Clock Definitions
  clk: renesas: rcar-gen2: Centralize quirks handling
  clk: renesas: r8a77980: Correct parent clock of PCIEC0
  clk: renesas: r8a7794: Fix LB clock divider
  clk: renesas: r8a7792: Fix LB clock divider
  clk: renesas: r8a7791/r8a7793: Fix LB clock divider
  clk: renesas: r8a7745: Fix LB clock divider
  clk: renesas: r8a7743: Fix LB clock divider
  clk: renesas: cpg-mssr: Add r8a77470 support
  clk: renesas: Add r8a77470 CPG Core Clock Definitions
  clk: renesas: r8a77965: Add MSIOF controller clocks

* clk-at91-recalc:
  clk: at91: PLL recalc_rate() now using cached MUL and DIV values

* clk-davinci:
  clk: davinci: Fix link errors when not all SoCs are enabled
  clk: davinci: psc: allow for dev == NULL
  clk: davinci: da850-pll: change PLL0 to CLK_OF_DECLARE
  clk: davinci: pll: allow dev == NULL
  clk: davinci: psc-dm365: fix few clocks
  clk: davinci: pll-dm646x: keep PLL2 SYSCLK1 always enabled
  clk: davinci: psc-dm355: fix ASP0/1 clkdev lookups
  clk: davinci: pll-dm355: fix SYSCLKn parent names
  clk: davinci: pll-dm355: drop pll2_sysclk2

* clk-meson:
  clk: meson: axg: let mpll clocks round closest
  clk: meson: mpll: add round closest support
  clk: meson: meson8b: mark fclk_div2 gate clocks as CLK_IS_CRITICAL
  clk: meson: use SPDX license identifiers consistently
  clk: meson: drop CLK_SET_RATE_PARENT flag
  clk: meson-axg: Add AO Clock and Reset controller driver
  clk: meson: aoclk: refactor common code into dedicated file
  clk: meson: migrate to devm_of_clk_add_hw_provider API
  clk: meson: gxbb: add the video decoder clocks
  clk: meson: meson8b: add support for the NAND clocks
  dt-bindings: clock: reset: Add AXG AO Clock and Reset Bindings
  dt-bindings: clock: axg-aoclkc: New binding for Meson-AXG SoC
  clk: meson: gxbb: expose VDEC_1 and VDEC_HEVC clocks
  dt-bindings: clock: meson8b: export the NAND clock
2018-06-04 12:37:41 -07:00
Stephen Boyd
77122d6f74 Merge branch 'clk-qcom-sdm845' into clk-next
* clk-qcom-sdm845:
  clk: qcom: Export clk_fabia_pll_configure()
  clk: qcom: Add video clock controller driver for SDM845
  dt-bindings: clock: Introduce QCOM Video clock bindings
  clk: qcom: Add Global Clock controller (GCC) driver for SDM845
  clk: qcom: Add DT bindings for SDM845 gcc clock controller
  clk: qcom: Configure the RCGs to a safe source as needed
  clk: qcom: Add support for BRANCH_HALT_SKIP flag for branch clocks
  clk: qcom: Simplify gdsc status checking logic
  clk: qcom: gdsc: Add support to poll CFG register to check GDSC state
  clk: qcom: gdsc: Add support to poll for higher timeout value
  clk: qcom: gdsc: Add support to reset AON and block reset logic
  clk: qcom: Add support for controlling Fabia PLL
  clk: qcom: Clear hardware clock control bit of RCG

Also fixup the Kconfig mess where SDM845 GCC has msm8998 in the
description and also the video Kconfig says things slightly differently
from the GCC one so just make it the same.
2018-06-04 12:34:51 -07:00
Stephen Boyd
36851edd7e Merge branches 'clk-match-string', 'clk-ingenic', 'clk-si544-round-fix' and 'clk-bcm-stingray' into clk-next
* clk-match-string:
  clk: use match_string() helper
  clk: bcm2835: use match_string() helper

* clk-ingenic:
  clk: ingenic: jz4770: Add 150us delay after enabling VPU clock
  clk: ingenic: jz4770: Enable power of AHB1 bus after ungating VPU clock
  clk: ingenic: jz4770: Modify C1CLK clock to disable CPU clock stop on idle
  clk: ingenic: jz4770: Change OTG from custom to standard gated clock
  clk: ingenic: Support specifying "wait for clock stable" delay
  clk: ingenic: Add support for clocks whose gate bit is inverted

* clk-si544-round-fix:
  clk-si544: Properly round requested frequency to nearest match

* clk-bcm-stingray:
  clk: bcm: Update and add Stingray clock entries
  dt-bindings: clk: Update Stingray binding doc
2018-06-04 12:32:33 -07:00
Stephen Boyd
45ba387511 Merge branches 'clk-allwinner', 'clk-rockchip', 'clk-tegra', 'clk-berlin' and 'clk-qcom-mmagic' into clk-next
* clk-allwinner:
  clk: sunxi-ng: r40: export a regmap to access the GMAC register
  clk: sunxi-ng: r40: rewrite init code to a platform driver
  clk: sunxi-ng: add support for H6 PRCM CCU

* clk-rockchip:
  clk: rockchip: remove deprecated gate-clk code and dt-binding
  clk: rockchip: use match_string() helper

* clk-tegra:
  clk: tegra: Add quirk for getting CDEV1/2 clocks on Tegra20
  clk: tegra20: Correct parents of CDEV1/2 clocks
  clk: tegra20: Add DEV1/DEV2 OSC dividers

* clk-berlin:
  clk: berlin: switch to SPDX license identifier

* clk-qcom-mmagic:
  clk: qcom: mmcc-msm8996: leave all mmagic gdscs and clocks always enabled
  clk: qcom: Register the gdscs before the clocks
  clk: qcom: gdsc: Add support for ALWAYS_ON gdscs
2018-06-04 12:27:44 -07:00
Stephen Boyd
872e47f75f Merge branches 'clk-qcom-rpmh', 'clk-npcm7xx', 'clk-of-parent-count' and 'clk-qcom-rcg-fix' into clk-next
* clk-qcom-rpmh:
  dt-bindings: clock: Introduce QCOM RPMh clock bindings

* clk-npcm7xx:
  clk: npcm7xx: fix return value check in npcm7xx_clk_init()
  clk: npcm7xx: add clock controller
  dt-binding: clk: npcm750: Add binding for Nuvoton NPCM7XX Clock

* clk-of-parent-count:
  pinctrl: sunxi: Use of_clk_get_parent_count() instead of open coding
  soc/tegra: pmc: Use of_clk_get_parent_count() instead of open coding
  soc: rockchip: power-domain: Use of_clk_get_parent_count() instead of open coding
  ARM: timer-sp: Use of_clk_get_parent_count() instead of open coding
  clk: Extract OF clock helpers in <linux/of_clk.h>

* clk-qcom-rcg-fix:
  clk: qcom: Base rcg parent rate off plan frequency
2018-06-04 12:27:29 -07:00
Stephen Boyd
43705f5294 Merge branch 'clk-actions' into clk-next
* clk-actions:
  clk: actions: Add S900 SoC clock support
  clk: actions: Add pll clock support
  clk: actions: Add composite clock support
  clk: actions: Add fixed factor clock support
  clk: actions: Add factor clock support
  clk: actions: Add divider clock support
  clk: actions: Add mux clock support
  clk: actions: Add gate clock support
  clk: actions: Add common clock driver support
  dt-bindings: clock: Add Actions S900 clock bindings
2018-06-04 12:27:02 -07:00
Pramod Kumar
48bf9a522c dt-bindings: clk: Update Stingray binding doc
Update Stingray clock binding document to add additional clock entries
with names matching the latest ASIC datasheet. Also modify a few existing
entries to make their naming more consistent with the rest of the entries

Signed-off-by: Pramod Kumar <pramod.kumar@broadcom.com>
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-06-01 23:26:36 -07:00
Amit Nischal
84b66b2116 dt-bindings: clock: Introduce QCOM Video clock bindings
Add device tree bindings for video clock controller for
Qualcomm Technology Inc's SoCs.

Signed-off-by: Amit Nischal <anischal@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-06-01 11:49:07 -07:00
Kevin Hilman
019c5beb43 First round of binding update for meson clocks targeted at v4.18
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Merge tag 'for-kevin-meson-clk-bindings-v4.18-1' of https://github.com/BayLibre/clk-meson into v4.18/dt64

First round of binding update for meson clocks targeted at v4.18

# gpg: Signature made Wed May 16 01:23:15 2018 PDT
# gpg:                using RSA key F4E159AE18F3F56D5F1BB71BE6FC0F1C37F2DA85
# gpg: Can't check signature: No public key

* tag 'for-kevin-meson-clk-bindings-v4.18-1' of https://github.com/BayLibre/clk-meson:
  dt-bindings: clock: reset: Add AXG AO Clock and Reset Bindings
  dt-bindings: clock: axg-aoclkc: New binding for Meson-AXG SoC
  clk: meson: gxbb: expose VDEC_1 and VDEC_HEVC clocks
  dt-bindings: clock: meson8b: export the NAND clock
2018-05-23 11:20:31 -07:00
Heiko Stuebner
1d646229f2 clk: rockchip: remove deprecated gate-clk code and dt-binding
Initially we tried modeling clocks via the devicetree before switching
to clocks declared in the clock drivers and only exporting specific
ids to the devicetree.

As the old code was in the kernel for 1-2 releases when the new mode
of operation was added we kept it for backwards compatibility.

That deprecation notice is in the binding since july 2014, so nearly
4 years now and I think it's time to drop the old cruft.

Especially as at the time using the mainline kernel on Rockchip devices
was not really possible, except for experiments on the really old socs of
the rk3066 + rk3188 line, so there shouldn't be any devicetrees still
around that rely on that code.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
2018-05-23 13:19:06 +02:00
Yixun Lan
0ac2e1d425 dt-bindings: clock: axg-aoclkc: New binding for Meson-AXG SoC
Update the dt-binding documentation to support new compatible string
for the Amlogic's Meson-AXG SoC.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2018-05-15 14:07:10 +02:00
Yoshihiro Shimoda
3570a2af47 clk: renesas: cpg-mssr: Add support for R-Car E3
Initial support for R-Car E3 (r8a77990), including core and module
clocks.

Based on the Table 8.2g of "R-Car Series, 3rd Generation User's Manual:
Hardware ((Rev. 0.80, Oct 31, 2017) with Manual Errata on Feb. 28, 2018".

Inspried by patches by Takeshi Kihara in the BSP.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-05-09 18:43:57 +02:00
Amit Nischal
9ee38b21a2 clk: qcom: Add DT bindings for SDM845 gcc clock controller
Add compatible string and the include file for gcc clock
controller for SDM845.

Signed-off-by: Amit Nischal <anischal@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-05-08 11:22:55 -07:00
Icenowy Zheng
b7c7b05065 clk: sunxi-ng: add support for H6 PRCM CCU
The H6 has clock/reset controls in PRCM part, like old SoCs such as H3
and A64. However, the PRCM CCU is rearranged; the register arragement
is now similar to the main CCU of H6, and the PRCM now has two APB
buses to control -- one is clocked from AHB clock derivde from AR100
clock, the other is clocked from the same mux with AR100 clock.
Therefore a new driver is written for it.

As there's no official document about the PRCM in H6, all the information
are indirectly collected from BSP and parts of the document, and the
information source is noted as comments in the driver's source code. If
reliable information is provided furtherly, the driver needs to be
rechecked.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-05-04 17:05:46 +02:00
Taniya Das
1f8777a45a dt-bindings: clock: Introduce QCOM RPMh clock bindings
Add RPMh clock device bindings for Qualcomm Technology Inc's SoCs. These
devices would be used for communicating resource state requests to control
the clocks managed by RPMh.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-05-02 08:11:15 -07:00
Jerome Brunet
d4740560bc dt-bindings: clock: meson: update documentation with hhi syscon
The HHI register region hosts more than just clocks and needs to
accessed drivers other than the clock controller, such as the display
driver.

This register region should be managed by syscon. It is already the case
on gxbb/gxl and it soon will be on axg. The clock controllers must use
this system controller instead of directly mapping the registers.

This changes the bindings of gxbb and axg's clock controllers. This is
due to an initial 'incomplete' knowledge of these SoCs, which is why the
meson bindings are unstable ATM.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-04-19 10:38:50 -07:00
Joonwoo Park
b5f5f525c5 clk: qcom: Add MSM8998 Global Clock Control (GCC) driver
Add support for the global clock controller found on MSM8998
based devices. This should allow most non-multimedia device
drivers to probe and control their clocks.

Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
Signed-off-by: Imran Khan <kimran@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
[bjorn: Specify regs for alpha_plls, fix white spaces and add binding]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-04-16 22:51:27 -07:00
Biju Das
5bf2fbbef5 clk: renesas: cpg-mssr: Add r8a77470 support
Add RZ/G1C (R8A77470) Clock Pulse Generator / Module Standby and Software
Reset support.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-04-16 13:39:40 +02:00
Stephen Boyd
a339bdf64a Merge branches 'clk-stratix10', 'clk-imx', 'clk-bcm', 'clk-cs2000' and 'clk-imx6sll' into clk-next
* clk-stratix10:
  clk: socfpga: stratix10: add clock driver for Stratix10 platform
  dt-bindings: documentation: add clock bindings information for Stratix10

* clk-imx:
  clk: imx7d: Move clks_init_on before any clock operations
  clk: imx7d: Correct ahb clk parent select
  clk: imx7d: Correct dram pll type
  clk: imx7d: Add USB clock information
  clk: imx: pllv2: avoid using uninitialized values
  clk: imx6ull: Add epdc_podf instead of sim_podf
  clk: imx: imx7d: correct video pll clock tree
  clk: imx: imx7d: add the Keypad Port module clock
  clk: imx7d: add CAAM clock
  clk: imx: imx7d: add the snvs clock
  clk: imx: imx6sx: update cko mux options

* clk-bcm:
  clk: bcm2835: De-assert/assert PLL reset signal when appropriate

* clk-cs2000:
  clk: cs2000: set pm_ops in hibernate-compatible way

* clk-imx6sll:
  clk: imx: add clock driver for imx6sll
  dt-bindings: imx: update clock doc for imx6sll
  clk: imx: add new gate/gate2 wrapper funtion
  clk: imx: Add CLK_IS_CRITICAL flag for busy divider and busy mux
2018-04-06 13:22:12 -07:00
Stephen Boyd
a83fdfae5a Merge branches 'clk-davinci', 'clk-si544', 'clk-rockchip', 'clk-uniphier' and 'clk-ti-flag-fix' into clk-next
* clk-davinci:
  clk: davinci: Remove redundant dev_err calls
  clk: davinci: cfgchip: Add TI DA8XX USB PHY clocks
  clk: davinci: New driver for TI DA8XX CFGCHIP clocks
  dt-bindings: clock: Add bindings for DA8XX CFGCHIP clocks
  clk: davinci: Add platform information for TI DM646x PSC
  clk: davinci: Add platform information for TI DM644x PSC
  clk: davinci: Add platform information for TI DM365 PSC
  clk: davinci: Add platform information for TI DM355 PSC
  clk: davinci: Add platform information for TI DA850 PSC
  clk: davinci: Add platform information for TI DA830 PSC
  clk: davinci: New driver for davinci PSC clocks
  dt-bindings: clock: New bindings for TI Davinci PSC
  clk: davinci: Add platform information for TI DM646x PLL
  clk: davinci: Add platform information for TI DM644x PLL
  clk: davinci: Add platform information for TI DM365 PLL
  clk: davinci: Add platform information for TI DM355 PLL
  clk: davinci: Add platform information for TI DA850 PLL
  clk: davinci: Add platform information for TI DA830 PLL
  clk: davinci: New driver for davinci PLL clocks
  dt-bindings: clock: Add new bindings for TI Davinci PLL clocks

* clk-si544:
  clk: Add driver for the si544 clock generator chip

* clk-rockchip:
  clk: rockchip: assign correct id for pclk_ddr and hclk_sd in rk3399
  clk: rockchip: Fix error return in phase clock registration
  clk: rockchip: Correct the behaviour of restoring cached phase
  clk: rockchip: Fix wrong parents for MMC phase clock for rk3328
  clk: rockchip: Fix wrong parent for SDMMC phase clock for rk3228
  clk: rockchip: Add 1.6GHz PLL rate for rk3399
  clk: rockchip: Restore the clock phase after the rate was changed
  clk: rockchip: Prevent calculating mmc phase if clock rate is zero
  clk: rockchip: Free the memory on the error path
  clk: rockchip: document hdmi_phy external input for rk3328
  clk: rockchip: add flags for rk3328 dclk_lcdc
  clk: rockchip: remove ignore_unused flag from rk3328 vio_h2p clocks
  clk: rockchip: protect all remaining rk3328 interconnect clocks
  clk: rockchip: export sclk_hdmi_sfc on rk3328
  clk: rockchip: remove HCLK_VIO from rk3328 dt header
  clk: rockchip: fix hclk_vio_niu on rk3328

* clk-uniphier:
  clk: uniphier: add additional ethernet clock lines for Pro4
  clk: uniphier: add SATA clock control support
  clk: uniphier: add PCIe clock control support
  clk: uniphier: add ethernet clock control support for PXs3
  clk: uniphier: add Pro4/Pro5/PXs2 audio system clock

* clk-ti-flag-fix:
  clk: ti: fix flag space conflict with clkctrl clocks
  clk: ti: clkctrl: add support for CLK_SET_RATE_PARENT flag
2018-04-06 13:22:06 -07:00
Stephen Boyd
b03781920c Merge branches 'clk-mediatek', 'clk-hisi', 'clk-allwinner', 'clk-ux500' and 'clk-renesas' into clk-next
* clk-mediatek:
  clk: mediatek: add audsys support for MT2701
  clk: mediatek: add devm_of_platform_populate() for MT7622 audsys
  dt-bindings: clock: mediatek: add audsys support for MT2701
  dt-bindings: clock: mediatek: update audsys documentation to adapt MFD device
  clk: mediatek: update missing clock data for MT7622 audsys
  clk: mediatek: fix PWM clock source by adding a fixed-factor clock
  dt-bindings: clock: mediatek: add binding for fixed-factor clock axisel_d4

* clk-hisi:
  clk: hisilicon: fix potential NULL dereference in hisi_clk_alloc()
  clk: hisilicon: mark wdt_mux_p[] as const
  clk: hisilicon: Mark phase_ops static
  clk: hi3798cv200: add emmc sample and drive clock
  clk: hisilicon: add hisi phase clock support
  clk: hi3798cv200: add COMBPHY0 clock support
  clk: hi3798cv200: fix define indentation
  clk: hi3798cv200: add support for HISTB_USB2_OTG_UTMI_CLK
  clk: hi3798cv200: correct IR clock parent
  clk: hi3798cv200: fix unregister call sequence in error path

* clk-allwinner:
  clk: sunxi-ng: add missing hdmi-slow clock for H6 CCU
  clk: sunxi-ng: add support for the Allwinner H6 CCU
  dt-bindings: add device tree binding for Allwinner H6 main CCU
  clk: sunxi-ng: Support fixed post-dividers on NKMP style clocks
  clk: sunxi-ng: h3: h5: export CLK_PLL_VIDEO
  clk: sunxi-ng: h3: h5: Allow some clocks to set parent rate
  clk: sunxi-ng: h3: h5: Add minimal rate for video PLL
  clk: sunxi-ng: Add check for minimal rate to NM PLLs
  clk: sunxi-ng: Use u64 for calculation of nkmp rate
  clk: sunxi-ng: Mask nkmp factors when setting register
  clk: sunxi-ng: remove select on obsolete SUNXI_CCU_X kconfig name

* clk-ux500:
  clk: ux500: Drop AB8540/9540 support

* clk-renesas: (27 commits)
  clk: renesas: cpg-mssr: Adjust r8a77980 ifdef
  clk: renesas: rcar-gen3: Always use readl()/writel()
  clk: renesas: sh73a0: Always use readl()/writel()
  clk: renesas: rza1: Always use readl()/writel()
  clk: renesas: rcar-gen2: Always use readl()/writel()
  clk: renesas: r8a7740: Always use readl()/writel()
  clk: renesas: r8a73a4: Always use readl()/writel()
  clk: renesas: mstp: Always use readl()/writel()
  clk: renesas: div6: Always use readl()/writel()
  clk: fix false-positive Wmaybe-uninitialized warning
  clk: renesas: r8a77965: Replace DU2 clock
  clk: renesas: cpg-mssr: Add support for R-Car M3-N
  clk: renesas: cpg-mssr: add R8A77980 support
  dt-bindings: clock: add R8A77980 CPG core clock definitions
  clk: renesas: r8a7792: Add rwdt clock
  clk: renesas: r8a7794: Add rwdt clock
  clk: renesas: r8a7791/r8a7793: Add rwdt clock
  clk: renesas: r8a7790: Add rwdt clock
  clk: renesas: r8a7745: Add rwdt clock
  clk: renesas: r8a7743: Add rwdt clock
  ...
2018-04-06 13:21:57 -07:00
Stephen Boyd
e8121d9867 Merge branches 'clk-spreadtrum', 'clk-stm32f', 'clk-stm32mp1', 'clk-hi655x' and 'clk-gpio' into clk-next
* clk-spreadtrum:
  clk: sprd: add RTC gate for SC9860
  dt-bindings: clocks: add APB RTC gate for SC9860

* clk-stm32f:
  clk: stm32: Add clk entry for SDMMC2 on stm32F769
  clk: stm32: Add DSI clock for STM32F469 Board
  clk: stm32: END_PRIMARY_CLK should be declare after CLK_SYSCLK

* clk-stm32mp1:
  clk: stm32: add configuration flags for each of the stm32 drivers
  clk: stm32mp1: add Debug clocks
  clk: stm32mp1: add MCO clocks
  clk: stm32mp1: add RTC clock
  clk: stm32mp1: add Peripheral & Kernel Clocks
  clk: stm32mp1: add Kernel timers
  clk: stm32mp1: add Sub System clocks
  clk: stm32mp1: add Post-dividers for PLL
  clk: stm32mp1: add PLL clocks
  clk: stm32mp1: add Source Clocks for PLLs
  clk: stm32mp1: add MP1 gate for hse/hsi/csi oscillators
  clk: stm32mp1: Introduce STM32MP1 clock driver
  dt-bindings: Document STM32MP1 Reset Clock Controller (RCC) bindings

* clk-hi655x:
  clk: enable hi655x common clk automatically

* clk-gpio:
  clk: clk-gpio: Allow GPIO to sleep in set/get_parent
2018-04-06 13:21:45 -07:00
Bai Ping
0c123a4fbb dt-bindings: imx: update clock doc for imx6sll
Add clock binding doc update for imx6sll.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
Acked-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-04-06 11:27:26 -07:00
Dinh Nguyen
89727949ea dt-bindings: documentation: add clock bindings information for Stratix10
Document that Stratix10 clock bindings, and add the clock header file. The
clock header is an enumeration of all the different clocks on the Stratix10
platform.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-04-06 09:54:59 -07:00
Tali Perry
56859d310c dt-binding: clk: npcm750: Add binding for Nuvoton NPCM7XX Clock
* Nuvoton NPCM7XX Clock Controller

Nuvoton Poleg BMC NPCM7XX contains an integrated clock controller, which
generates and supplies clocks to all modules within the BMC.

Signed-off-by: Tali Perry <tali.perry1@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-03-23 10:11:25 -07:00
Mike Looijmans
953cc3e811 clk: Add driver for the si544 clock generator chip
This patch adds the driver and devicetree documentation for the
Silicon Labs SI544 clock generator chip. This is an I2C controlled
oscillator capable of generating clock signals ranging from 200kHz
to 1500MHz.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
[sboyd: assign max_freq to 0 in is_valid_frequency() to squelch warning]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-03-23 10:05:25 -07:00
David Lechner
0c92c71770 dt-bindings: clock: Add bindings for DA8XX CFGCHIP clocks
This adds a new binding for the clocks present in the CFGCHIP syscon
registers in TI DA8XX SoCs.

Signed-off-by: David Lechner <david@lechnology.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-03-20 10:16:26 -07:00
David Lechner
21cdf7269f dt-bindings: clock: New bindings for TI Davinci PSC
This adds a new binding for the Power Sleep Controller (PSC) for the
mach-davinci family of processors.

Note: Although TI Keystone has a very similar PSC, we are not using the
existing bindings. Keystone is using a legacy one-node-per-clock binding
(actually two nodes if you count the separate reset binding for the same
IP block). Also, some davinci LPSCs have quirks that aren't handled by
the keystone bindings, so we would be adding one compatible string per
clock with quirks instead of just a new compatible string for each
controller.

Signed-off-by: David Lechner <david@lechnology.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-03-20 10:16:26 -07:00
David Lechner
b6e37ce237 dt-bindings: clock: Add new bindings for TI Davinci PLL clocks
This adds a new binding for the PLL IP blocks in the mach-davinci
family of processors. Currently, only da850 has device tree support
but these bindings can also work for other SoCs in this family just
by adding new compatible strings.

Note: Although these PLL controllers are very similar to the TI Keystone
SoCs, we are not re-using those bindings. The Keystone bindings use a
legacy one-node-per-clock binding. Furthermore, the mach-davinici SoCs
have a slightly different PLL register layout and a number of quirks
that can't be handled by the existing bindings, so the keystone bindings
could not be used as-is anyway.

Signed-off-by: David Lechner <david@lechnology.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-03-20 09:33:08 -07:00
Manivannan Sadhasivam
06d42212e6 dt-bindings: clock: Add Actions S900 clock bindings
Add Actions Semi S900 clock bindings.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-03-19 17:59:38 -07:00
Icenowy Zheng
2e08e4d2ff
dt-bindings: add device tree binding for Allwinner H6 main CCU
The Allwinner H6 main CCU uses the internal oscillator of the SoC, which
is different with old SoCs' main CCU.

Add device tree binding for the Allwinner H6 main CCU.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-18 21:16:59 +01:00
Gabriel Fernandez
605add0c7b dt-bindings: Document STM32MP1 Reset Clock Controller (RCC) bindings
The RCC block is responsible of the management of the clock and reset
generation for the complete circuit.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2018-03-11 15:40:32 -07:00
Tero Kristo
be02637f6b dt-bindings: clock: ti: add latching support to mux and divider clocks
Certain hardware configurations, like dra76x, have some of the clock
registers partitioned in a funky manner that requires the clock
control setup to be latched for PRCM to be notified of the change. This
is accomplished with a separate control bit under the register. Add
support for this clock latching support to divider and mux clocks.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2018-03-08 11:42:04 +02:00
Jacopo Mondi
7ce36da900 clk: renesas: cpg-mssr: Add support for R-Car M3-N
Initial support for R-Car M3-N (r8a77965), including core and module
clocks.

Based on Table 8.2d of "R-Car Series, 3rd Generation User's Manual:
Hardware (Rev. 0.80, Oct 31, 2017)".

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-02-26 09:13:29 +01:00
Sergei Shtylyov
ce15783c51 clk: renesas: cpg-mssr: add R8A77980 support
Add R-Car V3H (R8A77980) Clock Pulse Generator / Module Standby and
Software Reset support,  using the CPG/MSSR driver core and the common
R-Car Gen3 code.

Based on the original (and large) patch by Vladimir Barinov.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-02-20 13:39:07 +01:00
Heiko Stuebner
dd5bdb797f clk: rockchip: document hdmi_phy external input for rk3328
The hdmi-phy block inside the soc also loops its pll output back
into the clock controller, so document that already used input clock.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Rob Herring <robh@kernel.org>
2018-02-12 15:00:58 +01:00
Linus Torvalds
3879ae653a The core framework has a handful of patches this time around, mostly due
to the clk rate protection support added by Jerome Brunet. This feature
 will allow consumers to lock in a certain rate on the output of a clk so
 that things like audio playback don't hear pops when the clk frequency
 changes due to shared parent clks changing rates. Currently the clk
 API doesn't guarantee the rate of a clk stays at the rate you request
 after clk_set_rate() is called, so this new API will allow drivers
 to express that requirement. Beyond this, the core got some debugfs
 pretty printing patches and a couple minor non-critical fixes.
 
 Looking outside of the core framework diff we have some new driver
 additions and the removal of a legacy TI clk driver. Both of these hit
 high in the dirstat. Also, the removal of the asm-generic/clkdev.h file
 causes small one-liners in all the architecture Kbuild files. Overall, the
 driver diff seems to be the normal stuff that comes all the time to
 fix little problems here and there and to support new hardware.
 
 Core:
  - Clk rate protection
  - Symbolic clk flags in debugfs output
  - Clk registration enabled clks while doing bookkeeping updates
 
 New Drivers:
  - Spreadtrum SC9860
  - HiSilicon hi3660 stub
  - Qualcomm A53 PLL, SPMI clkdiv, and MSM8916 APCS
  - Amlogic Meson-AXG
  - ASPEED BMC
 
 Removed Drivers:
  - TI OMAP 3xxx legacy clk (non-DT) support
  - asm*/clkdev.h got removed (not really a driver)
 
 Updates:
  - Renesas FDP1-0 module clock on R-Car M3-W
  - Renesas LVDS module clock on R-Car V3M
  - Misc fixes to pr_err() prints
  - Qualcomm MSM8916 audio fixes
  - Qualcomm IPQ8074 rounded out support for more peripherals
  - Qualcomm Alpha PLL variants
  - Divider code was using container_of() on bad pointers
  - Allwinner DE2 clks on H3
  - Amlogic minor data fixes and dropping of CLK_IGNORE_UNUSED
  - Mediatek clk driver compile test support
  - AT91 PMC clk suspend/resume restoration support
  - PLL issues fixed on si5351
  - Broadcom IProc PLL calculation updates
  - DVFS support for Armada mvebu CPU clks
  - Allwinner fixed post-divider support
  - TI clkctrl fixes and support for newer SoCs
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "The core framework has a handful of patches this time around, mostly
  due to the clk rate protection support added by Jerome Brunet.

  This feature will allow consumers to lock in a certain rate on the
  output of a clk so that things like audio playback don't hear pops
  when the clk frequency changes due to shared parent clks changing
  rates. Currently the clk API doesn't guarantee the rate of a clk stays
  at the rate you request after clk_set_rate() is called, so this new
  API will allow drivers to express that requirement.

  Beyond this, the core got some debugfs pretty printing patches and a
  couple minor non-critical fixes.

  Looking outside of the core framework diff we have some new driver
  additions and the removal of a legacy TI clk driver. Both of these hit
  high in the dirstat. Also, the removal of the asm-generic/clkdev.h
  file causes small one-liners in all the architecture Kbuild files.

  Overall, the driver diff seems to be the normal stuff that comes all
  the time to fix little problems here and there and to support new
  hardware.

  Summary:

  Core:
   - Clk rate protection
   - Symbolic clk flags in debugfs output
   - Clk registration enabled clks while doing bookkeeping updates

  New Drivers:
   - Spreadtrum SC9860
   - HiSilicon hi3660 stub
   - Qualcomm A53 PLL, SPMI clkdiv, and MSM8916 APCS
   - Amlogic Meson-AXG
   - ASPEED BMC

  Removed Drivers:
   - TI OMAP 3xxx legacy clk (non-DT) support
   - asm*/clkdev.h got removed (not really a driver)

  Updates:
   - Renesas FDP1-0 module clock on R-Car M3-W
   - Renesas LVDS module clock on R-Car V3M
   - Misc fixes to pr_err() prints
   - Qualcomm MSM8916 audio fixes
   - Qualcomm IPQ8074 rounded out support for more peripherals
   - Qualcomm Alpha PLL variants
   - Divider code was using container_of() on bad pointers
   - Allwinner DE2 clks on H3
   - Amlogic minor data fixes and dropping of CLK_IGNORE_UNUSED
   - Mediatek clk driver compile test support
   - AT91 PMC clk suspend/resume restoration support
   - PLL issues fixed on si5351
   - Broadcom IProc PLL calculation updates
   - DVFS support for Armada mvebu CPU clks
   - Allwinner fixed post-divider support
   - TI clkctrl fixes and support for newer SoCs"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (125 commits)
  clk: aspeed: Handle inverse polarity of USB port 1 clock gate
  clk: aspeed: Fix return value check in aspeed_cc_init()
  clk: aspeed: Add reset controller
  clk: aspeed: Register gated clocks
  clk: aspeed: Add platform driver and register PLLs
  clk: aspeed: Register core clocks
  clk: Add clock driver for ASPEED BMC SoCs
  clk: mediatek: adjust dependency of reset.c to avoid unexpectedly being built
  clk: fix reentrancy of clk_enable() on UP systems
  clk: meson-axg: fix potential NULL dereference in axg_clkc_probe()
  clk: Simplify debugfs registration
  clk: Fix debugfs_create_*() usage
  clk: Show symbolic clock flags in debugfs
  clk: renesas: r8a7796: Add FDP clock
  clk: Move __clk_{get,put}() into private clk.h API
  clk: sunxi: Use CLK_IS_CRITICAL flag for critical clks
  clk: Improve flags doc for of_clk_detect_critical()
  arch: Remove clkdev.h asm-generic from Kbuild
  clk: sunxi-ng: a83t: Add M divider to TCON1 clock
  clk: Prepare to remove asm-generic/clkdev.h
  ...
2018-02-01 16:56:07 -08:00
Linus Torvalds
537433b624 ARM: SoC device tree updates for 4.16
We get a moderate number of new machines this time, and only one
 new SoC variant (Actions S700):
 
 Actions:
   S700 Soc and CubieBoard7 development board
   Allo.com Sparky Single-board-computer
 
 Allwinner:
   Orange Pi R1 development board
   Libre Computer Board ALL-H3-CC H3 single-board computer
 
 ASpeed ast2x00:
    Witherspoon: OpenPower Power9 server manufactured by IBM that uses the ASPEED ast2500
    Zaius: OpenPower Power9 server manufactured by Invatech that uses the ASPEED ast2500
    Q71L: Intel Xeon server manufactured by Qanta that uses the ASPEED ast2400
 
 AT91:
   Axentia Nattis/Natte digital signage
   sama5d2 PTC-ek Evaluation board
 
 Freescale/NXP i.MX:
    SolidRun Humminboard2 development board
    Variscite DART-MX6 SoM and Carrier-board
    Technologic TS-4600 and TS-7970 development board
    Toradex Colibri iMX7D SoM board
    v1.5 variant of Solidrun Cubox-i and Hummingboard
 
 Freescale/NXP Layerscape:
    Moxa UC-8410A Series industrial computer
 
 Gemini:
   D-Link DNS-313 NAS enclosure
 
 OMAP:
   LogicPD OMAP35xx SOM-LV devkit
   LogicPD OMAP35xx Torpedo devkit
 
 Renesas:
   r8a77970 (V3M) Starter Kit board
   r8a7795 (M3-W) Salvator-XS board
 
 We finally managed to get the dtc warnings under control, with no more
 build-time warnings for bad device tree files. This includes fixes for
 the majority of platforms, including nomadik, samsung, lpc32xx, STi,
 spear, mediatek, freescale, qcom, realview, keystone, omap, kirkwood,
 renesas, hisilicon, and broadcom.
 
 Files get rearranged on a few platforms, in particular the Marvell
 Armada 7K/8K device tree files are changed in preparation for future
 SoC support, based on more than two of the same chips in one package,
 and some boards get renamed for oxnas for consistency.
 
 Finally, many existing SoCs gain descriptions for additional on-chip
 devices that we can now support with kernel drivers:
 
   Allwinner A83t (drm, ethernet, i2c, ...), H3/H5 (USB-OTG)
   Amlogic AXG family (clk, pinctrl, pwm, ...), and others (vpu, hdmi)
   Aspeed clk controller support
   Freescale LS1088A, LS1021A device support
   Gemini Ethernet, PCI, TVE, panel
   Keystone gpio, qspi, more uarts
   Mediatek cpufreq, regulator, clock, reset
   Marvell thermal, cpufreq, nand
   Renesas SMP, thermal, timer, PWM, sound, phy, ipmmu
   Rockchip Mipi, GPU, display
   Samsung Exynos5433 PMU, power domain, nfc
   Spreadtrum: sc9860 clocks
   Tegra TX2 PSDI, HDMI, I2C,SMMU, display, fuse, ...
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC device tree updates from Arnd Bergmann:
 "We get a moderate number of new machines this time, and only one new
  SoC variant (Actions S700):

  Actions:
   - S700 Soc and CubieBoard7 development board
   - Allo.com Sparky Single-board-computer

  Allwinner:
   - Orange Pi R1 development board
   - Libre Computer Board ALL-H3-CC H3 single-board computer

  ASpeed ast2x00:
   - Witherspoon: OpenPower Power9 server manufactured by IBM that uses the ASPEED ast2500
   - Zaius: OpenPower Power9 server manufactured by Invatech that uses the ASPEED ast2500
   - Q71L: Intel Xeon server manufactured by Qanta that uses the ASPEED ast2400

  AT91:
   - Axentia Nattis/Natte digital signage
   - sama5d2 PTC-ek Evaluation board

  Freescale/NXP i.MX:
   - SolidRun Humminboard2 development board
   - Variscite DART-MX6 SoM and Carrier-board
   - Technologic TS-4600 and TS-7970 development board
   - Toradex Colibri iMX7D SoM board
   - v1.5 variant of Solidrun Cubox-i and Hummingboard

  Freescale/NXP Layerscape:
   - Moxa UC-8410A Series industrial computer

  Gemini:
   - D-Link DNS-313 NAS enclosure

  OMAP:
   - LogicPD OMAP35xx SOM-LV devkit
   - LogicPD OMAP35xx Torpedo devkit

  Renesas:
   - r8a77970 (V3M) Starter Kit board
   - r8a7795 (M3-W) Salvator-XS board

  We finally managed to get the dtc warnings under control, with no more
  build-time warnings for bad device tree files. This includes fixes for
  the majority of platforms, including nomadik, samsung, lpc32xx, STi,
  spear, mediatek, freescale, qcom, realview, keystone, omap, kirkwood,
  renesas, hisilicon, and broadcom.

  Files get rearranged on a few platforms, in particular the Marvell
  Armada 7K/8K device tree files are changed in preparation for future
  SoC support, based on more than two of the same chips in one package,
  and some boards get renamed for oxnas for consistency.

  Finally, many existing SoCs gain descriptions for additional on-chip
  devices that we can now support with kernel drivers:

   - Allwinner A83t (drm, ethernet, i2c, ...), H3/H5 (USB-OTG)
   - Amlogic AXG family (clk, pinctrl, pwm, ...), and others (vpu, hdmi)
   - Aspeed clk controller support
   - Freescale LS1088A, LS1021A device support
   - Gemini Ethernet, PCI, TVE, panel
   - Keystone gpio, qspi, more uarts
   - Mediatek cpufreq, regulator, clock, reset
   - Marvell thermal, cpufreq, nand
   - Renesas SMP, thermal, timer, PWM, sound, phy, ipmmu
   - Rockchip Mipi, GPU, display
   - Samsung Exynos5433 PMU, power domain, nfc
   - Spreadtrum: sc9860 clocks
   - Tegra TX2 PSDI, HDMI, I2C,SMMU, display, fuse, ..."

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (690 commits)
  arm64: dts: stratix10: fix SPI settings
  ARM: dts: socfpga: add i2c reset signals
  arm64: dts: stratix10: add USB ECC reset bit
  arm64: dts: stratix10: enable USB on the devkit
  ARM: dts: socfpga: disable over-current for Arria10 USB devkit
  ARM: dts: Nokia N9: add support for up/down keys in the dts
  ARM: dts: nomadik: add interrupt-parent for clcd
  ARM: dts: Add ethernet to a bunch of platforms
  ARM: dts: Add ethernet to the Gemini SoC
  ARM: dts: rename oxnas dts files
  ARM: dts: s5pv210: add interrupt-parent for ohci
  ARM: lpc3250: fix uda1380 gpio numbers
  ARM: dts: STi: Add gpio polarity for "hdmi,hpd-gpio" property
  ARM: dts: dra7: Reduce shut down temperature of non-cpu thermal zones
  ARM: dts: n900: Add aliases for lcd and tvout displays
  ARM: dts: Update ti-sysc data for existing users
  ARM: dts: Fix smartreflex compatible for omap3 shared mpu-iva instance
  arm64: dts: marvell: armada-80x0: Fix pinctrl compatible string
  arm: spear13xx: Fix spics gpio controller's warning
  arm: spear13xx: Fix dmas cells
  ...
2018-02-01 16:07:54 -08:00
Stephen Boyd
c43a52cfd2 Merge branches 'clk-aspeed', 'clk-lock-UP', 'clk-mediatek' and 'clk-allwinner' into clk-next
* clk-aspeed:
  clk: aspeed: Handle inverse polarity of USB port 1 clock gate
  clk: aspeed: Fix return value check in aspeed_cc_init()
  clk: aspeed: Add reset controller
  clk: aspeed: Register gated clocks
  clk: aspeed: Add platform driver and register PLLs
  clk: aspeed: Register core clocks
  clk: Add clock driver for ASPEED BMC SoCs
  dt-bindings: clock: Add ASPEED constants

* clk-lock-UP:
  clk: fix reentrancy of clk_enable() on UP systems

* clk-mediatek:
  clk: mediatek: adjust dependency of reset.c to avoid unexpectedly being built
  clk: mediatek: Fix all warnings for missing struct clk_onecell_data
  clk: mediatek: fixup test-building of MediaTek clock drivers
  clk: mediatek: group drivers under indpendent menu

* clk-allwinner:
  clk: sunxi-ng: a83t: Add M divider to TCON1 clock
  clk: sunxi-ng: fix the A64/H5 clock description of DE2 CCU
  clk: sunxi-ng: add support for Allwinner H3 DE2 CCU
  dt-bindings: fix the binding of Allwinner DE2 CCU of A83T and H3
  clk: sunxi-ng: sun8i: a83t: Use sigma-delta modulation for audio PLL
  clk: sunxi-ng: sun8i: a83t: Add /2 fixed post divider to audio PLL
  clk: sunxi-ng: Support fixed post-dividers on NM style clocks
  clk: sunxi-ng: sun50i: a64: Add 2x fixed post-divider to MMC module clocks
  clk: sunxi-ng: Support fixed post-dividers on MP style clocks
  clk: sunxi: Use PTR_ERR_OR_ZERO()
2018-01-26 16:43:39 -08:00
Stephen Boyd
4d1d13a5ae Merge branches 'clk-remove-asm-clkdev', 'clk-debugfs-fixes', 'clk-renesas' and 'clk-meson' into clk-next
* clk-remove-asm-clkdev:
  clk: Move __clk_{get,put}() into private clk.h API
  clk: sunxi: Use CLK_IS_CRITICAL flag for critical clks
  arch: Remove clkdev.h asm-generic from Kbuild
  clk: Prepare to remove asm-generic/clkdev.h
  blackfin: Use generic clkdev.h header

* clk-debugfs-fixes:
  clk: Simplify debugfs registration
  clk: Fix debugfs_create_*() usage
  clk: Show symbolic clock flags in debugfs
  clk: Improve flags doc for of_clk_detect_critical()

* clk-renesas:
  clk: renesas: r8a7796: Add FDP clock
  clk: renesas: cpg-mssr: Keep wakeup sources active during system suspend
  clk: renesas: mstp: Keep wakeup sources active during system suspend
  clk: renesas: r8a77970: Add LVDS clock

* clk-meson:
  clk: meson-axg: fix potential NULL dereference in axg_clkc_probe()
  clk: meson-axg: make local symbol axg_gp0_params_table static
  clk: meson-axg: fix return value check in axg_clkc_probe()
  clk: meson: mpll: use 64-bit maths in params_from_rate
  clk: meson-axg: add clock controller drivers
  clk: meson-axg: add clocks dt-bindings required header
  dt-bindings: clock: add compatible variant for the Meson-AXG
  clk: meson: make the spinlock naming more specific
  clk: meson: gxbb: remove IGNORE_UNUSED from mmc clocks
  clk: meson: gxbb: fix wrong clock for SARADC/SANA
2018-01-26 16:43:32 -08:00
Stephen Boyd
0003046477 Merge branches 'clk-iproc', 'clk-mvebu' and 'clk-qcom-a53' into clk-next
* clk-iproc:
  clk: iproc: Minor tidy up of iproc pll data structures
  clk: iproc: Allow plls to do minor rate changes without reset
  clk: iproc: Fix error in the pll post divider rate calculation
  clk: iproc: Allow iproc pll to runtime calculate vco parameters

* clk-mvebu:
  clk: mvebu: armada-37xx-periph: Use PTR_ERR_OR_ZERO()

* clk-qcom-a53:
  clk: qcom: Add APCS clock controller support
  clk: qcom: Add regmap mux-div clocks support
  clk: qcom: Add A53 PLL support
2018-01-26 16:41:58 -08:00
Stephen Boyd
a2c09c12d4 Merge branches 'clk-at91', 'clk-imx7ulp', 'clk-axigen', 'clk-si5351' and 'clk-pxa' into clk-next
* clk-at91:
  clk: at91: pmc: Support backup for programmable clocks
  clk: at91: pmc: Save SCSR during suspend
  clk: at91: pmc: Wait for clocks when resuming

* clk-imx7ulp:
  clk: Don't touch hardware when reparenting during registration

* clk-axigen:
  clk: axi-clkgen: Round closest in round_rate() and recalc_rate()
  clk: axi-clkgen: Correctly handle nocount bit in recalc_rate()

* clk-si5351:
  clk: si5351: _si5351_clkout_reset_pll() can be static
  clk: si5351: Do not enable parent clocks on probe
  clk: si5351: Rename internal plls to avoid name collisions
  clk: si5351: Apply PLL soft reset before enabling the outputs
  clk: si5351: Add DT property to enable PLL reset
  clk: si5351: implement remove handler

* clk-pxa:
  clk: pxa: unbreak lookup of CLK_POUT
2018-01-26 16:41:52 -08:00
Stephen Boyd
21170e3bda Merge branches 'clk-spreadtrum', 'clk-mvebu-dvfs', 'clk-qoriq', 'clk-imx' and 'clk-qcom-ipq8074' into clk-next
* clk-spreadtrum:
  clk: sprd: add clocks support for SC9860
  clk: sprd: Add dt-bindings include file for SC9860
  dt-bindings: Add Spreadtrum clock binding documentation
  clk: sprd: add adjustable pll support
  clk: sprd: add composite clock support
  clk: sprd: add divider clock support
  clk: sprd: add mux clock support
  clk: sprd: add gate clock support
  clk: sprd: Add common infrastructure
  clk: move clock common macros out from vendor directories

* clk-mvebu-dvfs:
  clk: mvebu: armada-37xx-periph: add DVFS support for cpu clocks
  clk: mvebu: armada-37xx-periph: prepare cpu clk to be used with DVFS
  clk: mvebu: armada-37xx-periph: cosmetic changes

* clk-qoriq:
  clk: qoriq: add more divider clocks support

* clk-imx:
  clk: imx51: uart4, uart5 gates only exist on imx50, imx53

* clk-qcom-ipq8074:
  clk: qcom: ipq8074: add misc resets for PCIE and NSS
  dt-bindings: clock: qcom: add misc resets for PCIE and NSS
  clk: qcom: ipq8074: add GP and Crypto clocks
  clk: qcom: ipq8074: add NSS ethernet port clocks
  clk: qcom: ipq8074: add NSS clocks
  clk: qcom: ipq8074: add PCIE, USB and SDCC clocks
  clk: qcom: ipq8074: add remaining PLL’s
  dt-bindings: clock: qcom: add remaining clocks for IPQ8074
  clk: qcom: ipq8074: fix missing GPLL0 divider width
  clk: qcom: add parent map for regmap mux
  clk: qcom: add read-only divider operations
2018-01-26 16:41:47 -08:00
Olof Johansson
ba05173afe Another round of 64-bit DT changes for the new Amlogic SoCs. These
include IR, SPI and ethernet MAC support for the new AXG family SoCs.
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Merge tag 'amlogic-dt64-3' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt

Another round of 64-bit DT changes for the new Amlogic SoCs.  These
include IR, SPI and ethernet MAC support for the new AXG family SoCs.

* tag 'amlogic-dt64-3' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  ARM64: dts: meson-axg: enable ethernet for A113D S400 board
  ARM64: dts: meson-axg: add ethernet mac controller
  ARM64: dts: meson-axg: add the SPICC controller
  ARM64: dts: meson-axg: enable IR controller
  arm64: dts: meson-axg: switch uart_ao clock to CLK81
  clk: meson-axg: add clocks dt-bindings required header
  dt-bindings: clock: add compatible variant for the Meson-AXG

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-01-11 16:50:50 -08:00
Georgi Djakov
0c6ab1b8f8 clk: qcom: Add A53 PLL support
The CPUs on Qualcomm MSM8916-based platforms are clocked by two PLLs,
a primary (A53) CPU PLL and a secondary fixed-rate GPLL0. These sources
are connected to a mux and half-integer divider, which is feeding the
CPU cores.

This patch adds support for the primary CPU PLL which generates the
higher range of frequencies above 1GHz.

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Amit Kucheria <amit.kucheria@linaro.org>
[sboyd@codeaurora.org: Move to devm provider registration,
NUL terminate frequency table, made tristate/modular]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2018-01-02 10:00:24 -08:00
Icenowy Zheng
3525c7c3bd dt-bindings: fix the binding of Allwinner DE2 CCU of A83T and H3
The DE2 CCU is different on A83T and H3 -- the parent of the clocks on
A83T is PLL_DE but on H3 it's the DE module clock. This is not noticed
when I develop the DE2 CCU driver.

Fix the binding by using different compatibles for A83T and H3, adding
notes for the PLL_DE usage on A83T, and change the binding example's
compatible from A83T to H3 (as it specifies the DE module clock).

Fixes: ed74f8a8a6 ("dt-bindings: add binding for the Allwinner DE2 CCU")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2017-12-29 16:10:17 +08:00
Rob Herring
afc3bca4cf dt-bindings: Use lower case hex in unit-addresses
DT unit addresses should be lower case hex. Fix all the
binding examples.

Converted with the following command from Krzysztof Kozlowski:

sed -e 's/@\([a-fA-F0-9_-]*\) {/@\L\1 {/' -i $(find Documentation/devicetree/bindings -name '*.txt')

Signed-off-by: Rob Herring <robh@kernel.org>
2017-12-26 10:37:05 -06:00
Sergej Sawazki
51279ef9f6 clk: si5351: Add DT property to enable PLL reset
Add optional output clock DT property to enable PLL reset when a clock
output is enabled.

Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Rabeeh Khoury <rabeeh@solid-run.com>
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Sergej Sawazki <sergej@taudac.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-12-21 18:09:18 -08:00
Yuantian Tang
36ab046715 clk: qoriq: add more divider clocks support
More divider clocks are needed by IP. So enlarge the PLL divider
array to accommodate more divider clocks.

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-12-21 15:57:28 -08:00
Chunyan Zhang
96e9dd55eb dt-bindings: Add Spreadtrum clock binding documentation
Introduce a new binding with its documentation for Spreadtrum clock
sub-framework.

Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-12-21 15:00:53 -08:00
Yixun Lan
f8d0dfed51 dt-bindings: clock: add compatible variant for the Meson-AXG
Update the documentation to support clock driver for the Amlogic's
Meson-AXG SoC.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2017-12-14 10:14:12 +01:00
Stephen Boyd
a1b71a3083 Merge branch 'clk-hi3660-stub' into clk-next
* clk-hi3660-stub:
  clk: hisilicon: Add support for Hi3660 stub clocks
  dt-bindings: clk: Hi3660: Document stub clock
2017-12-06 23:06:22 -08:00
Leo Yan
a4a124c349 dt-bindings: clk: Hi3660: Document stub clock
Document the DT binding for stub clock which is used for CPU,
GPU and DDR frequency scaling.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-12-06 22:54:37 -08:00
Tirupathi Reddy
e3447a67c9 dt-bindings: Add qcom spmi_pmic clock divider bindings
This patch adds device tree bindings for Qualcomm SPMI PMIC
clock divider module.

Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
[sboyd: Moved file to match compatible of binding]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-12-06 22:29:48 -08:00
Mathieu Malaterre
4c9847b737 dt-bindings: Remove leading 0x from bindings notation
Improve the binding example by removing all the leading 0x to fix the
following dtc warnings:

Warning (unit_address_format): Node /XXX unit name should not have leading "0x"

Converted using the following command:

find Documentation/devicetree/bindings -name "*.txt" -exec sed -i -e 's/([^ ])\@0x([0-9a-f])/$1\@$2/g' {} +

This is a follow up to commit 48c926cd34

Signed-off-by: Mathieu Malaterre <malat@debian.org>
Signed-off-by: Rob Herring <robh@kernel.org>
2017-12-06 14:56:33 -06:00
Linus Torvalds
fc35c1966e We have two changes to the core framework this time around. The first being a
large change that introduces runtime PM support to the clk framework. Now we
 properly call runtime PM operations on the device providing a clk when the clk
 is in use. This helps on SoCs where the clks provided by a device need
 something to be powered on before using the clks, like power domains or
 regulators. It also helps power those things down when clks aren't in use. The
 other core change is a devm API addition for clk providers so we can get rid of
 a bunch of clk driver remove functions that are just doing
 of_clk_del_provider().
 
 Outside of the core, we have the usual addition of clk drivers and smattering
 of non-critical fixes to existing drivers. The biggest diff is support for
 Mediatek MT2712 and MT7622 SoCs, but those patches really just add a bunch
 of data.
 
 By the way, we're trying something new here where we build the tree up with
 topic branches. We plan to work this into our workflow so that we don't step
 on each other's toes, and so the fixes branch can be merged on an as-needed
 basis.
 
 Core:
  - Runtime PM support for clk providers
  - devm API for of_clk_add_hw_provider()
 
 New Drivers:
  - Mediatek MT2712 and MT7622
  - Renesas R-Car V3M SoC
 
 Updates:
  - Runtime PM support for Samsung exynos5433/exynos4412 providers
  - Removal of clkdev aliases on Samsung SoCs
  - Convert clk-gpio to use gpio descriptors
  - Various driver cleanups to match kernel coding style
  - Amlogic Video Processing Unit VPU and VAPB clks
  - Sigma-delta modulation for Allwinner audio PLLs
  - Allwinner A83t Display clks
  - Support for the second display unit clock on Renesas RZ/G1E
  - Suspend/resume support for Renesas R-Car Gen3 CPG/MSSR
  - New clock ids for Rockchip rk3188 and rk3368 SoCs
  - Various 'const' markings on clk_ops structures
  - RPM clk support on Qualcomm MSM8996/MSM8660 SoCs
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "We have two changes to the core framework this time around.

  The first being a large change that introduces runtime PM support to
  the clk framework. Now we properly call runtime PM operations on the
  device providing a clk when the clk is in use. This helps on SoCs
  where the clks provided by a device need something to be powered on
  before using the clks, like power domains or regulators. It also helps
  power those things down when clks aren't in use.

  The other core change is a devm API addition for clk providers so we
  can get rid of a bunch of clk driver remove functions that are just
  doing of_clk_del_provider().

  Outside of the core, we have the usual addition of clk drivers and
  smattering of non-critical fixes to existing drivers. The biggest diff
  is support for Mediatek MT2712 and MT7622 SoCs, but those patches
  really just add a bunch of data.

  By the way, we're trying something new here where we build the tree up
  with topic branches. We plan to work this into our workflow so that we
  don't step on each other's toes, and so the fixes branch can be merged
  on an as-needed basis.

  Summary:

  Core:
   - runtime PM support for clk providers
   - devm API for of_clk_add_hw_provider()

  New Drivers:
   - Mediatek MT2712 and MT7622
   - Renesas R-Car V3M SoC

  Updates:
   - runtime PM support for Samsung exynos5433/exynos4412 providers
   - removal of clkdev aliases on Samsung SoCs
   - convert clk-gpio to use gpio descriptors
   - various driver cleanups to match kernel coding style
   - Amlogic Video Processing Unit VPU and VAPB clks
   - sigma-delta modulation for Allwinner audio PLLs
   - Allwinner A83t Display clks
   - support for the second display unit clock on Renesas RZ/G1E
   - suspend/resume support for Renesas R-Car Gen3 CPG/MSSR
   - new clock ids for Rockchip rk3188 and rk3368 SoCs
   - various 'const' markings on clk_ops structures
   - RPM clk support on Qualcomm MSM8996/MSM8660 SoCs"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (137 commits)
  clk: stm32h7: fix test of clock config
  clk: pxa: fix building on older compilers
  clk: sunxi-ng: a83t: Fix i2c buses bits
  clk: ti: dra7-atl-clock: fix child-node lookups
  clk: qcom: common: fix legacy board-clock registration
  clk: uniphier: fix DAPLL2 clock rate of Pro5
  clk: uniphier: fix parent of miodmac clock data
  clk: hi3798cv200: correct parent mux clock for 'clk_sdio0_ciu'
  clk: hisilicon: Delete an error message for a failed memory allocation in hisi_register_clkgate_sep()
  clk: hi3660: fix incorrect uart3 clock freqency
  clk: kona-setup: Delete error messages for failed memory allocations
  ARC: clk: fix spelling mistake: "configurarion" -> "configuration"
  clk: cdce925: remove redundant check for non-null parent_name
  clk: versatile: Improve sizeof() usage
  clk: versatile: Delete error messages for failed memory allocations
  clk: ux500: Improve sizeof() usage
  clk: ux500: Delete error messages for failed memory allocations
  clk: spear: Delete error messages for failed memory allocations
  clk: ti: Delete error messages for failed memory allocations
  clk: mmp: Adjust checks for NULL pointers
  ...
2017-11-17 20:04:24 -08:00
Linus Torvalds
527d147074 ARM: Device-tree updates for 4.15
We add device tree files for a couple of additional SoCs in various areas:
 
 Allwinner R40/V40 for entertainment, Broadcom Hurricane 2 for networking,
 Amlogic A113D for audio, and Renesas R-Car V3M for automotive.
 
 As usual, lots of new boards get added based on those and other SoCs:
 
  - Actions S500 based CubieBoard6 single-board computer
 
  - Amlogic Meson-AXG A113D based development board
  - Amlogic S912 based Khadas VIM2 single-board computer
  - Amlogic S912 based Tronsmart Vega S96 set-top-box
 
  - Allwinner H5 based NanoPi NEO Plus2 single-board computer
  - Allwinner R40 based Banana Pi M2 Ultra and Berry single-board computers
  - Allwinner A83T based TBS A711 Tablet
 
  - Broadcom Hurricane 2 based Ubiquiti UniFi Switch 8
  - Broadcom bcm47xx based Luxul XAP-1440/XAP-810/ABR-4500/XBR-4500
      wireless access points and routers
 
  - NXP i.MX51 based Zodiac Inflight Innovations RDU1 board
  - NXP i.MX53 based GE Healthcare PPD biometric monitor
  - NXP i.MX6 based Pistachio single-board computer
  - NXP i.MX6 based Vining-2000 automotive diagnostic interface
  - NXP i.MX6 based Ka-Ro TX6 Computer-on-Module in additional variants
 
  - Qualcomm MSM8974 (Snapdragon 800) based Fairphone 2 phone
  - Qualcomm MSM8974pro (Snapdragon 801) based Sony Xperia Z2 Tablet
 
  - Realtek RTD1295 based set-top-boxes MeLE V9 and PROBOX2 AVA
 
  - Renesas R-Car V3M (R8A77970) SoC and "Eagle" reference board
  - Renesas H3ULCB and M3ULCB "Kingfisher" extension infotainment boards
  - Renasas r8a7745 based iWave G22D-SODIMM SoM
 
  - Rockchip rk3288 based Amarula Vyasa single-board computer
 
  - Samsung Exynos5800 based Odroid HC1 single-board computer
 
 For existing SoC support, there was a lot of ongoing work, as usual
 most of that concentrated on the Renesas, Rockchip, OMAP, i.MX, Amlogic
 and Allwinner platforms, but others were also active.
 
 Rob Herring and many others worked on reducing the number of issues that
 the latest version of 'dtc' now warns about. Unfortunately there is still
 a lot left to do.
 
 A rework of the ARM foundation model introduced several new files
 for common variations of the model.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM device-tree updates from Arnd Bergmann:
 "We add device tree files for a couple of additional SoCs in various
  areas:

  Allwinner R40/V40 for entertainment, Broadcom Hurricane 2 for
  networking, Amlogic A113D for audio, and Renesas R-Car V3M for
  automotive.

  As usual, lots of new boards get added based on those and other SoCs:

   - Actions S500 based CubieBoard6 single-board computer

   - Amlogic Meson-AXG A113D based development board
   - Amlogic S912 based Khadas VIM2 single-board computer
   - Amlogic S912 based Tronsmart Vega S96 set-top-box

   - Allwinner H5 based NanoPi NEO Plus2 single-board computer
   - Allwinner R40 based Banana Pi M2 Ultra and Berry single-board computers
   - Allwinner A83T based TBS A711 Tablet

   - Broadcom Hurricane 2 based Ubiquiti UniFi Switch 8
   - Broadcom bcm47xx based Luxul XAP-1440/XAP-810/ABR-4500/XBR-4500
     wireless access points and routers

   - NXP i.MX51 based Zodiac Inflight Innovations RDU1 board
   - NXP i.MX53 based GE Healthcare PPD biometric monitor
   - NXP i.MX6 based Pistachio single-board computer
   - NXP i.MX6 based Vining-2000 automotive diagnostic interface
   - NXP i.MX6 based Ka-Ro TX6 Computer-on-Module in additional variants

   - Qualcomm MSM8974 (Snapdragon 800) based Fairphone 2 phone
   - Qualcomm MSM8974pro (Snapdragon 801) based Sony Xperia Z2 Tablet

   - Realtek RTD1295 based set-top-boxes MeLE V9 and PROBOX2 AVA

   - Renesas R-Car V3M (R8A77970) SoC and "Eagle" reference board
   - Renesas H3ULCB and M3ULCB "Kingfisher" extension infotainment boards
   - Renasas r8a7745 based iWave G22D-SODIMM SoM

   - Rockchip rk3288 based Amarula Vyasa single-board computer

   - Samsung Exynos5800 based Odroid HC1 single-board computer

  For existing SoC support, there was a lot of ongoing work, as usual
  most of that concentrated on the Renesas, Rockchip, OMAP, i.MX,
  Amlogic and Allwinner platforms, but others were also active.

  Rob Herring and many others worked on reducing the number of issues
  that the latest version of 'dtc' now warns about. Unfortunately there
  is still a lot left to do.

  A rework of the ARM foundation model introduced several new files for
  common variations of the model"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (599 commits)
  arm64: dts: uniphier: route on-board device IRQ to GPIO controller for PXs3
  dt-bindings: bus: Add documentation for the Technologic Systems NBUS
  arm64: dts: actions: s900-bubblegum-96: Add fake uart5 clock
  ARM: dts: owl-s500: Add CubieBoard6
  dt-bindings: arm: actions: Add CubieBoard6
  ARM: dts: owl-s500-guitar-bb-rev-b: Add fake uart3 clock
  ARM: dts: owl-s500: Set power domains for CPU2 and CPU3
  arm: dts: mt7623: remove unused compatible string for pio node
  arm: dts: mt7623: update usb related nodes
  arm: dts: mt7623: update crypto node
  ARM: dts: sun8i: a711: Enable USB OTG
  ARM: dts: sun8i: a711: Add regulator support
  ARM: dts: sun8i: a83t: bananapi-m3: Enable AP6212 WiFi on mmc1
  ARM: dts: sun8i: a83t: cubietruck-plus: Enable AP6330 WiFi on mmc1
  ARM: dts: sun8i: a83t: Move mmc1 pinctrl setting to dtsi file
  ARM: dts: sun8i: a83t: allwinner-h8homlet-v2: Add AXP818 regulator nodes
  ARM: dts: sun8i: a83t: bananapi-m3: Add AXP813 regulator nodes
  ARM: dts: sun8i: a83t: cubietruck-plus: Add AXP818 regulator nodes
  ARM: dts: sunxi: Add dtsi for AXP81x PMIC
  arm64: dts: allwinner: H5: Restore EMAC changes
  ...
2017-11-16 15:48:26 -08:00
Linus Torvalds
37cb8e1f8e DeviceTree for 4.15:
- kbuild cleanups and improvements for dtbs
 
 - Code clean-up of overlay code and fixing for some long standing memory
   leak and race condition in applying overlays
 
 - Improvements to DT memory usage making sysfs/kobjects optional and
   skipping unflattening of disabled nodes. This is part of kernel
   tinification efforts.
 
 - Final piece of removing storing the full path for every DT node. The
   prerequisite conversion of printk's to use device_node format
   specifier happened in 4.14.
 
 - Sync with current upstream dtc. This brings additional checks to dtb
   compiling.
 
 - Binding doc tree wide removal of leading 0s from examples
 
 - RTC binding documentation adding missing devices and some
   consolidation of duplicated bindings
 
 - Vendor prefix documentation for nutsboard, Silicon Storage Technology,
   shimafuji, Tecon Microprocessor Technologies, DH electronics GmbH,
   Opal Kelly, and Next Thing
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Merge tag 'devicetree-for-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull DeviceTree updates from Rob Herring:
 "A bigger diffstat than usual with the kbuild changes and a tree wide
  fix in the binding documentation.

  Summary:

   - kbuild cleanups and improvements for dtbs

   - Code clean-up of overlay code and fixing for some long standing
     memory leak and race condition in applying overlays

   - Improvements to DT memory usage making sysfs/kobjects optional and
     skipping unflattening of disabled nodes. This is part of kernel
     tinification efforts.

   - Final piece of removing storing the full path for every DT node.
     The prerequisite conversion of printk's to use device_node format
     specifier happened in 4.14.

   - Sync with current upstream dtc. This brings additional checks to
     dtb compiling.

   - Binding doc tree wide removal of leading 0s from examples

   - RTC binding documentation adding missing devices and some
     consolidation of duplicated bindings

   - Vendor prefix documentation for nutsboard, Silicon Storage
     Technology, shimafuji, Tecon Microprocessor Technologies, DH
     electronics GmbH, Opal Kelly, and Next Thing"

* tag 'devicetree-for-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (55 commits)
  dt-bindings: usb: add #phy-cells to usb-nop-xceiv
  dt-bindings: Remove leading zeros from bindings notation
  kbuild: handle dtb-y and CONFIG_OF_ALL_DTBS natively in Makefile.lib
  MIPS: dts: remove bogus bcm96358nb4ser.dtb from dtb-y entry
  kbuild: clean up *.dtb and *.dtb.S patterns from top-level Makefile
  .gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore
  .gitignore: sort normal pattern rules alphabetically
  dt-bindings: add vendor prefix for Next Thing Co.
  scripts/dtc: Update to upstream version v1.4.5-6-gc1e55a5513e9
  of: dynamic: fix memory leak related to properties of __of_node_dup
  of: overlay: make pr_err() string unique
  of: overlay: pr_err from return NOTIFY_OK to overlay apply/remove
  of: overlay: remove unneeded check for NULL kbasename()
  of: overlay: remove a dependency on device node full_name
  of: overlay: simplify applying symbols from an overlay
  of: overlay: avoid race condition between applying multiple overlays
  of: overlay: loosen overly strict phandle clash check
  of: overlay: expand check of whether overlay changeset can be removed
  of: overlay: detect cases where device tree may become corrupt
  of: overlay: minor restructuring
  ...
2017-11-14 18:25:40 -08:00
Stephen Boyd
8f62040086 Merge branch 'clk-qcom' into clk-next
* clk-qcom:
  clk: qcom: clk-smd-rpm: add msm8996 rpmclks
  clk: qcom: Implement RPM clocks for MSM8660/APQ8060
  clk: qcom: Update DT bindings for the MSM8660/APQ8060 RPMCC
  clk: qcom: Elaborate on "active" clocks in the RPM clock bindings
  clk: qcom: Remove unused RCG ops
2017-11-14 10:07:42 -08:00
Marco Franchi
48c926cd34 dt-bindings: Remove leading zeros from bindings notation
Improve the binding example by removing all the leading zeros to fix the
following dtc warnings:

Warning (unit_address_format): Node /XXX unit name should not have leading 0s

Converted using the following command:

perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find ./Documentation/devicetree/bindings "*.txt"`

Some unnecessary changes were manually fixed.

Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2017-11-09 17:05:05 -06:00
Rajendra Nayak
7066fdd0d7 clk: qcom: clk-smd-rpm: add msm8996 rpmclks
Add all RPM controlled clocks on msm8996 platform

[srini: Fixed various issues with offsets and made names specific to msm8996]
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-11-02 00:08:12 -07:00
Linus Walleij
856e6bb91e clk: qcom: Update DT bindings for the MSM8660/APQ8060 RPMCC
These compatible strings need to be added to extend support
for the RPM CC to cover MSM8660/APQ8060. We also need to add
enumberators to the include file for a few clocks that were
missing.

Cc: devicetree@vger.kernel.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-11-01 23:47:27 -07:00