Commit Graph

3950 Commits

Author SHA1 Message Date
Stephen Boyd
949bdfed4b Allwinner clock fixes for 4.12
Some fixes that fix some bindings that went in 4.12, fix a few reset and
 clock offsets and a build error fix
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJZQYutAAoJEBx+YmzsjxAglWMQALkuMBskgMNE78L9M3kgNoOs
 e44VWQLI0K0fOHyrnG1Y8wGy8pzTFXVhk13M8eJM9ELeVwN2hnwplcwooxt/I/Og
 9B95qjDFSD4yTsE0SdcyT2KB6NXX6qrh/Wv5Q4ixi1vr09DGZ52jdbug+h0fLZxM
 e1akTgv6oIQRdr1S4WykxnDDhNvooNV9Qgn4zKObwP2euTuRlllhPt+dj8rvgJzh
 z23m6b296MbYh0hb2t0uqocQwkyOVHa9rtdCTVJFPaOeb+kjxl5NuFZzG/hrBRUm
 +LbXwy0acst5SAdDDPGEYTnxyREB+vVYKF22i2+jSf3vTxRWZrZQkPlSs+0LtMLZ
 LtLPUIdwFWdps/kY1IFjt0UeBw6mnv3LCv1dSciazRZDKexvzrWaNEZ942oS0Iqw
 N7tltUEf4UJFZsgCY+yY+C4WL0QXsWtmVKFJDYtr2/yhgC1SpDNZP20DomwVMZ6G
 i7SP+5uyCf7TNRXvckTfz3q0747f1V0yD9a0vR/cR5+TCmKChLIUava95/07qvy8
 +AbSz9g2n7sKZTn+z3UUDuln9XTXGcy29SXigSXneeiFV1tjHUssZueLPvb/4EA9
 LlNMr2JWG7Ois6H655512K6fvMUlqNvWpbdfnB45raPLU7AGa1xc95QXo7fMcfo/
 6wxUN+7nhPDO8AXZmc7w
 =G33o
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-clk-fixes-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-fixes

Allwinner clock fixes for 4.12

Some fixes that fix some bindings that went in 4.12, fix a few reset and
clock offsets and a build error fix

* tag 'sunxi-clk-fixes-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  clk: sunxi-ng: a64: Export PLL_PERIPH0 clock for the PRCM
  clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCM
  dt-bindings: clock: sunxi-ccu: Add pll-periph to PRCM's needed clocks
  clk: sunxi-ng: enable SUNXI_CCU_MP for PRCM
  clk: sunxi-ng: v3s: Fix usb otg device reset bit
  clk: sunxi-ng: a31: Correct lcd1-ch1 clock register offset
2017-06-14 16:48:03 -07:00
Chen-Yu Tsai
d85da227c3 clk: sunxi-ng: a64: Export PLL_PERIPH0 clock for the PRCM
The PRCM takes PLL_PERIPH0 as one of its parents for the AR100 clock.
As such we need to be able to describe this relationship in the device
tree.

Export the PLL_PERIPH0 clock so we can reference it in the PRCM node.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-05-31 21:57:30 +02:00
Chen-Yu Tsai
c4be8c68e6 clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCM
The PRCM takes PLL_PERIPH0 as one of its parents for the AR100 clock.
As such we need to be able to describe this relationship in the device
tree.

Export the PLL_PERIPH0 clock so we can reference it in the PRCM node.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-05-31 21:57:27 +02:00
Michael Turquette
658a756803 KConfig fix:
- clk: meson: gxbb: fix build error without RESET_CONTROLLER
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZGsEiAAoJEHfc29rIyEnRjMYQAJG5/2wpDovPFB/pkLuX/qfu
 pP6f95ArEBPSTeOuTNCERQP997Nn8Bll6Hg2HK1rv2RxyPwjefTt44v/qCB8V03C
 TjhMLu1noagy53vNtg3531Aum2j0dDgG7lg2YLYYohgPYYzV5MX1b4EIS4vGRctc
 YW2n4gjEOCNnJ42YKQG4FwBGI29FK18wpnrlYVpjxH9I3HFUcMSN6421Y1VQuOpC
 nn1OAeFD6tpuBICbcFt0Zh1jJu8wsqAMEj/6jeQio2XlZbjkiRzMOC4qtnjdYhi4
 7rl7MUueFjyeB/Z4r2emNl9DSQkllJoo9M2dx7WYw4cj88FBnR7cg3LMgujsU5j1
 AidU4pMVAFaHQ7kAfkrH/rwkSwlM1G0FkIObNNXrsn+L5yxAdLWBfbHdWcYsb9iQ
 T3UhGkIYSRoQRFLju+ULHT6mqJKvjMnBsRLnaOp4MAEh/FWu7uecEJkmkJDvxfLE
 VQVVXP7MR50YgZAvp+w0P6TVEbzV2qyZq9qRgtWhKYF8dgSFqhZqj6mkeDY9sZ1n
 /o4UIvVf8GlSq1dXu/UZwlc/P1JO0eq7Iiq5blsf6gV3HiK2GDr2/Vi5Rmj/kQSk
 LlZGHxo9slfj+as+8a6VnKn11p8WRI4m0x/rLanPwuqTtq8Mo8fo50Nj6u+V3rQ0
 05MGiG1nye5er6LWG8Zd
 =mBNg
 -----END PGP SIGNATURE-----

Merge tag 'meson-clk-fixes-for-4.12-rc2' of git://github.com/baylibre/clk-meson into clk-fixes

KConfig fix:
- clk: meson: gxbb: fix build error without RESET_CONTROLLER
2017-05-25 14:11:11 -07:00
Boris Brezillon
370d919271 clk: sunxi-ng: sun5i: Fix ahb_bist_clk definition
AHB BIST gate is actually controlled with bit 7.

This bug was detected while trying to use the NAND controller which is
using the DMA engine to transfer data to the NAND.
Since the ahb_bist_clk gate bit conflicts with the ahb_dma_clk gate bit,
the core was disabling the DMA engine clock as part of its 'disable
unused clks' procedure, which was causing all DMA transfers to fail after
this point.

Fixes: 5e73761786 ("clk: sunxi-ng: Add sun5i CCU driver")
Cc: stable@vger.kernel.org
Reported-by: Angus Ainslie <angus@akkea.ca>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Angus Ainslie <angus@akkea.ca>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1495643669-28221-1-git-send-email-boris.brezillon@free-electrons.com
2017-05-25 14:04:19 -07:00
Arnd Bergmann
f36afd38c5 clk: sunxi-ng: enable SUNXI_CCU_MP for PRCM
The newly added PRCM CCU driver uses SUNXI_CCU_MP_WITH_MUX_GATE, which causes
a link error when no other driver enables SUNXI_CCU_MP:

drivers/clk/built-in.o:(.data+0x5c8c8): undefined reference to `ccu_mp_ops'

This adds an explicit 'select' statement for it.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-05-18 08:49:18 +02:00
Tobias Regnery
dbed87a9d3 clk: meson: gxbb: fix build error without RESET_CONTROLLER
With CONFIG_RESET_CONTROLLER=n we see the following link error in the
meson gxbb clk driver:

drivers/built-in.o: In function 'gxbb_aoclkc_probe':
drivers/clk/meson/gxbb-aoclk.c:161: undefined reference to 'devm_reset_controller_register'

Fix this by selecting the reset controller subsystem.

Fixes: f8c11f7991 ("clk: meson: Add GXBB AO Clock and Reset controller driver")
Signed-off-by: Tobias Regnery <tobias.regnery@gmail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
[narmstrong: Added fixes-by tag]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-05-16 11:05:01 +02:00
Yong Deng
7ffc781ec4 clk: sunxi-ng: v3s: Fix usb otg device reset bit
V3S's usb otg device reset bit should be 24, not 23.

Cc: stable@vger.kernel.org
Signed-off-by: Yong Deng <iemdey@gmail.com>
Reviewed-By: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-05-14 08:27:17 +02:00
Chen-Yu Tsai
38b8f82386 clk: sunxi-ng: a31: Correct lcd1-ch1 clock register offset
The register offset for the lcd1-ch1 clock was incorrectly pointing to
the lcd0-ch1 clock. This resulted in the lcd0-ch1 clock being disabled
when the clk core disables unused clocks. This then stops the simplefb
HDMI output path.

Reported-by: Bob Ham <rah@settrans.net>
Fixes: c6e6c96d8f ("clk: sunxi-ng: Add A31/A31s clocks")
Cc: stable@vger.kernel.org # 4.9.x-
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-05-14 08:27:17 +02:00
Linus Torvalds
b5a53b61a2 Sort of on the quieter side this time, which is probably due more
to me not catching up as quickly on patch review than anything else.
 Overall it seems normal though, a few small changes to the core, mostly
 small non-critical fixes here and there as well as driver updates for new
 and existing hardware support. The biggest things are the TI clk driver
 rework to lay the groundwork for clkctrl support in the next merge window
 and the AmLogic audio/graphics clk support.
 
 Core:
  * clk_possible_parents debugfs file so we know which parents a clk
    could possibly have
  * Fix to make clk rate change notifiers stop on the first failure instead
    of continuing
 
 New Drivers:
  * Mediatek MT6797 SoCs
  * hi655x PMIC clks
  * AmLogic Meson SoC i2s and spdif audio clks and Mali graphics clks
  * Allwinner H5 SoCs and PRCM hardware
 
 Updates:
  * Nvidia Tegra T210 cleanups and non-critical fixes
  * TI OMAP cleanups in preparation for clkctrl support
  * Trivial fixes like kcalloc(), devm_* conversions, and seq_puts()
  * ZTE zx296718 SoC VGA clks
  * Rockchip clk-ids, fixups, and rename of rk1108 to rv1108
  * Support for IDT VersaClock 5P49V5935
  * Renesas R-Car H3 and M3-W IMR clks and ES2.0 rev of R-Car H3 support
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.22 (GNU/Linux)
 
 iQIcBAABCAAGBQJZE0YJAAoJEK0CiJfG5JUl9tEQAKVJx8VztYGt1REoFMtEEHmO
 azhxT/uYGgdOMAr9a3mQxqfm5cJbjnb1EZj2RfC1XHs31BF66j40y9+5d8hY8Hzu
 5IkY86s77TlqxGLwQcAsU75Q9cFrEW9X0KJ6OSzlrcc5hKlAEk/Z5lBKoQAm3mlU
 JqD4DSyFqP0X3YSxV5R7yfarb/X3ekCiQ13EDrPRRhyvHUi6ReUJDDgbPHtA+O2c
 ftLAARmxjzitzyvdXokXudkfNm8F5KePK+QkVikf6D/q+kx1D0BNJwZIjhpoiksn
 z6LImLQ8l91AWghmqqpOFXolxQncPU+bJIL9Pox76p5b3EzbQuthIafiso8KsDST
 4g3mHm42Yfx9uoF+U+pR8IeZfj5yQT91bvf8naPz/ngWMAlLP1IKJUvJN6jeTiwe
 cO6GIec1OH40Xl7v/9EafMwDcnFG0cwQmzr/M6wi1dUlmbSygP9NOMTHlr6W/0wa
 K2hCD6b5UHEgHmdfiJbZ2tKxLO0e8LABW+AU8fQH5S2eNe14vY0GvCzfAq5MArIz
 QRpso/kdtGpTpwMEvV6PUmJ0IxYEjtNJVjGJYbORwios0SK0Xl6bJWf7gwn5crB6
 nua9tVZtJEOHJS7S+ESp3VvuXj2/UGPoRRf5OsERo1S6ydGUQH+wDi1SJMdo/vtX
 bIPzIw6WPxMp24JyKOhh
 =/5a/
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "Sort of on the quieter side this time, which is probably due more to
  me not catching up as quickly on patch review than anything else.
  Overall it seems normal though, a few small changes to the core,
  mostly small non-critical fixes here and there as well as driver
  updates for new and existing hardware support.

  The biggest things are the TI clk driver rework to lay the groundwork
  for clkctrl support in the next merge window and the AmLogic
  audio/graphics clk support.

  Core:
   - clk_possible_parents debugfs file so we know which parents a clk
     could possibly have
   - Fix to make clk rate change notifiers stop on the first failure
     instead of continuing

  New Drivers:
   - Mediatek MT6797 SoCs
   - hi655x PMIC clks
   - AmLogic Meson SoC i2s and spdif audio clks and Mali graphics clks
   - Allwinner H5 SoCs and PRCM hardware

  Updates:
   - Nvidia Tegra T210 cleanups and non-critical fixes
   - TI OMAP cleanups in preparation for clkctrl support
   - trivial fixes like kcalloc(), devm_* conversions, and seq_puts()
   - ZTE zx296718 SoC VGA clks
   - Rockchip clk-ids, fixups, and rename of rk1108 to rv1108
   - IDT VersaClock 5P49V5935 support
   - Renesas R-Car H3 and M3-W IMR clks and ES2.0 rev of R-Car H3
     support"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (151 commits)
  clk: x86: pmc-atom: Checking for IS_ERR() instead of NULL
  clk: ti: divider: try to fix ti_clk_register_divider
  clk: mvebu: Use kcalloc() in two functions
  clk: mvebu: Use kcalloc() in of_cpu_clk_setup()
  clk: nomadik: Delete error messages for a failed memory allocation in two functions
  clk: nomadik: Use seq_puts() in nomadik_src_clk_show()
  clk: Improve a size determination in two functions
  clk: Replace four seq_printf() calls by seq_putc()
  clk: si5351: Delete an error message for a failed memory allocation in si5351_i2c_probe()
  clk: si5351: Use devm_kcalloc() in si5351_i2c_probe()
  clk: at91: Use kcalloc() in of_at91_clk_pll_get_characteristics()
  reset: mediatek: Add MT2701 ethsys reset controller include file
  clk: mediatek: add mt2701 ethernet reset
  clk: hi6220: Add the hi655x's pmic clock
  clk: ti: fix building without legacy omap3
  clk: ti: fix linker error with !SOC_OMAP4
  clk: hi3620: Fix a typo in one variable name
  clk: hi3620: Delete error messages for a failed memory allocation in two functions
  clk: hi3620: Use kcalloc() in hi3620_mmc_clk_init()
  clk: hisilicon: Delete error messages for failed memory allocations in hisi_clk_init()
  ...
2017-05-10 13:38:18 -07:00
Linus Torvalds
c6778ff813 ARM: 64-bit DT updates
Device-tree updates for arm64 platforms. Just as with 32-bit, a bunch of smaller
 changes, but also some new platforms that are worth mentioning:
 
  * Rockchip RK3399 platforms for Chromebooks, including Samsung Chromebook
    Plus (Kevin)
  * Orange Pi PC2 (Allwinner H5)
  * Freescale LS2088A and LS1088A SoCs
  * Expanded support for Nvidia Tegra186 (and Jetson TX2)
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZEA5TAAoJEIwa5zzehBx3uPwP/3NBPKvsDQha/x+PPgtSM1cM
 pUEF1fxsLftrt+pUeRgMZqGE2xu5vVUKEQsr7KDdWMS9LMs50Pp9dTvfxr7A4Asm
 WRRMR7Y3gPbr49uf4+JLLmn0hYXTeaoUftVneBj0qU9Flwe3mQDVULiRjPalWYVB
 g0+NwkPE2lrqrudceA2HiVEXqNlVXCIh2mdMaC7Luo0VEsz7nRHT0TOGPaxnXB3M
 NoJ56FPHtv3x9+C56B5CLJ/+Ya8SLgfqVwwoK8FgoqDzEF3nbhf/WCUyph+gHdP3
 D+jMk7t0tvIW8Ne4TGXenoxBznZxgh5ObpLlKBKPCGJkKxpfuq9koH33MmY/WoUN
 7uh3F3HI2sGr7tY/xaN8H7a9A4mHzipj8nqaAsjAJppIpioecGCFVtkY5q0jfxLC
 aAc1o4zoimdPs9q9mu/qhgKNxWkoTYnwvtWHuwqEOggvSb1ulS1SPS24VkKrc4LI
 XMGbA4mQOuFwZyG4FVfvWzbnhsHzDh4cgHaVGra6z5zoX1MUrvieCWEji+Ul1VWa
 lUJ2sTilvSGkwjGcMUSki5p9GcU8dPXwqKiZqDuGx6Ps4aQsw0vz286BnBeVsusG
 qLRH4nkqbF9xCEz9h71mcU6WMu17EsG9zMoCg5K4EZ+RIG3cgWq0dMWW1LqtRn7S
 2YqayY3+UEyMPN146R1V
 =q3Ix
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM 64-bit DT updates from Olof Johansson:
 "Device-tree updates for arm64 platforms. Just as with 32-bit, a bunch
  of smaller changes, but also some new platforms that are worth
  mentioning:

   - Rockchip RK3399 platforms for Chromebooks, including Samsung
     Chromebook Plus (Kevin)

   - Orange Pi PC2 (Allwinner H5)

   - Freescale LS2088A and LS1088A SoCs

   - Expanded support for Nvidia Tegra186 (and Jetson TX2)"

* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (180 commits)
  arm64: dts: Add basic DT to support Spreadtrum's SP9860G
  arm64: dts: exynos: Use - instead of @ for DT OPP entries
  arm64: dts: exynos: Add support for s6e3hf2 panel device on TM2e board
  arm64: dts: juno: add information about L1 and L2 caches
  arm64: dts: juno: fix few unit address format warnings
  arm64: marvell: dts: enable the crypto engine on the Armada 8040 DB
  arm64: marvell: dts: enable the crypto engine on the Armada 7040 DB
  arm64: marvell: dts: add crypto engine description for 7k/8k
  arm64: dts: marvell: add sdhci support for Armada 7K/8K
  arm64: dts: marvell: add eMMC support for Armada 37xx
  arm64: dts: hisi: add pinctrl dtsi file for HiKey960 development board
  arm64: dts: hisi: add drive strength levels of the pins for Hi3660 SoC
  arm64: dts: hisi: enable the NIC and SAS for the hip07-d05 board
  arm64: dts: hisi: add SAS nodes for the hip07 SoC
  arm64: dts: hisi: add RoCE nodes for the hip07 SoC
  arm64: dts: hisi: add network related nodes for the hip07 SoC
  arm64: dts: hisi: add mbigen nodes for the hip07 SoC
  arm64: dts: rockchip: fix the memory size of PX5 Evaluation board
  arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board
  dt-bindings: arm: hisilicon: add bindings for hi3798cv200 SoC and Poplar board
  ...
2017-05-09 10:07:33 -07:00
Linus Torvalds
0160e00ae8 ARM: SoC driver updates
Driver updates for ARM SoCs.
 
 * Reset subsystem, merged through arm-soc by tradition:
  - Make bool drivers explicitly non-modular
  - New support for i.MX7 and Arria10 reset controllers
 
 * PATA driver for Palmchip BK371 (acked by Tejun)
 
 * Power domain drivers for i.MX (GPC, GPCv2)
  - Moved out of mach-imx for GPC
  - Bunch of tweaks, fixes, etc
 
 * PMC support for Tegra186
 
 * SoC detection support for Renesas RZ/G1H and RZ/G1N
 
 * Move Tegra flow controller driver from mach directory to drivers/soc
  - (Power management / CPU power driver)
 
 * Misc smaller tweaks for other platforms
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZEAZuAAoJEIwa5zzehBx3jCEP/1dcXY746rQoOMUDPyWF5+SZ
 w0l8dHUQhu4WjNGryfb9DbyiE3d6xlvPVzr9AJeAg6c5I+iikgeogS0XHNpWCU96
 FR1Ftb6zo8DIaGognBL9bK5HM7NXjd/EKBkMk0Ggs9/NRFUnakkbpdfivsl2BACx
 mCGo15+kbgQSQsMJtd5/KfsgY5h7lXJG0fZ8LV5E1E5BSa/AofZtKVgCKfhbd0zV
 gQqm7xfxtURHtucc7MYNEoKNk5rlrZhOlG6DdG0d6+rscCBrmL1I5giqm8y24+wW
 z+JJuk21+oVtltLz09JuX51xur3CGyJ+qNJdRPE1P1Udn7wj5zA+ew9qqJi1cgNf
 63tBxooBpH6R8dGcOfjKECD6lBBqBr/Dd8ReWbMyn0XF1HMAxgpfPtExu9WcDzGu
 9Fr/shUiEA3jqhbzSy6DCHugpnHPdHPyY64MqzisgOEVsituQ7MSefTIGSNusDlk
 K36I7j93mDAF5y2fTXqbjZKoRuu6KCySvGDXzBqGwhcNzUQk14iPwjtMDZ/l9Raj
 sQJCUxHntUovHs+VTCwS7ahqZyn0VRNx2bt1aJXNHKzuUovpA9/X5X9HCRZJDovB
 0bCGQZ124+H/VsWvSjVtIh7oknU3vSQJPxS6KLKoi3rvywuqW562lGjCTqvjBJKD
 FMZ5NA8VoWXM2rgTDOyx
 =B43K
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Olof Johansson:
 "Driver updates for ARM SoCs:

  Reset subsystem, merged through arm-soc by tradition:
   - Make bool drivers explicitly non-modular
   - New support for i.MX7 and Arria10 reset controllers

  PATA driver for Palmchip BK371 (acked by Tejun)

  Power domain drivers for i.MX (GPC, GPCv2)
   - Moved out of mach-imx for GPC
   - Bunch of tweaks, fixes, etc

  PMC support for Tegra186

  SoC detection support for Renesas RZ/G1H and RZ/G1N

  Move Tegra flow controller driver from mach directory to drivers/soc
   - (Power management / CPU power driver)

  Misc smaller tweaks for other platforms"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (60 commits)
  soc: pm-domain: Fix the mangled urls
  soc: renesas: rcar-sysc: Add support for R-Car H3 ES2.0
  soc: renesas: rcar-sysc: Add support for fixing up power area tables
  soc: renesas: Register SoC device early
  soc: imx: gpc: add workaround for i.MX6QP to the GPC PD driver
  dt-bindings: imx-gpc: add i.MX6 QuadPlus compatible
  soc: imx: gpc: add defines for domain index
  soc: imx: Add GPCv2 power gating driver
  dt-bindings: Add GPCv2 power gating driver
  ARM/clk: move the ICST library to drivers/clk
  ARM: plat-versatile: remove stale clock header
  ARM: keystone: Drop PM domain support for k2g
  soc: ti: Add ti_sci_pm_domains driver
  dt-bindings: Add TI SCI PM Domains
  PM / Domains: Do not check if simple providers have phandle cells
  PM / Domains: Add generic data pointer to genpd data struct
  soc/tegra: Add initial flowctrl support for Tegra132/210
  soc/tegra: flowctrl: Add basic platform driver
  soc/tegra: Move Tegra flowctrl driver
  ARM: tegra: Remove unnecessary inclusion of flowctrl header
  ...
2017-05-09 10:01:15 -07:00
Stephen Boyd
ad61dd303a scripts/spelling.txt: add regsiter -> register spelling mistake
This typo is quite common.  Fix it and add it to the spelling file so
that checkpatch catches it earlier.

Link: http://lkml.kernel.org/r/20170317011131.6881-2-sboyd@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2017-05-08 17:15:13 -07:00
Linus Torvalds
be580e7522 MMC core:
- Continue to re-factor code to prepare for eMMC CMDQ and blkmq support
  - Introduce queue semantics to prepare for eMMC CMDQ and blkmq support
  - Add helper functions to manage temporary enable/disable of eMMC CMDQ
  - Improve wait-busy detection for SDIO
 
 MMC host:
  - cavium: Add driver to support Cavium controllers
  - cavium: Extend Cavium driver to support Octeon SOCs and ThunderX SOCs
  - bcm2835: Add new driver for Broadcom BCM2835 controller
  - sdhci-xenon: Add driver to support Marvell Xenon SDHCI controller
  - sdhci-tegra: Add support for the Tegra186 variant
  - sdhci-of-esdhc: Support for UHS-I SD cards
  - sdhci-of-esdhc: Support for eMMC HS200 cards
  - sdhci-cadence: Add eMMC HS400 enhanced strobe support
  - sdhci-esdhc-imx: Reset tuning circuit when needed
  - sdhci-pci: Modernize and clean-up some PM related code
  - sdhci-pci: Avoid re-tuning at runtime PM for some Intel devices
  - sdhci-pci|acpi: Use aggressive PM for some Intel BYT controllers
  - sdhci: Re-factoring and modernizations
  - sdhci: Optimize delay loops
  - sdhci: Improve register dump print format
  - sdhci: Add support for the Command Queue Engine
  - meson-gx: Various improvements and clean-ups
  - meson-gx: Add support for CMD23
  - meson-gx: Basic tuning support to avoid CRC errors
  - s3cmci: Enable probing via DT
  - mediatek: Improve tuning support for eMMC HS200 and HS400 mode
  - tmio: Improve DMA support
  - tmio: Use correct response for CMD12
  - dw_mmc: Minor improvements and clean-ups
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZCF8JAAoJEP4mhCVzWIwpjikP/iLwYZOP+aNl1wvHXJ7/UtOB
 bonqPPRLfW6mJkiphZyjnf3ZldS8DoUYp1Jh8gVsWoOPZhFuzAyFTGRJA5t0sEtH
 WzV0X72qzfDESekP1KGZZPQSfqfo/UnIEwa7U0Rlw8jlpvVsbXimqw54e+hCE0n8
 bhZjQihxOkXofCMnS4CxFJwbSCNEkdw6cMgNk72P8KAQllbOA3UbOurAbRUT0I6S
 3H3+8uKh0fZp3BYGV5y8DxzqIRaCz3ed8TTuGFc3YU8sNGEF67AwcbBzfDaegNsR
 qNPU12gccOU5IY8gbG/MMoEpSXodEj0RCW2uDqt+QT289eh3SpPLlS2en/iZj4t6
 F1xnMEg48GpYJbiB4YImfK49c3RQXAtcdwf/v8SUcE4FUktuOsyQIozMglYIsUd1
 fGZ3yr0caRBnwAkbj5GXaG3/VXzMExKYalf990kUuxhHHGuRQLLg0SHkfWNhJNA1
 mw0XHXTrC9GO32PPfylgkdGOOCnlP36sbBPhGQqJUH6yeiy1wO4xoCVSO8iVI5J9
 8W9BGgSYJRlPaItmH2syQEO9dSRMS5BLy7oICTBn+LsszXwMbuNn6cFBkhF1Xxwy
 2MHU+b6EMn4V4qrp0c8gVfMraXkL9H7BwL9aCv1UTuti7d/7NM7G1wNW9qGala3Y
 9cU8nzC1A521kfmDNPPO
 =p+Hb
 -----END PGP SIGNATURE-----

Merge tag 'mmc-v4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc

Pull MMC updates from Ulf Hansson:
 "MMC core:
   - Continue to re-factor code to prepare for eMMC CMDQ and blkmq support
   - Introduce queue semantics to prepare for eMMC CMDQ and blkmq support
   - Add helper functions to manage temporary enable/disable of eMMC CMDQ
   - Improve wait-busy detection for SDIO

  MMC host:
   - cavium: Add driver to support Cavium controllers
   - cavium: Extend Cavium driver to support Octeon and ThunderX SOCs
   - bcm2835: Add new driver for Broadcom BCM2835 controller
   - sdhci-xenon: Add driver to support Marvell Xenon SDHCI controller
   - sdhci-tegra: Add support for the Tegra186 variant
   - sdhci-of-esdhc: Support for UHS-I SD cards
   - sdhci-of-esdhc: Support for eMMC HS200 cards
   - sdhci-cadence: Add eMMC HS400 enhanced strobe support
   - sdhci-esdhc-imx: Reset tuning circuit when needed
   - sdhci-pci: Modernize and clean-up some PM related code
   - sdhci-pci: Avoid re-tuning at runtime PM for some Intel devices
   - sdhci-pci|acpi: Use aggressive PM for some Intel BYT controllers
   - sdhci: Re-factoring and modernizations
   - sdhci: Optimize delay loops
   - sdhci: Improve register dump print format
   - sdhci: Add support for the Command Queue Engine
   - meson-gx: Various improvements and clean-ups
   - meson-gx: Add support for CMD23
   - meson-gx: Basic tuning support to avoid CRC errors
   - s3cmci: Enable probing via DT
   - mediatek: Improve tuning support for eMMC HS200 and HS400 mode
   - tmio: Improve DMA support
   - tmio: Use correct response for CMD12
   - dw_mmc: Minor improvements and clean-ups"

* tag 'mmc-v4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (148 commits)
  mmc: sdhci-of-esdhc: limit SD clock for ls1012a/ls1046a
  mmc: sdhci-of-esdhc: poll ESDHC_CLOCK_STABLE bit with udelay
  mmc: sdhci-xenon: Fix default value of LOGIC_TIMING_ADJUST for eMMC5.0 PHY
  mmc: sdhci-xenon: Fix the work flow in xenon_remove().
  MIPS: Octeon: cavium_octeon_defconfig: Enable Octeon MMC
  mmc: sdhci-xenon: Remove redundant dev_err call in get_dt_pad_ctrl_data()
  mmc: cavium: Use module_pci_driver to simplify the code
  mmc: cavium: Add MMC support for Octeon SOCs.
  mmc: cavium: Fix detection of block or byte addressing.
  mmc: core: Export API to allow hosts to get the card address
  mmc: sdio: Fix sdio wait busy implement limitation
  mmc: sdhci-esdhc-imx: reset tuning circuit when power on mmc card
  clk: apn806: fix spelling mistake: "mising" -> "missing"
  mmc: sdhci-of-esdhc: add delay between tuning cycles
  mmc: sdhci: Control the delay between tuning commands
  mmc: sdhci-of-esdhc: add tuning support
  mmc: sdhci-of-esdhc: add support for signal voltage switch
  mmc: sdhci-of-esdhc: add peripheral clock support
  mmc: sdhci-pci: Allow for 3 bytes from Intel DSM
  mmc: cavium: Fix a shift wrapping bug
  ...
2017-05-02 17:34:32 -07:00
Linus Torvalds
5a0387a8a8 Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Pull crypto updates from Herbert Xu:
 "Here is the crypto update for 4.12:

  API:
   - Add batch registration for acomp/scomp
   - Change acomp testing to non-unique compressed result
   - Extend algorithm name limit to 128 bytes
   - Require setkey before accept(2) in algif_aead

  Algorithms:
   - Add support for deflate rfc1950 (zlib)

  Drivers:
   - Add accelerated crct10dif for powerpc
   - Add crc32 in stm32
   - Add sha384/sha512 in ccp
   - Add 3des/gcm(aes) for v5 devices in ccp
   - Add Queue Interface (QI) backend support in caam
   - Add new Exynos RNG driver
   - Add ThunderX ZIP driver
   - Add driver for hardware random generator on MT7623 SoC"

* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (101 commits)
  crypto: stm32 - Fix OF module alias information
  crypto: algif_aead - Require setkey before accept(2)
  crypto: scomp - add support for deflate rfc1950 (zlib)
  crypto: scomp - allow registration of multiple scomps
  crypto: ccp - Change ISR handler method for a v5 CCP
  crypto: ccp - Change ISR handler method for a v3 CCP
  crypto: crypto4xx - rename ce_ring_contol to ce_ring_control
  crypto: testmgr - Allow ecb(cipher_null) in FIPS mode
  Revert "crypto: arm64/sha - Add constant operand modifier to ASM_EXPORT"
  crypto: ccp - Disable interrupts early on unload
  crypto: ccp - Use only the relevant interrupt bits
  hwrng: mtk - Add driver for hardware random generator on MT7623 SoC
  dt-bindings: hwrng: Add Mediatek hardware random generator bindings
  crypto: crct10dif-vpmsum - Fix missing preempt_disable()
  crypto: testmgr - replace compression known answer test
  crypto: acomp - allow registration of multiple acomps
  hwrng: n2 - Use devm_kcalloc() in n2rng_probe()
  crypto: chcr - Fix error handling related to 'chcr_alloc_shash'
  padata: get_next is never NULL
  crypto: exynos - Add new Exynos RNG driver
  ...
2017-05-02 15:53:46 -07:00
Dan Carpenter
0119dc6132 clk: x86: pmc-atom: Checking for IS_ERR() instead of NULL
clkdev_hw_create() returns NULLs on error, it doesn't return error
pointers.

Fixes: 41ee7caf59 ("clk: x86: add "mclk" alias for Baytrail/Cherrytrail")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-05-01 11:13:25 -07:00
Arnd Bergmann
3417f3528a clk: ti: divider: try to fix ti_clk_register_divider
Commit 6c0afb5039 ("clk: ti: convert to use proper register
definition for all accesses") converted all register accesses in
the TI clk driver to use a proper struct instead of a void
pointer casted struct that fits into a u32. Unfortunately, it
missed a conversion here in the didivder code, leading to a
compiler warning like so:

drivers/clk/ti/divider.c: In function 'ti_clk_register_divider':
drivers/clk/ti/divider.c:460:8: error: 'reg' may be used uninitialized in this function [-Werror=maybe-uninitialized]

Treating a 'u32' variable as a structure leads to a stack
overflow here, and the register address we pass down is never
initialized. Convert this part of the code as well so things
work properly.

Fixes: 6c0afb5039 ("clk: ti: convert to use proper register definition for all accesses")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[sboyd@codeaurora.org: Fixed fixes tag, rewrote commit message,
s/reg_setup/reg/]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-28 11:07:09 -07:00
Arnd Bergmann
36c02d0be4 clk: sunxi-ng: always select CCU_GATE
When the base driver is enabled but all SoC specific drivers are turned
off, we now get a build error after code was added to always refer to the
clk gates:

drivers/clk/built-in.o: In function `ccu_pll_notifier_cb':
:(.text+0x154f8): undefined reference to `ccu_gate_helper_disable'
:(.text+0x15504): undefined reference to `ccu_gate_helper_enable'

This changes the Kconfig to always require the gate code to be built-in
when CONFIG_SUNXI_CCU is set.

Fixes: 02ae2bc6fe ("clk: sunxi-ng: Add clk notifier to gate then ungate PLL clocks")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-28 10:47:21 -07:00
Colin Ian King
a82d12b8d5 clk: apn806: fix spelling mistake: "mising" -> "missing"
trivial fix to spelling mistake in dev_warn message

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-04-24 21:42:28 +02:00
Gregory CLEMENT
b92a3bcc7c clk: apn806: Turn the eMMC clock as optional for dts backwards compatible
First version of the binding didn't have the eMMC clock. This patch
allows to not registering the eMMC clock if it is not present in the
device tree. Then the device tree can be backwards compatible.

Suggested-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-04-24 21:42:13 +02:00
Konstantin Porotchkin
a8309cedcd clk: apn806: Add eMMC clock to system controller driver
Add fixed clock of 400MHz to system controller driver.  This clock is
used as SD/eMMC clock source.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Omri Itach <omrii@marvell.com>
Reviewed-by: Hanna Hawa <hannah@marvell.com>
[fixed up conflicts, added error handling --rmk]
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-04-24 21:42:12 +02:00
Markus Elfring
ee7d74339d clk: mvebu: Use kcalloc() in two functions
* Multiplications for the size determination of memory allocations
  indicated that array data structures should be processed.
  Thus use the corresponding function "kcalloc".

  This issue was detected by using the Coccinelle software.

* Replace the specification of data types by pointer dereferences
  to make the corresponding size determination a bit safer according to
  the Linux coding style convention.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-21 19:49:34 -07:00
Markus Elfring
23826e240a clk: mvebu: Use kcalloc() in of_cpu_clk_setup()
Multiplications for the size determination of memory allocations
indicated that array data structures should be processed.
Thus use the corresponding function "kcalloc".

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-21 19:49:13 -07:00
Markus Elfring
24f8186eb8 clk: nomadik: Delete error messages for a failed memory allocation in two functions
The script "checkpatch.pl" pointed information out like the following.

WARNING: Possible unnecessary 'out of memory' message

Thus remove such statements here.

Link: http://events.linuxfoundation.org/sites/events/files/slides/LCJ16-Refactor_Strings-WSang_0.pdf
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-21 19:47:14 -07:00
Markus Elfring
add3151133 clk: nomadik: Use seq_puts() in nomadik_src_clk_show()
A string which did not contain a data format specification should be put
into a sequence. Thus use the corresponding function "seq_puts".

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-21 19:47:10 -07:00
Markus Elfring
1808a32019 clk: Improve a size determination in two functions
Replace the specification of two data structures by pointer dereferences
as the parameter for the operator "sizeof" to make the corresponding size
determination a bit safer according to the Linux coding style convention.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-21 19:47:02 -07:00
Markus Elfring
4d32758671 clk: Replace four seq_printf() calls by seq_putc()
Four single characters should be put into a sequence.
Thus use the corresponding function "seq_putc".

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-21 19:45:24 -07:00
Markus Elfring
56f2150a84 clk: si5351: Delete an error message for a failed memory allocation in si5351_i2c_probe()
The script "checkpatch.pl" pointed information out like the following.

* CHECK: Comparison to NULL could be written "!drvdata"

  Thus adjust this expression.

* WARNING: Possible unnecessary 'out of memory' message

  Thus remove such a statement here.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-21 19:44:54 -07:00
Markus Elfring
9a78b16972 clk: si5351: Use devm_kcalloc() in si5351_i2c_probe()
Multiplications for the size determination of memory allocations
indicated that array data structures should be processed.
Thus use the corresponding function "devm_kcalloc".

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-21 19:44:42 -07:00
Markus Elfring
1e5c844441 clk: at91: Use kcalloc() in of_at91_clk_pll_get_characteristics()
Multiplications for the size determination of memory allocations
indicated that array data structures should be processed.
Thus use the corresponding function "kcalloc".

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-21 19:20:34 -07:00
John Crispin
db9c4a1e65 clk: mediatek: add mt2701 ethernet reset
The ethernet clock core has a reset register that is currently not exposed
to the user. Fix this by adding the missing registration code.

Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-21 19:20:33 -07:00
Stephen Boyd
de000a88c1 Allwinner clock changes, take 2
A few minor bug and comment fixes, plus some fixes for the PRCM CCU driver
 merged in the prior pull request
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABCAAGBQJY+G2RAAoJEBx+YmzsjxAgIgoP/jkK2DQ7SfrS60dFSSu8zllD
 wm2mBmcmU+qnkMkc5YWls/5Wfq37K4TZrA1/ZJUr9QsWj89iafmmHQVpWV3/2LpK
 3afV9FjRRZONhy9ThRj+DCZg9WSvo73VSNrOXiZKTEVufi8crKCcG2g59p86KyfO
 obTE7Lrl72wqRE+j+KNnIBiCj+rVE6vGrGY5p2ZE/N8VecveJ8Zje03lNL1Jyj+Z
 +rLkQCk4j2DKAKUaaIf+NMQ7L5iT7ePkFPP/yFa3/mpd1Emqp5Kq3cIDxV4Zh+c/
 DwtMBqGbabSvHFeokK9IvEYuTdQidREN/R7uWSLgcWcr1om6es7FD41pVF0FIaAN
 AYgRfIR3RTOXFbPJt8YQrvV/Xg7yQRweEqlKI6sAC4lVI9yzKQAdAoXTM50AotYS
 jB0inoNXg07oQxXrcBaFlcKwsIFOS8k9YWH6NXbofi9/FBswuafgXcZxXKoaNDDU
 K+q2bMG2qlMKTgDV44B8ylbdQISCIrPfreqGkYLRfmZx6iPq79nwdd2Wp+GDZ8sk
 jX+a8UFVdP9194Xk9ZGA/BGIgRTz1OeJtQH2mWmLheGoQjL2lcdriCtUQ+35Yuzd
 caONPr38gvmoixKaWdlqwdurmWvEy8xMvN+r+G9BM855yZMh4ue372xQbGTG4h+d
 sOU4mINfk9z8cZ5UgMdx
 =Gi2w
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-clk-for-4.12-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into HEAD

Pull Allwinner clock changes, take 2 from Maxime Ripard:

A few minor bug and comment fixes, plus some fixes for the PRCM CCU driver
merged in the prior pull request

* tag 'sunxi-clk-for-4.12-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  clk: sunxi-ng: a80: Fix audio PLL comment not matching actual code
  clk: sunxi-ng: Fix round_rate/set_rate multiplier minimum mismatch
  clk: sunxi-ng: use 1 as fallback for minimum multiplier
  clk: sunxi-ng: fix PRCM CCU CLK_NUMBER value
  clk: sunxi-ng: fix PRCM CCU ir clk parent
2017-04-21 19:19:46 -07:00
Daniel Lezcano
b68adc23bc clk: hi6220: Add the hi655x's pmic clock
The hi655x multi function device is a PMIC providing regulators.

The PMIC also provides a clock for the WiFi and the Bluetooth, let's implement
this clock in order to add it in the hi655x MFD and allow proper wireless
initialization.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
[sboyd@codeaurora.org: Remove clkdev usage]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-21 19:18:53 -07:00
Arnd Bergmann
fc04f27dfc clk: ti: fix building without legacy omap3
When CONFIG_ATAGS or CONFIG_OMAP3 is disabled, we get a build error:

In file included from include/linux/clk-provider.h:15:0,
                 from drivers/clk/ti/clk.c:19:
drivers/clk/ti/clk.c: In function 'ti_clk_add_aliases':
drivers/clk/ti/clk.c:438:29: error: 'simple_clk_match_table' undeclared (first use in this function); did you mean 'simple_attr_write'?

Moving the match table down fixes it.

Fixes: c17435c56b ("clk: ti: add API for creating aliases automatically for simple clock types")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-21 19:01:39 -07:00
Arnd Bergmann
2158a09395 clk: ti: fix linker error with !SOC_OMAP4
When none of the OMAP4-generation SoCs are enabled, we run into a link
error for am43xx/am43xx:

drivers/clk/ti/dpll.o: In function `of_ti_am3_dpll_x2_setup':
dpll.c:(.init.text+0xd8): undefined reference to `clkhwops_omap4_dpllmx'

This is easily fixed by adding another #ifdef.

While looking at the code, I also spotted another problem with the
assignment of hw_ops variable that is not used again later. I'm
changing this to setting clk_hw->ops instead, which I guess is what
was intended here.

Fixes: 473adbf4e0 ("clk: ti: dpll44xx: fix clksel register initialization")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Tero Kristo <t-kristo@ti.com>
[sboyd@codeaurora.org: Replaced fixes tag with correct one]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-21 19:01:18 -07:00
Markus Elfring
34675d6703 clk: hi3620: Fix a typo in one variable name
The script "checkpatch.pl" pointed information out like the following.

CHECK: 'seperated' may be misspelled - perhaps 'separated'?

Thus rename the affected variable.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-19 11:29:49 -07:00
Markus Elfring
3cda284b77 clk: hi3620: Delete error messages for a failed memory allocation in two functions
The script "checkpatch.pl" pointed information out like the following.

WARNING: Possible unnecessary 'out of memory' message

Thus remove such statements here.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-19 11:28:04 -07:00
Markus Elfring
781de7ade6 clk: hi3620: Use kcalloc() in hi3620_mmc_clk_init()
* A multiplication for the size determination of a memory allocation
  indicated that an array data structure should be processed.
  Thus use the corresponding function "kcalloc".

  This issue was detected by using the Coccinelle software.

* Replace the specification of a data type by a pointer dereference
  to make the corresponding size determination a bit safer according to
  the Linux coding style convention.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-19 10:48:04 -07:00
Markus Elfring
840e56326f clk: hisilicon: Delete error messages for failed memory allocations in hisi_clk_init()
The script "checkpatch.pl" pointed information out like the following.

WARNING: Possible unnecessary 'out of memory' message

Thus remove such statements here.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-19 10:45:52 -07:00
Markus Elfring
8d9bdc46c7 clk: hisilicon: Use devm_kmalloc_array() in hisi_clk_alloc()
* A multiplication for the size determination of a memory allocation
  indicated that an array data structure should be processed.
  Thus use the corresponding function "devm_kmalloc_array".

  This issue was detected by using the Coccinelle software.

* Replace the specification of a data type by a pointer dereference
  to make the corresponding size determination a bit safer according to
  the Linux coding style convention.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-19 10:45:12 -07:00
Markus Elfring
7b9bae176a clk: hisilicon: Use kcalloc() in hisi_clk_init()
* A multiplication for the size determination of a memory allocation
  indicated that an array data structure should be processed.
  Thus use the corresponding function "kcalloc".

  This issue was detected by using the Coccinelle software.

* Replace the specification of a data type by a pointer dereference
  to make the corresponding size determination a bit safer according to
  the Linux coding style convention.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-19 10:20:14 -07:00
Kuninori Morimoto
b3da896e2f clk: cs2000: select 12.20 High Accuracy on LFRatioCfg
cs2000 can select Static/Dynamic ratio based Frequency Synthesizer
Mode, it can select 20.12 High Multiplier interpret for 32-bit
User Defined Ratio if Dynamic ratio mode. Otherwise it should select
12.20 High Accuracy mode.
Current cs2000 is supporting Static ratio mode only, so it should
select 12.20 High Accuracy mode, not 20.12 High Multiplier mode.
This patch fixes it.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-19 10:18:55 -07:00
Kuninori Morimoto
b295a015cd clk: cs2000: tidyup DEVICE_CFG2 settings
DEVICE_CFG2 can select ratio from user defined ratio and LOCKCLK is
for it. But current driver sets fixed 0 value. This patch fixes it.
Note is that current cs2000 driver is using/supporting only ratio0
(= ch0) now.

DEVICE_CFG2 can select STATIC/DYNAMIC ratio mode, and current cs2000
driver is selecting STATIC mode, but it was not understandable on
current code. This patch also solve this issue.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-19 10:18:53 -07:00
Kuninori Morimoto
d127967a7b clk: cs2000: enable clock skipping mode
CLK_IN skipping mode allows the PLL to maintain lock even when the
CLK_IN signal has missing pulses for up to 20 ms (t CS) at a time.
This patch enables it

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-19 10:18:52 -07:00
Stanimir Varbanov
4a43e35d19 clk: qcom: add parent for venus core0 and core1 gdsc's
Make venus_gdsc parent of venus gdsc core0 and core1.

Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-19 09:55:58 -07:00
Pierre-Louis Bossart
41ee7caf59 clk: x86: add "mclk" alias for Baytrail/Cherrytrail
Due to timing requirements, TI and Conexant manage the audio
reference clock from their ASoC codec drivers using the "mclk"
string. This patch adds another lookup for the "pmc_plt_clk_3"
clock to avoid Intel-specific tests in those codec drivers and
use code as-is.

To avoid a leak, clk_add_alias() is not used in this patch.
Instead the lookup is created manually as part of the .probe()
step and dropped in the .remove() step.

"pmc_plt_clk_3" is used exclusively for audio on all known
Baytrail/CherryTrail designs and is e.g. routed on the MCLK
(pin 26) of the MinnowBoardMAX Turbot LSE connector.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-19 09:52:32 -07:00
Bharat Kumar Reddy Gooty
8973aa4aec clk: ns2: Correct SDIO bits
Corrected the bits for power and iso.

Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Fixes: f7225a83 ("clk: ns2: add clock support for Broadcom Northstar 2 SoC")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-19 09:50:39 -07:00
Srinivas Kandagatla
46a7253df4 clk: qcom: clk-smd-rpm: fix rate for branch clks during handoff
rpm branch clk rate should requested as either 0 or 1 but not INT_MAX.
This patch fixes rate request for branch clocks during clk handoff.

Suggested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-19 09:50:26 -07:00
Stefan Agner
e24f5287cd clk: imx7d: fix USDHC NAND clock
The USDHC NAND root clock is not gated by any CCM clock gate. Remove
the bogus gate definition.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-19 09:44:14 -07:00
Thomas Petazzoni
1b21401307 clk: spear: fix ADC clock definition on SPEAr600
There is no SPEAr600 device named "adc". Instead, the description of the
ADC was recently added to the Device Tree, and the device name is
"d820b000.adc", so we should associate the ADC gatable clock to this
device name.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-19 09:27:52 -07:00